PI49FCT3805D 3.3V, 2 x 1:5 CMOS Clock Driver Features * * * * * * * * * Description Low output skew: <200ps Switching frequency up to 166 MHz Fast output rise/fall time: <1.0ns Low propagation delay: <2.5ns Low input capacitance: <6.0pF Balanced CMOS outputs Industrial Temperature: -40C to +85C 3.3V 10% operation, 5V Input Tolerant Packaging (Pb-free & Green available): - 20-pin 150-mil wide QSOP (Q) - 20-pin 209-mil wide SSOP (H) Pericom Semiconductor's PI49FCT3805D is composed of noninverting drivers. The outputs are configured into 2 groups of one-in, five-out with independent output enable. Group B has an extra MON output. Excellent output signals to power and ground ratio minimize power and ground noise and also improves output performance. Block Diagram Pin Configuration VCC 1 20 VCCB OA0 2 19 OB0 OA1 3 18 OB1 OA2 4 17 OB2 GNDA 5 16 GNDB OA3 6 15 OB3 OA4 7 14 OB4 GNDQ 8 13 MON OEA 9 12 OEB INA 10 11 INB OEA INA INB 5 5 OA04 OB04 OEB MON Truth Table(1) Pin Description Pin Name Inputs Deescription Outputs OEX INX OAX MON Clock Inputs L L L L OAN, OBN Clock Outputs L H H H MON Monitor Output H L Z L GND Ground H H Z H VCC Power OEX Hi-Z State Output Enable Inputs (Active Low) INX 11-0005 Note: 1. H = High Voltage Level, L = Low Voltage Level, Z = High Impedance 1 PS8492F 07/29/10 PI49FCT3805D 3.3V, 2 x 1:5 CMOS Clock Driver Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature.................................................................. -65C to +150C Ambient Temperature with Power Applied................................. -40C to +85C Input Voltage to GND Potential (Inputs & Vcc Only)................... -0.5V to 5.5V Output Voltage to GND Potential (Outputs & I/O Only)....-0.5V to +Vcc +0.5V VCC Input Voltage......................................................................... -0.5V to +4.6V Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. DC Electrical Characteristics (TA = -40C to +85C, Vcc = 3.3V 0.3V) Symbol Test Conditions(1) Parameters Min. Typ. VCC-0.2 2.4(3) 2.4(3) 3.0 3.0 Max. Units 0.2 0.4 0.4 V VOH Output High Voltage VCC = Min., VIN = VIL or VIH IOH = -0.1mA IOH = -8mA IOH = -12mA VOL Output Low Voltage VCC = Min., VIN = VIL or VIH IOH = 0.1mA IOH = 8mA IOH = 12mA VIH Input High Voltage Low Logic 2.0 5.5 VIL Input Low Voltage High Logic -0.5 0.8 IIH Input High Current VCC = Max., VIN = 5.5V 1 IIL Input Low Current VCC = Max., VIN = GND -1 IOZH IOZL High Impedance output current VCC = Max., all outputs disabled 1 -1 VIK Clamp Diode Voltage VCC = Min., IIN = -18mA IODH Output High Current(4, 5) IODL Output Low Current(4, 5) IOS Short Circuit Current(4, 5) 0.2 0.3 VOUT = VCC VOUT = GND -0.7 -1.2 VOUT = 1.5V, VIN = VIL or VIH, VCC = 3.3V -40 -74 -100 VOUT = 1.5V, VIN = VIL or VIH, VCC = 3.3V 50 90 130 VCC = Max., VOUT = GND -60 -100 -120 A V mA Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 3.3V, +25C ambient and maximum loading. 3. VOH = VCC - 0.6V at rated current. 4. This parameter is determined by device characterization but is not production tested. 5. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 11-0005 2 PS8492F 07/29/10 PI49FCT3805D 3.3V, 2 x 1:5 CMOS Clock Driver Capacitance (TA = 25C, f = 1 MHz) Parameters(1) Description Test Conditions Typ Max. CIN Input Capacitance VIN = 0V 3.0 4 COUT Output Capacitance VOUT = 0V -- 6 Units pF Note: 1. This parameter is determined by device characterization but is not production tested. Power Supply Characteristics Parameters Test Conditions(1) Description ICC Quiescent Power Supply Current VCC = Max. IDD Dynamic Supply Current per Output VCC = 3.6V, CL = 15pF, All Outputs Toggling IC ICC Total Power Supply Current Supply Current per inputs @ TTL High VIN = GND or VDD Min. Typ. (2) Max. 0.1 30 Units A VCC = 3.6V, CL = 15pF, All Outputs Toggling, fi = 133 MHz 80 120 VIN = VCC or GND 100 135 VIN = VCC -0.6V or GND 100 135 VCC = 3.6V, CL = 15pF, All Outputs Toggling, fi = 166 MHz VIN = VCC or GND 120 160 VIN = VCC -0.6V or GND 120 160 VCC = Max. VIN = VCC -0.6V(3) 45 300 mA/ MHz A Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device. 2. Typical values are at VCC = 3.3V, +25C ambient. 3. Per TTL driven input (VIN = VCC - 0.6V); all other inputs at VCC or GND. 11-0005 3 PS8492F 07/29/10 PI49FCT3805D 3.3V, 2 x 1:5 CMOS Clock Driver Switching Characteristics over Operating Range Parameters tPLH tPHL 3805D Test Conditions(1) Description Propagation Delay INN to ON tR/tF Units Max. 3.0 CLKn Rist/Fall Time 0.8V ~ 2.0V 1.5 CL = 15pF, 133 MHz (3805D) ns tSK(o) (3) Pulse Skew tSK(p) (3) Output Skew tSK(t) (3) Package Skew 550 tZL, tZH, tLZ, tHZ Enable/Disable Time 5.2 ns FMAX Input Frequency 133 MHz 270 ps 270 Note: 1. These parameters are guaranteed by design 2. Series Resistor loading = 33 (See Test Circuit) Switch Position Test Switch Disable LOW Enable LOW 6V Disable HIGH Enable HIGH GND All Other Inputs Open Definitions: 1. CL = Load capacitance: includes jig and probe capacitance. 2. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. Enable/Disable Time Test Set-Up Tests Circuit 6V VCC S VCC 33 Pulse Generator f = 125MHz 500 D.U.T. 50 33 Pulse Generator CL 15pF D.U.T. 50 11-0005 4 CL 15pF PS8492F 500 07/29/10 PI49FCT3805D 3.3V, 2 x 1:5 CMOS Clock Driver Switching Waveforms Output Skew - tsk(o) Propagation Delay 3V Input 3V Input 1.5V tPLHx 0V tPHL tPLH tSK(o) VOL tSK(o) Oy Enable and Disable Times 3V OE Output Normally Low 3.0V Switch Closed 1.5V tPZH Output Normally High 0V tPLZ tPHZ Switch Open VOL tPHLy 1.5V Pulse Skew - tsk(p) 3.0V 0.3V 0.3V 0V Enable Disable VOL VOH 1.5V tPZL Output Normally Low Switch Closed 3.0V Package Skew - tsk(t) Output Normally High 3V 1.5V Switch Open 0V tPLZ 1.5V tPZH 3.0V 0.3V tPHZ 1.5V 0V 0.3V VOL VOH 0V 0V tPHL1 tPLH1 3V OE 0V Input VOH tSK(o) = | tPLHy tPLHx | or | tPHLy tPHLx | 1.5V tPZL VOL 1.5V tPLHy Disable VOH 1.5V 1.5V Enable 0V tPHLx Ox VOH Output 1.5V VOH Package 1 Output 1.5V tSK(t) Package 2 Output tSK(t) VOL VOH 1.5V tPLH2 VOL tPHL2 tSK(t) = | tPLH2 tPLH1 | or | tPHL2 tPHL1 | 11-0005 5 PS8492F 07/29/10 PI49FCT3805D 3.3V, 2 x 1:5 CMOS Clock Driver Packaging Mechanical: 20-Pin 209-mil wide SSOP (H) 1 DATE: 04/10/08 DESCRIPTION: 20-Pin, 209-Mil Wide, SSOP PACKAGE CODE: H20 DOCUMENT CONTROL #: PD-1240 REVISION: E 08-0140 11-0005 6 PS8492F 07/29/10 PI49FCT3805D 3.3V, 2 x 1:5 CMOS Clock Driver Packaging Mechanical: 20-Pin 150-mil wide QSOP (Q) DOCUMENT CONTROL NO. PD - 1202 20 REVISION: H .008 0.20 MIN. .150 .157 3.81 3.99 DATE: 10/22/07 .008 .013 0.20 0.33 Guage Plane .010 0.254 1 Detail A .337 8.56 .344 8.74 0-6 .016 .035 0.41 0.89 .041 1.04 REF .058 REF 1.47 .015 x 45 0.38 .053 1.35 .069 1.75 Detail A 1 .007 .010 SEATING PLANE .025 BSC 0.635 .008 0.203 .012 0.305 .004 0.101 .010 0.254 0.178 0.254 .228 .244 5.79 6.19 X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS Pericom Semiconductor Corporation 3545 N. 1st Street, San Jose, CA 95134 1-800-435-2335 * www.pericom.com Note: 1) Controlling dimensions in inches. 2) Ref: JEDEC MO-137B/AD 3) Dimensions do not include mold flash, protrusions or gate burrs DESCRIPTION: 20-Pin, 150-Mil Wide, QSOP PACKAGE CODE: Q Ordering Information Ordering Code Package Code Package Description PI49FCT3805DHE H Pb-free & Green, 20-pin 209-mil SSOP PI49FCT3805DQE Q Pb-free & Green, 20-pin 150-mil QSOP Notes: 1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging/ 2. Number of Transistors = TBD Pericom Semiconductor Corporation * 1-800-435-2336 * www.pericom.com 11-0005 7 PS8492F 07/29/10