SN54HCT126, SN74HCT126
QUADRUPLE BUS BUFFER GATES
WITH 3-STATE OUTPUTS
SCLS070A – NOVEMBER 1988 – REVISED NOVEMBER 1990
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
High-Current 3-State Outputs Drive Bus
Lines or Buffer Memory Address Registers
D
Inputs Are TTL-Voltage Compatible
D
Package Options Include Plastic
Small-Outline (D) Packages, Ceramic Chip
Carriers (FK), and Standard Plastic (N) and
Ceramic (J) 300-mil DIPs
description
These bus buffers feature independent line
drivers with 3-state outputs. Each output is
disabled when the associated OE is low.
The SN54HCT126 is characterized for operation
over the full military temperature range of –55°C
to 125°C. The SN74HCT126 is characterized for
operation from –40°C to 85°C.
FUNCTION TABLE
INPUTS OUTPUT
OE AY
H H H
HLL
L X Z
H = high level, L = low level,
X = irrelevant
logic symbol
†
EN
1
2
1A 1Y
3
4
5
2A 2Y
6
10
9
3A 3Y
8
13
12
4A 4Y
11
1OE
2OE
3OE
4OE
†This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
logic diagram, each buffer (positive logic)
OE
AY
Copyright 1990, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1OE
1A
1Y
2OE
2A
2Y
GND
VCC
4OE
4A
4Y
3OE
3A
3Y
3212019
910111213
4
5
6
7
8
18
17
16
15
14
4A
NC
4Y
NC
3OE
1Y
NC
2OE
NC
2A
1A
1OE
NC
3Y
3A V
4OE
2Y
GND
NC
SN54HCT126 ...FK PACKAGE
(TOP VIEW)
CC
NC – No internal connection
SN54HCT126 ...J PACKAGE
SN74HCT126 ...D OR N PACKAGE
(TOP VIEW)
SN54HCT126, SN74HCT126
QUADRUPLE BUS BUFFER GATES
WITH 3-STATE OUTPUTS
SCLS070A – NOVEMBER 1988 – REVISED NOVEMBER 1990
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range†
Supply voltage range, VCC –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0 or VI > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0 or VO > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, IO (VO = 0 to VCC) ±35 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through VCC or GND pins ±70 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 in) from case for 60 s: FK or J package 300°C. . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 in) from case for 10 s: DW or N package 260°C. . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
recommended operating conditions
SN54HCT126 SN74HCT126
UNIT
MIN NOM MAX MIN NOM MAX
UNIT
VCC Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage VCC = 4.5 V to 5.5 V 2 2 V
VIL Low-level input voltage VCC = 4.5 V to 5.5 V 0 0.8 0 0.8 V
VIInput voltage 0 VCC 0 VCC V
VOOutput voltage 0 VCC 0 VCC V
ttInput transition (rise and fall) time 0 500 0 500 ns
TAOperating free-air temperature –55 125 –40 85 °C
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
TA = 25°C SN54HCT126 SN74HCT126
UNIT
PARAMETER
TEST
CONDITIONS
V
CC MIN TYP MAX MIN MAX MIN MAX
UNIT
VOH
VI = VIH or VIL, IOH = –20 µA
45V
4.4 4.499 4.4 4.4
V
V
OH VI = VIH or VIL, IOH = –6 mA
4
.
5
V
3.98 4.3 3.7 3.84
V
VOL
VI = VIH or VIL, IOL = 20 µA
45V
0.001 0.1 0.1 0.1
V
V
OL VI = VIH or VIL, IOL = 6 mA
4
.
5
V
0.17 0.26 0.4 0.33
V
IIVI = VCC or 0 5.5 V ±0.1 ±100 ±1000 ±1000 nA
IOZ VO = VCC or 0, VI = VIH or VIL 5.5 V ±0.01 ±0.5 ±10 ±5µA
ICC VI = VCC or 0, IO = 0 5.5 V 8 160 80 µA
∆ICC‡One input at 0.5 V or 2.4 V,
Other inputs at 0 or VCC 5.5 V 1.4 2.4 3 2.9 mA
Ci4.5 V to
5.5 V 3 10 10* 10 pF
* On products compliant to MIL-STD-883C, Class B, this parameter is not production tested.
‡This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or VCC.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
SN54HCT126, SN74HCT126
QUADRUPLE BUS BUFFER GATES
WITH 3-STATE OUTPUTS
SCLS070A – NOVEMBER 1988 – REVISED NOVEMBER 1990
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)
PARAMETER
FROM TO
VCC
TA = 25°C SN54HCT126 SN74HCT126
UNIT
PARAMETER
(INPUT) (OUTPUT)
V
CC MIN TYP MAX MIN MAX MIN MAX
UNIT
td
A
Y
4.5 V 15 26 39 33
ns
t
pd
A
Y
5.5 V 12 23 35 30
ns
t
OE
Y
4.5 V 19 26 39 33
ns
t
en
OE
Y
5.5 V 15 23 35 30
ns
tdi
OE
Y
4.5 V 18 26 39 33
ns
t
dis
OE
Y
5.5 V 15 23 35 30
ns
tt
Any
4.5 V 8 15 22 19
ns
t
t
An
y5.5 V 7 14 21 17
ns
switching characteristics over recommended operating free-air temperature range, CL = 150 pF
(unless otherwise noted) (see Figure 1)
PARAMETER
FROM TO
VCC
TA = 25°C SN54HCT126 SN74HCT126
UNIT
PARAMETER
(INPUT) (OUTPUT)
V
CC MIN TYP MAX MIN MAX MIN MAX
UNIT
td
A
Y
4.5 V 21 36 58 46
ns
t
pd
A
Y
5.5 V 17 32 48 42
ns
t
OE
Y
4.5 V 25 36 58 46
ns
t
en
OE
Y
5.5 V 21 32 48 42
ns
tt
Any
4.5 V 17 42 63 53
ns
t
t
An
y5.5 V 14 38 57 48
ns
operating characteristics, TA = 25°C
PARAMETER TEST CONDITIONS TYP UNIT
Cpd Power dissipation capacitance No load 35 pF
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
SN54HCT126, SN74HCT126
QUADRUPLE BUS BUFFER GATES
WITH 3-STATE OUTPUTS
SCLS070A – NOVEMBER 1988 – REVISED NOVEMBER 1990
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
1.3 V
10%
3 V
≈VCC
VOL
0 V
Input
(See Note B)
Output
(See Note C)
1.3 V
tPZL tPLZ
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
VOH
≈0 V
1.3 V
1.3 V
tPZH
tPHZ
Output
(See Note C)
From Output
Under Test
RL
VCC
S1
S2
LOAD CIRCUIT
PARAMETER CL
tPZH
tpd or tt
tdis
ten tPZL
tPHZ
tPLZ
1 kΩ
1 kΩ
50 pF
or
150 pF
50 pF
Open Closed
RLS1
Closed Open
S2
Open Closed
Closed Open
50 pF
or
150 pF Open Open––
NOTES: A. CL includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 6 ns, tf ≤ 6 ns.
C. W aveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
W aveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
D. The outputs are measured one at a time with one input transition per measurement.
CL
(see Note A)
1.3 V
1.3 V1.3 V
3 V
VOH
VOL
0 V
trtf
Input
Output
1.3 V
tPLH tPHL
90%
Figure 1. Load Circuit and Voltage Waveforms
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Copyright 1998, Texas Instruments Incorporated
