PD - 95158 Advanced Process Technology Surface Mount (IRFZ46NS) l Low-profile through-hole (IRFZ46NL) l 175C Operating Temperature l Fast Switching l Fully Avalanche Rated l Lead-Free Description IRFZ46NSPbF IRFZ46NLPbF l HEXFET(R) Power MOSFET l D VDSS = 55V RDS(on) = 0.0165 G ID = 53A Advanced HEXFET(R) Power MOSFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. S The D2Pak is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. The D2Pak is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application. The through-hole version (IRFZ46NL) is available for lowprofile applications. D 2 P ak T O -26 2 Absolute Maximum Ratings Parameter ID @ TC = 25C ID @ TC = 100C IDM PD @TA = 25C PD @TC = 25C VGS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Power Dissipation Linear Derating Factor Gate-to-Source Voltage Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Max. 53 Units 37 180 3.8 107 0.71 20 28 11 5.0 -55 to + 175 A W W W/C V A mJ V/ns C 300 (1.6mm from case ) Thermal Resistance Parameter RJC RJA www.irf.com Junction-to-Case Junction-to-Ambient ( PCB Mounted,steady-state)** Typ. Max. Units --- --- 1.4 40 C/W 1 04/22/04 IRFZ46NS/LPbF Electrical Characteristics @ TJ = 25C (unless otherwise specified) Parameter Drain-to-Source Breakdown Voltage V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) Gate Threshold Voltage gfs Forward Transconductance Qg Qgs Qgd td(on) tr td(off) tf Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Min. 55 --- --- 2.0 19 --- --- --- --- --- --- --- --- --- --- --- LS Internal Source Inductance --- Ciss Coss Crss EAS Input Capacitance Output Capacitance Reverse Transfer Capacitance Single Pulse Avalanche Energy --- --- --- --- V(BR)DSS IDSS Drain-to-Source Leakage Current IGSS Typ. --- 0.057 --- --- --- --- --- --- --- --- --- --- 14 76 52 57 Max. Units Conditions --- V VGS = 0V, ID = 250A --- V/C Reference to 25C, ID =1mA .0165 VGS =10V, ID = 28A 4.0 V VDS = VGS, ID = 250A --- S VDS = 25V, ID = 28A 25 VDS = 55V, VGS = 0V A 250 VDS = 44V, VGS = 0V, TJ = 150C 100 VGS = 20V nA -100 VGS = -20V 72 ID = 28A 11 nC VDS = 44V 26 VGS = 10V, See Fig. 6 and 13 --- VDD = 28V --- ID = 28A ns --- RG = 12 --- RD = 0.98, See Fig. 10 Between lead, nH 7.5 --- and center of die contact 1696 --- VGS = 0V 407 --- pF VDS = 25V 110 --- = 1.0MHz, See Fig. 5 583 152 IAS = 28A, L = 389mH Source-Drain Ratings and Characteristics IS I SM V SD t rr Q rr ton Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol --- --- 53 showing the A G integral reverse --- --- 180 p-n junction diode. S --- --- 1.3 V TJ = 25C, IS = 28A, VGS = 0V --- 67 101 ns TJ = 25C, IF = 28A --- 208 312 nC di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Notes: Repetitive rating; pulse width limited by Pulse width 400s; duty cycle 2%. Starting TJ = 25C, L = 389H This is a typical value at device destruction and represents ISD 28A, di/dt 220A/s, VDD V(BR)DSS, This is a calculated value limited to TJ = 175C. Calculated continuous current based on maximum allowable max. junction temperature. ( See fig. 11 ) RG = 25, IAS = 28A. (See Figure 12) TJ 175C. Uses IRFZ46N data and test conditions. operation outside rated limits. junction temperature. Package limitation current is 39A. ** When mounted on 1" square PCB (FR-4 or G-10 Material ). For recommended footprint and soldering techniques refer to application note #AN-994. 2 www.irf.com IRFZ46NS/LPbF 1000 BO TTOM 100 10 4.5 V 2 0 s P U L S E W ID T H TTCJ = 25C 25 C 1 0.1 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP I , D rain-to-S ource C urrent (A ) D I , D rain-to-S ou rc e C urre nt (A ) D 1000 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V TO P 1 10 A 100 4.5 V 10 2 0 s P U L S E W ID T H TTCJ = 175C 17 5C 1 0.1 100 1 2.5 R D S (on) , Drain-to-S ource O n Resistance (N orm alized) I D , D rain-to-So urce C urren t (A ) 1000 TJ = 2 5C TJ = 1 7 5C 10 V DS = 2 5V 2 0 s P U L S E W ID TH 4 5 6 7 8 9 10 V G S , G ate-to -So urce Voltag e (V) Fig 3. Typical Transfer Characteristics www.irf.com A Fig 2. Typical Output Characteristics Fig 1. Typical Output Characteristics 1 100 V DS , D rain-to-S ource V oltage (V ) V D S , D rain-to-S ource V oltage (V ) 100 10 A I D = 4 6A 2.0 1.5 1.0 0.5 V G S = 10 V 0.0 -60 -40 -20 0 20 40 60 80 A 100 120 140 160 180 T J , Junction T em perature (C ) Fig 4. Normalized On-Resistance Vs. Temperature 3 IRFZ46NS/LPbF V GS C iss C rs s C o ss 2400 20 0V , f = 1MHz C g s + C g d , C d s S H O R TE D C gd C ds + C g d I D = 28 A V D S = 44 V V D S = 28 V 16 C iss 2000 C , Capacitance (pF) = = = = V G S , G ate-to-S ource V oltage (V ) 2800 12 1600 C oss 1200 800 C rss 400 0 1 10 100 8 4 FO R TE S T C IR C U IT S E E FIG U R E 1 3 0 A 0 V D S , D rain-to-S ourc e V oltage (V ) 20 30 40 50 60 A Q G , T otal G ate C harge (nC ) Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage 1000 1000 O P E R A T IO N IN T H IS A R E A L IM ITE D B Y R D S (o n) I D , D rain Current (A ) I SD , Reverse D rain C urrent (A) 10 100 T J = 1 75 C T J = 25 C 10 V G S = 0V 1 0.4 0.8 1.2 1.6 2.0 V S D , S ourc e-to-D rain V oltage (V ) Fig 7. Typical Source-Drain Diode Forward Voltage 4 A 2.4 10s 100 100s 10 1m s 10m s T C = 25 C T J = 17 5C S ing le P u lse 1 1 10 100 V D S , D rain-to-S ource V oltage (V ) Fig 8. Maximum Safe Operating Area www.irf.com A IRFZ46NS/LPbF 60 VGS D.U.T. RG Limited By Package 50 ID , Drain Current (A) RD VDS + V-DD 10V 40 Pulse Width 1 s Duty Factor 0.1 % 30 Fig 10a. Switching Time Test Circuit 20 VDS 90% 10 0 25 50 75 100 125 150 175 T C , Case Temperature (C) 10% VGS td(on) Fig 9. Maximum Drain Current Vs. Case Temperature tr t d(off) tf Fig 10b. Switching Time Waveforms Thermal Response (Z thJC ) 10 1 D = 0.50 0.20 0.10 0.1 P DM 0.05 0.02 0.01 0.01 0.00001 t1 SINGLE PULSE (THERMAL RESPONSE) 0.0001 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.001 0.01 0.1 1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRFZ46NS/LPbF L VDS D.U.T. RG + V - DD IAS 10 V tp 0.01 Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS tp VDD E A S , S ingle Pulse Avalanc he E nergy (m J) 500 ID 11 A 2 0A 28 A TOP B O TT O M 400 300 200 100 0 V D D = 25 V 25 50 75 100 125 A 150 175 S tarting T J , J unc tion T em perature (C ) VDS Fig 12c. Maximum Avalanche Energy Vs. Drain Current IAS Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 50K QG 12V .2F .3F 10 V QGS + V - DS VGS VG 3mA Charge Fig 13a. Basic Gate Charge Waveform 6 D.U.T. QGD IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit www.irf.com IRFZ46NS/LPbF Peak Diode Recovery dv/dt Test Circuit + D.U.T Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer + - - + RG * * * * Driver Gate Drive P.W. + dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test Period D= - V DD P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Curent Ripple 5% ISD * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS www.irf.com 7 IRFZ46NS/LPbF D2Pak Package Outline D2Pak Part Marking Information (Lead-Free) T H I S IS AN IR F 5 30 S WIT H L OT COD E 8 02 4 AS S E MB L E D ON WW 02 , 20 00 IN T H E AS S E MB L Y L IN E "L " IN T E R N AT IONAL R E CT I F IE R L OGO N ote: "P " in as s embly line pos ition indicates "L ead-F ree" P AR T N U MB E R F 53 0S AS S E MB L Y L OT COD E D AT E CODE YE AR 0 = 20 00 WE E K 0 2 L IN E L OR INT E R NAT ION AL R E CT IF IE R L OGO AS S E MB L Y L OT COD E 8 P AR T N U MB E R F 53 0S DAT E COD E P = DE S IGNAT E S L E AD -F R E E P R ODU CT (OP T IONAL ) YE AR 0 = 2000 WE E K 02 A = AS S E MB L Y S IT E COD E www.irf.com IRFZ46NS/LPbF TO-262 Package Outline Dimensions are shown in millimeters (inches) TO-262 Part Marking Information E XAMP L E : T H IS IS AN IR L 3103L L OT CODE 1789 AS S E MB L E D ON WW 19, 1997 IN T H E AS S E MB L Y L INE "C" Note: "P " in as s embly line pos ition indicates "L ead-F ree" IN T E R NAT IONAL R E CT IF IE R L OGO AS S E MB L Y L OT CODE P AR T NU MB E R DAT E CODE YE AR 7 = 1997 WE E K 19 L INE C OR IN T E R NAT IONAL R E CT IF IE R L OGO AS S E MB L Y L OT CODE www.irf.com P AR T NU MB E R DAT E CODE P = DE S IGNAT E S L E AD-F R E E P R ODU CT (OP T IONAL ) YE AR 7 = 1997 WE E K 19 A = AS S E MB L Y S IT E CODE 9 IRFZ46NS/LPbF D2Pak Tape & Reel Information TR R 1 .6 0 (.0 6 3 ) 1 .5 0 (.0 5 9 ) 4 .1 0 ( .1 6 1 ) 3 .9 0 ( .1 5 3 ) F E E D D IR E C T IO N 1 .8 5 ( .0 7 3 ) 1 .6 5 ( .0 6 5 ) 1 .6 0 (.0 6 3 ) 1 .5 0 (.0 5 9 ) 1 1 .6 0 (.4 5 7 ) 1 1 .4 0 (.4 4 9 ) 0 .3 6 8 (.0 1 4 5 ) 0 .3 4 2 (.0 1 3 5 ) 1 5 .4 2 (.6 0 9 ) 1 5 .2 2 (.6 0 1 ) 2 4 .3 0 (.9 5 7 ) 2 3 .9 0 (.9 4 1 ) TR L 1 0 .9 0 (.4 2 9 ) 1 0 .7 0 (.4 2 1 ) 1 .7 5 (.0 6 9 ) 1 .2 5 (.0 4 9 ) 4 .7 2 (.1 3 6 ) 4 .5 2 (.1 7 8 ) 1 6 .1 0 ( .6 3 4 ) 1 5 .9 0 ( .6 2 6 ) F E E D D IR E C T IO N 1 3 .5 0 ( .5 3 2 ) 1 2 .8 0 ( .5 0 4 ) 2 7 .4 0 ( 1 .0 7 9 ) 2 3 .9 0 ( .9 4 1 ) 4 3 3 0 .0 0 ( 1 4 .1 7 3 ) M AX. NO TES : 1 . C O M F O R M S T O EIA-4 1 8 . 2 . C O N T R O L L IN G D IM EN S IO N : M IL L IM E T ER . 3 . D IM E N S IO N M E A S U R E D @ H U B . 4 . IN C L U D E S F L A N G E D IS T O R T IO N @ O U T E R E D G E . 6 0 .0 0 (2 .3 6 2 ) M IN . 3 0 .4 0 (1 .1 9 7 ) M AX. 2 6 .4 0 ( 1 .0 3 9 ) 2 4 .4 0 ( .9 6 1 ) 3 4 Data and specifications subject to change without notice. This product has been designed and qualified for the industrial market. Qualification Standards can be found on IR's Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 4/04 10 www.irf.com Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/