© 2000 Fairchild Semiconductor Corporation DS012466 www.fairchildsemi.com
May 1995
Revised September 2000
74LCX257 Low Voltage Quad 2-Input Multi plexer with 5V Tolerant Inputs and Outputs
74LCX257
Low Voltage Quad 2-Input Multiplexer
with 5V Tolerant Inputs and Outputs
General Description
The LCX257 is a quad 2-input multiplexer with 3-STATE
outputs. Four bits of data from two sources can be selected
using a Common Data Select input. The four outputs
present the selected data in true (non inverted ) form. The
outputs may be switched to a high impedance state by
placing a logic HIGH on the common Output Enable (OE)
input, allo w ing th e ou tpu ts to i nt erf ace d i rec tly with bus-ori-
ented systems.
The 74LCX257 is fabricated with advanced CMOS technol-
ogy to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
5V tolerant inputs and outputs
2.3V–3. 6V VCC specifications provided
6.0 ns tPD max (VCC = 3.3V, In Zn), 10 µA ICC max
Power down high impedance inputs and outputs
Supports live insertion/withdrawal (Note 1)
Implements patented noise/EMI reduction circuitry
Latch-up per for man c e exce eds 500 mA
ESD performa nce :
Human body model > 2000V
Machine model > 200V
Note 1: To ensure the high-impedance state during power up or down, OE
should be tied to VCC throug h a pull- up resist or: the min imum value or the
resisto r is det ermin ed by the current-so urc ing capability of th e driver.
Ordering Code:
Devices also available in Tape and R eel. Speci fy by appending the s uffix let t er X to the ordering code.
Logic Symbols
IEEE/IEC
Connection Diagram
Pin Descriptions
Order Number Package Number Package Description
74LCX257M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
74LCX257SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LCX257MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pin Names Description
S Common Data Select Input
OE 3-STATE Output Enab le Input
I0aI0d Data Inputs from Source 0
I1aI1d Data Inputs from Source 1
ZaZd3-STATE Multiplexer Outputs
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74LCX257
Functional Description
The LCX257 is a quad 2-input multiplexer with 3-STATE
outputs. It sel ects fo ur bits of dat a from two so urces u nder
control of a Common Data Select input. When the Select
input is LOW, the I0x inputs are selected and when Select
is HIGH, the I1x inputs are selected. The data on the
selected inputs appears at the outputs in true (non
inver ted) form. The device is th e logic imple mentati on of a
4-pole, 2 -po siti on swit ch whe re the po sition of the sw itch is
determ ined by the l ogic level s sup plied to the S elect i nput.
The logic equations for the outputs are shown below:
Za = OE (11a S + I0a S)
Zb = OE (11b S + I0b S)
Zc = OE (11c S + I0c S)
Zd = OE (11d S + I0d S)
When the Output Enable (OE) is HIGH, the outputs are
forced to a high impedance state. If the outputs are tied
togethe r, all but o ne de vice m ust be i n the hig h i m pe dan ce
state to avoid high currents that would exceed the maxi-
mum ratings. Des igners sh ould ensure the Ou tput Enable
signals to 3-STATE devices whose outputs are tied
together are designed so there is no overlap.
Truth Table
H = HIGH Voltage Lev el
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation d elays.
Output Select Data Outputs
Enable Input Inputs
OE SI
0I1Z
HXXXZ
LHXLL
LHXHH
LLLXL
LLHXH
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74LCX257
Absolute Maximum Ratings(Note 1)
Recommended Operating Conditions (Note 4)
Note 2: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be op erated
at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The Recom-
mended Operating Conditions table will define th e c onditions fo r ac t ual device operati on.
Note 3: IO Absolu te Maximu m rating must be observed.
Note 4: Unused Inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol Parameter Value Conditions Units
VCC Supply Voltage 0.5 to +7.0 V
VIDC Input Voltage 0.5 to +7.0 V
VODC Output Voltage 0.5 to +7.0 Output in 3-STATE V
0.5 to VCC + 0.5 Output in HIGH or LOW State (Note 2)
IIK DC Input Diode Current 50 VI < GND mA
IOK DC Output Diode Current 50 VO < GND mA
+50 VO > VCC
IODC Output Source/Sink Current ±50 mA
ICC DC Supply Current per Supply Pin ±100 mA
IGND DC Ground Current per Ground Pin ±100 mA
TSTG Stora ge Tem per atu re 65 to +150 °C
Symbol Parameter Min Max Units
VCC Supply Voltage Operating 2.0 3.6 V
Data Retention 1.5 3.6
VIInput Voltage 05.5V
VOOutput Voltag e HIGH or LOW State 0 VCC V
3-STATE 0 5.5
IOH/IOL Output Curr en t VCC = 3.0V 3.6V ±24
VCC = 2.7V 3.0V ±12 mA
VCC = 2.3V 2.7V ±8
TAFree-Air Operating Temperature 40 85 °C
t/V Input Edge Rate, VIN = 0.8 V2.0V, VCC = 3.0V 0 10 ns/V
Symbol Parameter Conditions VCC TA = 40°C to +85°CUnits
(V) Min Max
VIH HIGH Level Input Voltage 2.3 2.7 1.7 V
2.7 3.6 2.0
VIL LOW Level Input Voltage 2.3 2.7 0.7 V
2.7 3.6 0.8
VOH HIGH Level Output Voltage IOH = 100 µA2.3 3.6 VCC 0.2
V
IOH = 8 mA 2.3 1.8
IOH = 12 mA 2.7 2.2
IOH = 18 mA 3.0 2.4
IOH = 24 mA 3.0 2.2
VOL LOW Level Output Voltage IOL = 100 µA2.3 3.6 0.2
V
IOL = 8 mA 2.3 0.6
IOL = 12 mA 2.7 0.4
IOL = 16 mA 3.0 0.4
IOL = 24 mA 3.0 0.55
IIInput Leakage Current 0 VI 5.5V 2.3 3.6 ±5.0 µA
IOZ 3-STATE Output Leakage 0 VO 5.5V 2.3 3.6 ±5.0 µA
VI = VIH or VIL
IOFF Power-Off Leakage Current VI or VO = 5.5V 0 10 µA
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74LCX257
DC Electrical Characteristics (Continued)
Note 5: Outputs dis abled or 3-STATE o nly.
AC Electrical Characteristics
Note 6: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specif ic ation ap plies to an y o ut puts switc hing in the s am e directi on, eit her HIGH-to-L OW (t OSHL) or LOW-to-H I GH (tOSLH).
Dynamic Switching Characteristics
Capacitance
Symbol Parameter Conditions VCC TA = 40°C to +85°CUnits
(V) Min Max
ICC Quiescent Supply Current VI = VCC or GND 2.3 3.6 10 µA
3.6V VI, VO 5.5V (Note 5) 2.3 3.6 ±10
ICC Increase in ICC per Input VIH = VCC 0.6V 2.3 3.6 500 µA
Symbol Parameter
TA = 40°C to +85°C, RL = 500
Units
VCC = 3.3V ± 0.3V VCC = 2.7V VCC = 2.5V ± 0.2V
CL= 50 pF CL = 50 pF CL= 30 pF
Min Max Min Max Min Max
tPHL Propagation Delay 1.5 7.0 1.5 8.5 1 .5 9.1 ns
tPLH SZn1.57.01.58.51.59.1
tPHL Propagation Delay 1.5 6.0 1.5 6.5 1 .5 7.2 ns
tPLH InZn1.56.01.56.51.57.2
tPZL Output Enable Time 1.5 7.0 1.5 8.5 1.5 9.1 ns
tPZH OE Zn1.57.01.58.51.59.1
tPLZ Output Disable Time 1.5 5.5 1.5 6.0 1.5 6.6 ns
tPHZ OE Zn1.55.51.56.01.56.6
tOSHL Output to Output Skew (Note 6) 1.0 ns
tOSLH 1.0
Symbol Parameter Conditions VCC TA = 25°CUnits
(V) Typical
VOLP Quiet Output Dynamic Peak VOL CL = 50 pF, VIH = 3.3V, VIL = 0V 3.3 0.8 V
CL = 30 pF, VIH = 2.5V, VIL = 0V 2.5 0.6
VOLV Quiet Output Dynamic Valley VOL CL = 50 pF, VIH = 3.3V, VIL = 0V 3.3 0.8 V
CL = 30 pF, VIH = 2.5V, VIL = 0V 2.5 0.6
Symbol Parameter Conditions Typical Units
CIN Input Capacitance VCC = Open, VI = 0V or VCC 7pF
COUT Output Capacitance VCC = 3.3V, VI = 0V or VCC 8pF
CPD Power Dissipation Capacitance VCC = 3.3V, VI = 0V or VCC, f = 10 MHz 25 pF
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74LCX257
AC LOADING and WAVEFORMS Generic for LCX Family
FIGURE 1. AC Test Circuit (CL includes prob e and jig capacitance)
Waveform for Inverting and Non-Inverting Functions
Propagation Delay. Pulse Width and trec Waveforms
3-STATE Output Low Enable and
Disable Times for Logic
3-STATE Output High Enable and
Disable Times for Logic
Setup Time, Hold Time and Recovery Time for Logic
trise and tfall
FIGURE 2. Waveforms
(Input Characteristics; f =1MHz, tR = tF = 3ns)
Test Switch
tPLH, tPHL Open
tPZL, tPLZ 6V at VCC = 3.3 ± 0.3V
VCC x 2 at VCC = 2.5 ± 0.2V
tPZH,tPHZ GND
Symbol VCC
3.3V ± 0.3V 2.7V 2.5V ± 0.2V
Vmi 1.5V 1.5V VCC/2
Vmo 1.5V 1.5V VCC/2
VxVOL + 0.3V VOL + 0.3V VOL + 0.15V
VyVOH 0.3V VOH 0.3V VOH 0.15V
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74LCX257
Schematic D ia gr a m Generic for LCX Family
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74LCX257
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
Package Number M16A
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74LCX257
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Sma ll Outline Packag e (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M16D
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74LCX257 Low Voltage Quad 2-Input Multi plexer with 5V Tolerant Inputs and Outputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lea d Th in S hri n k Small Ou tlin e Pack age (TSSOP ), JED EC MO-1 53, 4.4mm Wide
Package Number MTC16
Fairchild does not assume an y responsibility fo r use of any circuitry described, no circuit pat ent licenses ar e implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life suppor t de vices o r syst ems are dev ic es or syste ms
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instruct ions fo r use pr ovi de d in the l abe ling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A crit ical componen t in any com ponen t of a life s uppor t
device or system whose failure to perform can be rea-
sonabl y e xpec ted to cause th e fa i lure of the l ife s upport
device or system, or to affect its safety or effectiveness.
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