SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
DUAL PERIPHERAL DRIVERS
SLRS021B – DECEMBER 1976 – REVISED SEPTEMBER 1999
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
PERIPHERAL DRIVERS FOR
HIGH-CURRENT SWITCHING AT
VERY HIGH SPEEDS
D
Characterized for Use to 300 mA
D
High-Voltage Outputs
D
No Output Latch-Up at 20 V (After
Conducting 300 mA)
D
High-Speed Switching
D
Circuit Flexibility for Varied Applications
D
TTL-Compatible Diode-Clamped Inputs
D
Standard Supply Voltages
D
Plastic DIP (P) With Copper Lead Frame
Provides Cooler Operation and Improved
Reliability
D
Package Options Include Plastic
Small-Outline Packages, Ceramic Chip
Carriers, and Standard Plastic and Ceramic
300-mil DIPs
SUMMARY OF DEVICES
DEVICE LOGIC OF
COMPLETE CIRCUIT PACKAGES
SN55451B AND FK, JG
SN55452B NAND JG
SN55453B OR FK, JG
SN55454B NOR JG
SN75451B AND D, P
SN75452B NAND D, P
SN75453B OR D, P
SN75454B NOR D, P
description
The SN55451B through SN55454B and SN75451B through SN75454B are dual peripheral drivers designed
for use in systems that employ TTL logic. This family is functionally interchangeable with and replaces the
SN75450 family and the SN75450A family devices manufactured previously . The speed of the devices is equal
to that of the SN75450 family, and the parts are designed to ensure freedom from latch-up. Diode-clamped
inputs simplify circuit design. T ypical applications include high-speed logic buffers, power drivers, relay drivers,
lamp drivers, MOS drivers, line drivers, and memory drivers.
The SN55451B/SN75451B, SN55452B/SN75452B, SN55453B/SN75453B, and SN55454B/SN75454B are
dual peripheral AND, NAND, OR, and NOR drivers, respectively (assuming positive logic), with the output of
the logic gates internally connected to the bases of the npn output transistors.
The SN55’ drivers are characterized for operation over the full military range of –55°C to 125°C. The SN75’
drivers are characterized for operation from 0°C to 70°C.
Copyright 1999, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
2
3
4
8
7
6
5
1A
1B
1Y
GND
VCC
2B
2A
2Y
SN55451B, SN55452B,
SN55453B, SN55454B . . . JG PACKAGE
SN75451B, SN75452B,
SN75453B, SN75454B ...D OR P PACKAGE
(TOP VIEW)
3 2 1 20 19
910111213
4
5
6
7
8
18
17
16
15
14
NC
2B
NC
2A
NC
NC
1B
NC
1Y
NC
SN55451B, SN55452B
SN55453B, SN55454B . . . FK PACKAGE
(TOP VIEW)
NC
1A
NC
NC NC
NC
GND
NC
NC – No internal connection
CC
V
2Y
SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
DUAL PERIPHERAL DRIVERS
SLRS021B – DECEMBER 1976 – REVISED SEPTEMBER 1999
2POST OFFICE BOX 655303 DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
SN55’ SN75’ UNIT
Supply voltage, VCC (see Note 1) 7 7 V
Input voltage, VI5.5 5.5 V
Inter-emitter voltage (see Note 2) 5.5 5.5 V
Off-state output voltage, VO30 30 V
Continuous collector or output current, IOK (see Note 3) 400 400 mA
Peak collector or output current, II (tw 10 ms, duty cycle 50%, see Note 4) 500 500 mA
Continuous total power dissipation See Dissipation Rating Table
Operating free-air temperature range, TA55 to 125 0 to 70 °C
Storage temperature range, Tstg 65 to 150 65 to 150 °C
Case temperature for 60 seconds FK package 260 °C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds JG package 300 °C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds D or P package 260 °C
NOTES: 1. Voltage values are with respect to network GND, unless otherwise specified.
2. This is the voltage between two emitters of a multiple-emitter transistor.
3. This value applies when the base-emitter resistance (RBE) is equal to or less than 500 .
4. Both halves of these dual circuits may conduct rated current simultaneously; however , power dissipation averaged over a short time
interval must fall within the continuous dissipation rating.
DISSIPATION RATING TABLE
PACKAGE
T
A
25°CDERATING F ACTOR T
A
= 70°C T
A
= 125°C
PACKAGE
A
POWER RATING ABOVE TA = 25°C
A
POWER RATING
A
POWER RATING
D725 mW 5.8 mW/°C464 mW
FK 1375 mW 11.0 mW/°C 880 mW 275 mW
JG 1050 mW 8.4 mW/°C 672 mW 210 mW
P1000 mW 8.0 mW/°C640 mW
recommended operating conditions
SN55’ SN75’
UNIT
MIN NOM MAX MIN NOM MAX
UNIT
Supply voltage, VCC 4.5 5 5.5 4.75 5 5.25 V
High-level input voltage, VIH 2 2 V
Low-level input voltage, VIL 0.8 0.8 V
Operating free-air temperature, TA–55 125 0 70 °C
SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
DUAL PERIPHERAL DRIVERS
SLRS021B – DECEMBER 1976 – REVISED SEPTEMBER 1999
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
logic symbol
&
5
3
2B
2A
1B
1A
2Y
1Y
7
6
2
1
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC publication 617-12.
Pin numbers shown are for the D, JG, and P packages.
logic diagram (positive logic)
2B
2A
1B
1A
4
5
3
GND
2Y
1Y
7
6
2
1
FUNCTION TABLE
(each driver)
AB Y
L L L (on state)
LH L (on state)
HL L (on state)
H H H (off state)
positive logic:
Y = AB or A+B
electrical characteristics over recommended operating free-air temperature range
PARAMETER
TEST CONDITIONS
SN55451B SN75451B
UNIT
PARAMETER
TEST
CONDITIONS
MIN TYP§MAX MIN TYP§MAX
UNIT
VIK Input clamp voltage VCC = MIN, II = –12 mA 1.2 1.5 1.2 1.5 V
VCC = MIN, VIL = 0.8 V,
025
05
025
04
VOL
p
CC
IOL = 100 mA
IL
0
.
25
0
.
5
0
.
25
0
.
4
V
V
OL
w-
v
u
u
v
VCC = MIN, VIL = 0.8 V,
05
08
05
07
V
CC
IOL = 300 mA
IL
0
.
5
0
.
8
0
.
5
0
.
7
IOH
p
VCC = MIN, VIH = MIN,
300
100
µA
I
OH
-
v
u
u
u
CC
VOH = 30 V
IH
300
100
µ
A
IIInput current at maximum input voltage VCC = MAX, VI = 5.5 V 1 1 mA
IIH High-level input current VCC = MAX, VI = 2.4 V 40 40 µA
IIL Low-level input current VCC = MAX, VI = 0.4 V –1 1.6 –1 1.6 mA
ICCH Supply current, outputs high VCC = MAX, VI = 5 V 711 711 mA
ICCL Supply current, outputs low VCC = MAX, VI = 0 52 65 52 65 mA
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
§All typical values are at VCC = 5 V, TA = 25°C.
switching characteristics, VCC = 5 V, TA = 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH Propagation delay time, low-to-high-level output 18 25
tPHL Propagation delay time, high-to-low-level output IO 200 mA, CL = 15 pF, 18 25
ns
tTLH T ransition time, low-to-high-level output
O
RL = 50 ,
L
See Figure 1 5 8
ns
tTHL T ransition time, high-to-low-level output 7 12
VOH
High level out
p
ut voltage after switching
SN55451B V
S
= 20 V, I
O
300 mA, VS6.5
mV
V
OH
High
-
le
v
el
o
u
tp
u
t
v
oltage
after
s
w
itching
SN75451B
S,
See Figure 2
O,
VS6.5
mV
VCC
A
GND
Y
500
1 k
B
4 k1.6 k130
Resistor values shown are nominal.
schematic (each driver)
SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
DUAL PERIPHERAL DRIVERS
SLRS021B – DECEMBER 1976 – REVISED SEPTEMBER 1999
4POST OFFICE BOX 655303 DALLAS, TEXAS 75265
logic symbol
&
5
3
2B
2A
1B
1A
2Y
1Y
7
6
2
1
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC publication 617-12.
Pin numbers shown are for the D, JG, and P packages.
logic diagram (positive logic)
2B
2A
1B
1A
4
5
3
GND
2Y
1Y
7
6
2
1
FUNCTION TABLE
(each driver)
A B Y
L L H (off state)
LH H (off state)
HL H (off state)
H H L (on state)
positive logic:
Y = AB or A+B
electrical characteristics over recommended operating free-air temperature range
PARAMETER
TEST CONDITIONS
SN55452B SN75452B
UNIT
PARAMETER
TEST
CONDITIONS
MIN TYP§MAX MIN TYP§MAX
UNIT
VIK Input clamp voltage VCC = MIN, II = –12 mA 1.2 1.5 1.2 1.5 V
V
CC
= MIN, V
IH
= MIN,
025
05
025
04
VOL
p
CC ,
IOL = 100 mA
IH ,
0
.
25
0
.
5
0
.
25
0
.
4
V
V
OL
w-
v
u
u
v
V
CC
= MIN, V
IH
= MIN,
05
08
05
07
V
CC ,
IOL = 300 mA
IH ,
0
.
5
0
.
8
0
.
5
0
.
7
IOH
p
V
CC
= MIN, V
IL
= 0.8 V,
300
100
µA
I
OH
-
v
u
u
u
CC ,
VOH = 30 V
IL ,
300
100
µ
A
IIInput current at maximum input voltage VCC = MAX, VI = 5.5 V 1 1 mA
IIH High-level input current VCC = MAX, VI = 2.4 V 40 40 µA
IIL Low-level input current VCC = MAX, VI = 0.4 V 1.1 1.6 1.1 1.6 mA
ICCH Supply current, outputs high VCC = MAX, VI = 0 11 14 11 14 mA
ICCL Supply current, outputs low VCC = MAX, VI = 5 V 56 71 56 71 mA
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
§All typical values are at VCC = 5 V, TA = 25°C.
switching characteristics, VCC = 5 V, TA = 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH Propagation delay time, low-to-high-level output 26 35
tPHL Propagation delay time, high-to-low-level output IO 200 mA, CL = 15 pF, 24 35
ns
tTLH T ransition time, low-to-high-level output
O
RL = 50 ,
L
See Figure 1 5 8
ns
tTHL T ransition time, high-to-low-level output 7 12
VOH
High level out
p
ut voltage after switching
SN55452B V
S
= 20 V, I
O
300 mA, VS6.5
mV
V
OH
High
-
le
v
el
o
u
tp
u
t
v
oltage
after
s
w
itching
SN75452B
S,
See Figure 2
O,
VS6.5
mV
VCC
A
GND
Y
500
1 k
B
4 k1.6 k130
schematic (each driver)
Resistor values shown are nominal.
1 k
1.6 k
SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
DUAL PERIPHERAL DRIVERS
SLRS021B – DECEMBER 1976 – REVISED SEPTEMBER 1999
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
logic symbol
1
5
3
2B
2A
1B
1A
2Y
1Y
7
6
2
1
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC publication 617-12.
Pin numbers shown are for the D, JG, and P packages.
logic diagram (positive logic)
2B
2A
1B
1A
4
5
3
GND
2Y
1Y
7
6
2
1
FUNCTION TABLE
(each driver)
AB Y
L L L (on state)
LH H (off state)
HL H (off state)
H H H (off state)
positive logic:
Y = A+B or A B
electrical characteristics over recommended operating free-air temperature range
PARAMETER
TEST CONDITIONS
SN55453B SN75453B
UNIT
PARAMETER
TEST
CONDITIONS
MIN TYP§MAX MIN TYP§MAX
UNIT
VIK Input clamp voltage VCC = MIN, II = –12 mA 1.2 1.5 1.2 1.5 V
V
CC
= MIN, VIL = 0.8 V,
025
05
025
04
VOL
Low level out
p
ut voltage
CC ,
IOL = 100 mA
IL
0
.
25
0
.
5
0
.
25
0
.
4
V
V
OL
Lo
w-
le
v
el
o
u
tp
u
t
v
oltage
V
CC
= MIN, VIL = 0.8 V,
05
08
05
07
V
CC ,
IOL = 300 mA
IL
0
.
5
0
.
8
0
.
5
0
.
7
IOH
High level out
p
ut current
V
CC
= MIN, V
IH
= MIN,
300
100
µA
I
OH
High
-
le
v
el
o
u
tp
u
t
c
u
rrent
CC ,
VOH = 30 V
IH ,
300
100
µ
A
IIInput current at maximum input voltage VCC = MAX, VI = 5.5 V 1 1 mA
IIH High-level input current VCC = MAX, VI = 2.4 V 40 40 µA
IIL Low-level input current VCC = MAX, VI = 0.4 V –1 1.6 –1 1.6 mA
ICCH Supply current, outputs high VCC = MAX, VI = 5 V 811 811 mA
ICCL Supply current, outputs low VCC = MAX, VI = 0 54 68 54 68 mA
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
§All typical values are at VCC = 5 V, TA = 25°C.
switching characteristics, VCC = 5 V, TA = 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH Propagation delay time, low-to-high-level output 18 25
tPHL Propagation delay time, high-to-low-level output I
O
200 mA, C
L
= 15 pF, 18 25
ns
tTLH T ransition time, low-to-high-level output
O,
RL = 50 ,
L,
See Figure 1 5 8
ns
tTHL T ransition time, high-to-low-level output 7 12
VOH
High level out
p
ut voltage after switching
SN55453B VS = 20 V, IO 300 mA, VS6.5
mV
V
OH
High
-
le
v
el
o
u
tp
u
t
v
oltage
after
s
w
itching
SN75453B
S
See Figure 2
O
VS6.5
mV
schematic (each driver)
Resistor values shown are nominal.
VCC
A
GND
Y
500
1 k
B
4 k1.6 k130
4 k
SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
DUAL PERIPHERAL DRIVERS
SLRS021B – DECEMBER 1976 – REVISED SEPTEMBER 1999
6POST OFFICE BOX 655303 DALLAS, TEXAS 75265
logic symbol
5
3
2B
2A
1B
1A
2Y
1Y
7
6
2
1
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC publication 617-12.
Pin numbers shown are for the D, JG, and P packages.
1
logic diagram (positive logic)
2B
2A
1B
1A
4
5
3
GND
2Y
1Y
7
6
2
1
FUNCTION TABLE
(each driver)
AB Y
L L H (off state)
LH L (on state)
HL L (on state)
H H L (on state)
positive logic:
Y = A+B or AB
electrical characteristics over recommended operating free-air temperature range
PARAMETER
TEST CONDITIONS
SN55454B SN75454B
UNIT
PARAMETER
TEST
CONDITIONS
MIN TYP§MAX MIN TYP§MAX
UNIT
VIK Input clamp voltage VCC = MIN, II = –12 mA 1.2 1.5 1.2 1.5 V
V
CC
= MIN, V
IH
= MIN,
025
05
025
04
VOL
Low level out
p
ut voltage
CC ,
IOL = 100 mA
IH ,
0
.
25
0
.
5
0
.
25
0
.
4
V
V
OL
Lo
w-
le
v
el
o
u
tp
u
t
v
oltage
V
CC
= MIN, V
IH
= MIN,
05
08
05
07
V
CC ,
IOL = 300 mA
IH ,
0
.
5
0
.
8
0
.
5
0
.
7
IOH
High level out
p
ut current
V
CC
= MIN, V
IL
= 0.8 V,
300
100
µA
I
OH
High
-
le
v
el
o
u
tp
u
t
c
u
rrent
CC ,
VOH = 30 V
IL ,
300
100
µ
A
IIInput current at maximum input voltage VCC = MAX, VI = 5.5 V 1 1 mA
IIH High-level input current VCC = MAX, VI = 2.4 V 40 40 µA
IIL Low-level input current VCC = MAX, VI = 0.4 V –1 1.6 –1 1.6 mA
ICCH Supply current, outputs high VCC = MAX, VI = 0 13 17 13 17 mA
ICCL Supply current, outputs low VCC = MAX, VI = 5 V 61 79 61 79 mA
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
§All typical values are at VCC = 5 V, TA = 25°C.
switching characteristics, VCC = 5 V, TA = 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH Propagation delay time, low-to-high-level output 27 35
tPHL Propagation delay time, high-to-low-level output I
O
200 mA, C
L
= 15 pF, 24 35
ns
tTLH T ransition time, low-to-high-level output
O,
RL = 50 ,
L,
See Figure 1 5 8
ns
tTHL T ransition time, high-to-low-level output 7 12
VOH
High level out
p
ut voltage after switching
SN55454B VS = 20 V, IO 300 mA, VS6.5
mV
V
OH
High
-
le
v
el
o
u
tp
u
t
v
oltage
after
s
w
itching
SN75454B
S
See Figure 2
O
VS6.5
mV
4
k1.6
k
2 k
schematic (each driver)
Resistor values shown are nominal.
VCC
A
GND
Y
500 1 k
B
4 k2 k130
1 k
SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
DUAL PERIPHERAL DRIVERS
SLRS021B – DECEMBER 1976 – REVISED SEPTEMBER 1999
7
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
GND
Pulse
Generator
(see Note A)
2.4 VInput
SUB
Circuit
Under
Test
10% 10%
90%90%
1.5 V1.5 V
5 ns
90% 90%
10%10%
1.5 V1.5 V
0.5 µs
10% 10%
90%90% 50% 50%
tPHL tPLH
tTHL
3 V
0 V
3 V
0 V
VOH
VO
L
Output
Input
TEST CIRCUIT
VOLTAGE WAVEFORMS
’451B
’452B
’453B
’454B
0.4 V
CL = 15 pF
(see Note B)
Output
10 V
RL = 50
10 ns
5 ns 10 ns
tTLH
’451B
’453B
Input
’452B
’454B
NOTES: A. The pulse generator has the following characteristics: PRR 1 MHz, ZO = 50 .
B. CL includes probe and jig capacitance.
Figure 1. Test Circuit and Voltage Waveforms, Complete Drivers
GND
2.4 VInput
SUB
90%90%
1.5 V1.5 V
5 ns
90% 90%
10%10%
1.5 V1.5 V
40 µs
10% 10%
3 V
0 V
3 V
0 V
VOH
Output
Input
TEST CIRCUIT VOLTAGE WAVEFORMS
’451B
’452B
’453B
’454B
0.4 V
Output
VS = 20 V 10 ns
5 ns 10 ns
’451B
’453B
Input
’452B
’454B
65
2 mH
1N3064
5 V
VO
L
Pulse
Generator
(see Note A) Circuit
Under
Test CL = 15 pF
(see Note B)
NOTES: A. The pulse generator has the following characteristics: PRR 12.5 kHz, ZO = 50 .
B. CL includes probe and jig capacitance.
Figure 2. Test Circuit and Voltage Waveforms for Latch-Up Test of Complete Drivers
SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
DUAL PERIPHERAL DRIVERS
SLRS021B – DECEMBER 1976 – REVISED SEPTEMBER 1999
8POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
IC – Collector Current – mA
TRANSISTOR
COLLECTOR-EMITTER SATURATION VOLTAGE
vs
COLLECTOR CURRENT
VCE(sat) – Collector-Emitter Saturation Voltage – V
10
0.6
400
0
0.1
0.2
0.3
0.4
0.5
20 40 70 100 200
IC
IB
CE(sat)
V
= 10
TA = 25°C
TA = 0°C
TA = 70°C
See Note A
Figure 3
NOTE A: These parameters must be measured using pulse techniques,
tw = 300 µs, duty cycle 2%.
PACKAGE OPTION ADDENDUM
www.ti.com 25-Jan-2012
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
5962-9563301Q2A ACTIVE LCCC FK 20 1 TBD Call TI Call TI
5962-9563301QPA ACTIVE CDIP JG 8 1 TBD Call TI Call TI
77049012A ACTIVE LCCC FK 20 1 TBD Call TI Call TI
7704901PA ACTIVE CDIP JG 8 1 TBD Call TI Call TI
77049022A ACTIVE LCCC FK 20 1 TBD Call TI Call TI
7704902PA ACTIVE CDIP JG 8 1 TBD Call TI Call TI
JM38510/12902BPA ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type
JM38510/12903BPA ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type
JM38510/12905BPA ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type
M38510/12902BPA ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type
M38510/12903BPA ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type
M38510/12905BPA ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type
SN55451BJG ACTIVE CDIP JG 8 50 TBD A42 N / A for Pkg Type
SN55452BJG ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type
SN55453BJG ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type
SN55454BJG ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type
SN75451BD ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75451BDE4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75451BDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75451BDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75451BDRE4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75451BDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75451BP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
SN75451BPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
PACKAGE OPTION ADDENDUM
www.ti.com 25-Jan-2012
Addendum-Page 2
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
SN75451BPSR ACTIVE SO PS 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75451BPSRE4 ACTIVE SO PS 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75451BPSRG4 ACTIVE SO PS 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75452BD ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75452BDE4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75452BDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75452BDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75452BDRE4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75452BDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75452BP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
SN75452BPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
SN75452BPSR ACTIVE SO PS 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75452BPSRE4 ACTIVE SO PS 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75452BPSRG4 ACTIVE SO PS 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75453BD ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75453BDE4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75453BDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75453BDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75453BDRE4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PACKAGE OPTION ADDENDUM
www.ti.com 25-Jan-2012
Addendum-Page 3
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
SN75453BDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75453BP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
SN75453BPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
SN75453BPSR ACTIVE SO PS 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75453BPSRE4 ACTIVE SO PS 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75453BPSRG4 ACTIVE SO PS 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75454BD ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75454BDE4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75454BDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75454BDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75454BDRE4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75454BDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75454BP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
SN75454BPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
SN75454BPSR ACTIVE SO PS 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75454BPSRE4 ACTIVE SO PS 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75454BPSRG4 ACTIVE SO PS 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SNJ55451BFK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
SNJ55451BJG ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type
SNJ55452BFK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
SNJ55452BJG ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type
SNJ55453BFK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
PACKAGE OPTION ADDENDUM
www.ti.com 25-Jan-2012
Addendum-Page 4
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
SNJ55453BJG ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type
SNJ55454BFK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
SNJ55454BJG ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN55451B, SN55452B, SN55453B, SN55454B, SN75451B, SN75452B, SN75453B, SN75454B :
Catalog: SN75451B, SN75452B, SN75453B, SN75454B
Military: SN55451B, SN55452B, SN55453B, SN55454B
NOTE: Qualified Version Definitions:
PACKAGE OPTION ADDENDUM
www.ti.com 25-Jan-2012
Addendum-Page 5
Catalog - TI's standard catalog product
Military - QML certified for Military and Defense Applications
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
SN75451BDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
SN75451BPSR SO PS 8 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1
SN75452BDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
SN75452BPSR SO PS 8 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1
SN75453BDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
SN75453BPSR SO PS 8 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1
SN75454BDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
SN75454BPSR SO PS 8 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN75451BDR SOIC D 8 2500 340.5 338.1 20.6
SN75451BPSR SO PS 8 2000 367.0 367.0 38.0
SN75452BDR SOIC D 8 2500 340.5 338.1 20.6
SN75452BPSR SO PS 8 2000 367.0 367.0 38.0
SN75453BDR SOIC D 8 2500 340.5 338.1 20.6
SN75453BPSR SO PS 8 2000 367.0 367.0 38.0
SN75454BDR SOIC D 8 2500 340.5 338.1 20.6
SN75454BPSR SO PS 8 2000 367.0 367.0 38.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUAR Y 1997
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE
0.310 (7,87)
0.290 (7,37)
0.014 (0,36)
0.008 (0,20)
Seating Plane
4040107/C 08/96
5
4
0.065 (1,65)
0.045 (1,14)
8
1
0.020 (0,51) MIN
0.400 (10,16)
0.355 (9,00)
0.015 (0,38)
0.023 (0,58)
0.063 (1,60)
0.015 (0,38)
0.200 (5,08) MAX
0.130 (3,30) MIN
0.245 (6,22)
0.280 (7,11)
0.100 (2,54)
0°–15°
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification.
E. Falls within MIL STD 1835 GDIP1-T8
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