1. General description
The 74HC540; 74HCT540 is an 8-bit inverting buffer/line driver with 3-state outputs. The
device features two output enables (OE1 and OE2). A HIGH on OEn causes the outputs
to assume a high-impedance OFF-state. Inputs include clamp diodes. This enables the
use of current limit ing res ist ors to interface inputs to voltages in excess of VCC.
2. Features and benefits
Inverting outputs
Complies with JEDEC standard no. 7A
Input levels:
For 74HC540: CMOS level
For 74HCT540: TTL level
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115 -A ex ce eds 20 0 V
Multiple package options
Specified from 40 C to +85 C and from 40 C to +125 C
3. Ordering information
74HC540; 74HCT540
Octal buffer/line driver; 3-state; inverting
Rev. 3 — 21 January 2013 Product data sheet
Table 1. Ordering information
Type number Package
Temp erature range Name Description Version
74HC540N 40 Cto+125C DIP20 plastic dual in-line package; 20 leads (300 mil) SOT146-1
74HCT540N
74HC540D 40 C to +125 C SO20 plastic small outline package; 20 leads;
body width 7.5 mm SOT163-1
74HCT540D
74HC540DB 40 Cto+125C SSOP20 plastic shrink small outline package; 20 leads;
body width 5.3 mm SOT339-1
74HCT540DB
74HC_HCT540 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 3 — 21 January 2013 2 of 18
NXP Semiconductors 74HC540; 74HCT540
Octal buffer/line driver; 3-state; inverting
4. Functional diagram
Fig 1. Logic symbol Fig 2. IEC logic symbol
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74HC_HCT540 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 3 — 21 January 2013 3 of 18
NXP Semiconductors 74HC540; 74HCT540
Octal buffer/line driver; 3-state; inverting
Fig 3. Functional diagram
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74HC_HCT540 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 3 — 21 January 2013 4 of 18
NXP Semiconductors 74HC540; 74HCT540
Octal buffer/line driver; 3-state; inverting
Fig 4. Logic diagra m
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74HC_HCT540 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 3 — 21 January 2013 5 of 18
NXP Semiconductors 74HC540; 74HCT540
Octal buffer/line driver; 3-state; inverting
5. Pinning information
5.1 Pinning
5.2 Pin description
6. Functional description
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
Fig 5. Pin configu ration DIP20, SO20 and SSOP20
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Table 2. Pin description
Symbol Pin Description
OE1 1 output enable input (active LOW )
A0 to A7 2, 3, 4, 5, 6, 7, 8, 9 data input
GND 10 ground (0 V)
Y0 to Y7 18, 17, 16, 15, 14, 13, 12, 11 data output
OE2 19 output enable input (activ e LOW )
VCC 20 supply voltage
Table 3. Functional table[1]
Control Input Output
OE1OE2An Yn
LL L H
LL H L
XH X Z
HX X Z
74HC_HCT540 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 3 — 21 January 2013 6 of 18
NXP Semiconductors 74HC540; 74HCT540
Octal buffer/line driver; 3-state; inverting
7. Limiting values
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For DIP20 packages: above 70 C the value of Ptot derates linearly with 12 mW/K.
For SO20 packages: above 70 C the value of Ptot derates linearly with 8 mW/K.
For SSOP20 packages: above 60 C the value of Ptot derates linearly with 5.5 mW/K.
8. Recommended operating conditions
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage 0.5 +7 V
IIK input clamping current VI < 0.5 V or VI>V
CC +0.5 V [1] -20 mA
IOK output clamping current VO<0.5 V or VO>V
CC +0.5V [1] -20 mA
IOoutput curren t 0.5 V < VO < VCC +0.5V - 35 mA
ICC supply current - 70 mA
IGND ground current 70 - mA
Tstg storage temperature 65 +150 C
Ptot total power dissipation [2]
DIP20 - 750 mW
SO20, SSOP20 - 500 mW
Table 5. Recommended operating con ditions
Voltages are referenced to GND (ground = 0 V)
Symbol Parameter Conditions 74HC540 74HCT540 Unit
Min Typ Max Min Typ Max
VCC supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 V
VIinput voltage 0 - VCC 0- V
CC V
VOoutput voltage 0 - VCC 0- V
CC V
Tamb ambient temperature 40 +25 +125 40 +25 +125 C
t/V input transition rise and fall rate VCC = 2.0 V - - 625 - - - ns/V
VCC = 4.5 V - 1.67 139 - 1.67 139 ns/V
VCC = 6.0 V--83---ns/V
74HC_HCT540 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 3 — 21 January 2013 7 of 18
NXP Semiconductors 74HC540; 74HCT540
Octal buffer/line driver; 3-state; inverting
9. Static characteristics
Table 6. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Tamb = 25 C Tamb = 40 C
to +85 CTamb = 40 C
to +125 CUnit
Min Typ Max Min Max Min Max
74HC540
VIH HIGH-level
input voltage VCC = 2.0 V 1.5 1.2 - 1.5 - 1.5 - V
VCC = 4.5 V 3.15 2.4 - 3.15 - 3.15 - V
VCC = 6.0 V 4.2 3.2 - 4.2 - 4.2 - V
VIL LOW-level
input voltage VCC = 2.0 V - 0.8 0.5 - 0.5 - 0.5 V
VCC = 4.5 V - 2.1 1.35 - 1.35 - 1.35 V
VCC = 6.0 V - 2.8 1.8 - 1.8 - 1.8 V
VOH HIGH-level
output voltage VI=V
IH or VIL
IO = 20 A; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V
IO = 20 A; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V
IO = 20 A; VCC = 6.0 V 5.9 6.0 - 5.9 - 5.9 - V
IO = 6.0 mA; VCC = 4.5 V 3.98 4.32 - 3.84 - 3.7 - V
IO = 7.8 mA; VCC = 6.0 V 5.48 5.81 - 5.34 - 5.2 - V
VOL LOW-level
output voltage VI=V
IH or VIL
IO = 20 A; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V
IO = 20 A; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V
IO = 20 A; VCC = 6.0 V - 0 0.1 - 0.1 - 0.1 V
IO = 6.0 mA; VCC = 4.5 V - 0.15 0.26 - 0.33 - 0.4 V
IO = 7.8 mA; VCC = 6.0 V - 0.16 0.26 - 0.33 - 0.4 V
IIinput leakage
current VI = VCC or GND; VCC =6.0V - - 0.1 - 1.0 - 1.0 A
IOZ OFF-state
output current per input pin; VI=V
IH or VIL;
VO=V
CC or GND;
other inputs at VCC or GND;
VCC =6.0V; I
O=0A
-0.5 - 5.0 - 10 - A
ICC supply current VI = VCC or GND; IO=0A;
VCC =6.0V - - 8.0 - 80 - 160 A
CIinput
capacitance -3.5- - - - - pF
74HCT540
VIH HIGH-level
input voltage VCC = 4.5 V to 5.5 V 2.0 1.6 - 2.0 - 2.0 - V
VIL LOW-level
input voltage VCC = 4.5 V to 5.5 V - 1.2 0.8 - 0.8 - 0.8 V
VOH HIGH-level
output voltage VI=V
IH or VIL; VCC = 4.5 V
IO = 20 A 4.4 4.5 - 4.4 - 4.4 - V
IO = 6.0 mA 3.98 4.32 - 3.84 - 3.7 - V
74HC_HCT540 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 3 — 21 January 2013 8 of 18
NXP Semiconductors 74HC540; 74HCT540
Octal buffer/line driver; 3-state; inverting
10. Dynamic characteristics
VOL LOW-level
output voltage VI=V
IH or VIL; VCC = 4.5 V
IO = 20 A; - 0 0.1 - 0.1 - 0.1 V
IO = 6.0 mA; - 0.16 0.26 - 0.33 - 0 .4 V
IIinput leakage
current VI = VCC or GND; VCC =5.5V - - 0.1 - 1.0 - 1.0 A
IOZ OFF-state
output current per input pin; VI=V
IH or VIL;
VO=V
CC or GND;
other inputs at VCC or GND;
VCC =5.5V; I
O=0A
--0.5 - 5.0 - 10 A
ICC supply current VI=V
CC or GND; IO = 0 A;
VCC =5.5V - - 8.0 - 80 - 160 A
ICC additional
supply current per input pin; IO=0A;
VI=V
CC 2.1 V;
other inputs at VCC or GND;
VCC = 4.5 V to 5.5 V
An input - 140 504 - 630 - 686 A
OE1 input - 150 540 - 675 - 735 A
OE2 input - 100 360 - 450 - 490 A
CIinput
capacitance -3.5- - - - - pF
Table 6. Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Tamb = 25 C Tamb = 40 C
to +85 CTamb = 40 C
to +125 CUnit
Min Typ Max Min Max Min Max
Table 7. Dynam ic characteristics
GND = 0 V; CL= 50 pF; for test circuit see Figure 8.
Symbol Parameter Conditions Tamb = 25 C Tamb = 40 C to +125 CUnit
Min Typ Max Max (85 C) Max (125 C)
74HC540
tpd propagation delay An to Yn; see Figure 6 [1]
VCC = 2.0 V - 30 100 125 150 ns
VCC = 4.5 V - 11 20 25 30 ns
VCC = 5.0 V; CL=15pF - 9 - - - ns
VCC = 6.0 V - 9 17 2 1 26 n s
ten enable time OEn to Yn ; see Figure 7 [1]
VCC = 2.0 V - 52 160 200 240 ns
VCC = 4.5 V - 19 32 40 48 ns
VCC = 6.0 V - 15 27 34 41 ns
tdis disable time OEn to Yn; see Figure 7 [1]
VCC = 2.0 V - 61 160 200 240 ns
VCC = 4.5 V - 22 32 40 48 ns
VCC = 6.0 V - 18 27 34 41 ns
74HC_HCT540 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 3 — 21 January 2013 9 of 18
NXP Semiconductors 74HC540; 74HCT540
Octal buffer/line driver; 3-state; inverting
[1] tpd is the same as tPLH and tPHL.
ten is the same as tPZL and tPZH.
tdis is the same as tPLZ and tPHZ.
[2] tt is the same as tTHL and tTLH.
[3] CPD is used to determine the dynamic power dissipation (PD in W):
PD=C
PD VCC2fiN+ (CLVCC2fo) where:
fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CLVCC2fo) = sum of outputs.
tttransition time see Figure 6 [2]
VCC = 2.0 V - 14 60 75 90 ns
VCC = 4.5 V - 5 12 15 18 ns
VCC = 6.0 V - 4 10 1 3 15 n s
CPD power dissipation
capacitance per package ;
VI=GNDtoV
CC
[3] -39- - - pF
74HCT540
tpd propagation delay An to Yn; see Figure 6 [1]
VCC = 4.5 V - 13 24 30 36 ns
VCC = 5.0 V; CL=15pF - 11 - - - ns
ten enable time OEn to Yn ; see Figure 7 [1]
VCC = 4.5 V - 22 35 44 53 ns
tdis disable time OEn to Yn; see Figure 7 [1]
VCC = 4.5 V - 23 35 44 53 ns
tttransition time VCC = 4.5 V; see Figure 6 [2] - 5 12 15 18 ns
CPD power dissipation
capacitance per package ;
VI=GNDtoV
CC 1.5 V [3] -44- - - pF
Table 7. Dynam ic characteristics
GND = 0 V; CL= 50 pF; for test circuit see Figure 8.
Symbol Parameter Conditions Tamb = 25 C Tamb = 40 C to +125 CUnit
Min Typ Max Max (85 C) Max (125 C)
74HC_HCT540 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 3 — 21 January 2013 10 of 18
NXP Semiconductors 74HC540; 74HCT540
Octal buffer/line driver; 3-state; inverting
11. Waveforms
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 6. Input to output propagation delays
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W7+/ W7/+
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W3+/
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Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 7. 3-state enable and disa b l e tim es
W3+=
RXWSXW
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)WR+,*+
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HQD
90
90
RXWSXWV
HQDEOHG
RXWSXWV
GLVDEOHG
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W3=/
9<
9;
90
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)WR/2:
Table 8. Measurement points
Type Input Output
VMVMVXVY
74HC540 0.5VCC 0.5VCC 0.1VCC 0.9VCC
74HCT540 1.3 V 1.3 V 0.1VCC 0.9VCC
74HC_HCT540 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 3 — 21 January 2013 11 of 18
NXP Semiconductors 74HC540; 74HCT540
Octal buffer/line driver; 3-state; inverting
Test data is given in Table 9.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator
CL = Load capacitance including jig and probe capacitance
RL = Load resistance
S1 = Test selection switch
Fig 8. Test circuit for measuring switching times
V
M
V
M
t
W
t
W
10 %
90 %
0 V
V
I
V
I
negative
pulse
positive
pulse
0 V
V
M
V
M
90 %
10 %
t
f
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r
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r
t
f
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CC
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open
G
Table 9. Test data
Type Input Load S1 position
VItr, tfCLRLtPHL, tPLH tPZH, tPHZ tPZL, tPLZ
74HC540 VCC 6ns 15pF, 50 pF 1kopen GND VCC
74HCT540 3 V 6 ns 15 pF, 50 pF 1 kopen GND VCC
74HC_HCT540 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 3 — 21 January 2013 12 of 18
NXP Semiconductors 74HC540; 74HCT540
Octal buffer/line driver; 3-state; inverting
12. Package outline
Fig 9. Package outline SOT146-1 (DIP20)
UNIT A
max. 1 2 b1cD E e M
H
L
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm
inches
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
SOT146-1 99-12-27
03-02-13
A
min. A
max. bZ
max.
w
ME
e1
1.73
1.30 0.53
0.38 0.36
0.23 26.92
26.54 6.40
6.22 3.60
3.05 0.2542.54 7.62 8.25
7.80 10.0
8.3 24.2 0.51 3.2
0.068
0.051 0.021
0.015 0.014
0.009 1.060
1.045 0.25
0.24 0.14
0.12 0.010.1 0.3 0.32
0.31 0.39
0.33 0.0780.17 0.02 0.13
SC-603MS-001
MH
c
(e )
1
ME
A
L
seating plane
A1
wM
b1
e
D
A2
Z
20
1
11
10
b
E
pin 1 index
0 5 10 mm
scale
Note
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
(1)
(1) (1)
DIP20: plastic dual in-line package; 20 leads (300 mil) SOT146-1
74HC_HCT540 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 3 — 21 January 2013 13 of 18
NXP Semiconductors 74HC540; 74HCT540
Octal buffer/line driver; 3-state; inverting
Fig 10. Package outline SOT163-1 (SO20)
UNIT A
max. A1A2A3bpcD
(1) E(1) (1)
eH
ELL
pQZ
ywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm
inches
2.65 0.3
0.1 2.45
2.25 0.49
0.36 0.32
0.23 13.0
12.6 7.6
7.4 1.27 10.65
10.00 1.1
1.0 0.9
0.4 8
0
o
o
0.25 0.1
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
1.1
0.4
SOT163-1
10
20
wM
bp
detail X
Z
e
11
1
D
y
0.25
075E04 MS-013
pin 1 index
0.1 0.012
0.004 0.096
0.089 0.019
0.014 0.013
0.009 0.51
0.49 0.30
0.29 0.05
1.4
0.055
0.419
0.394 0.043
0.039 0.035
0.016
0.01
0.25
0.01 0.004
0.043
0.016
0.01
0 5 10 mm
scale
X
θ
A
A1
A2
HE
Lp
Q
E
c
L
vMA
(A )
3
A
SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1
99-12-27
03-02-19
74HC_HCT540 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 3 — 21 January 2013 14 of 18
NXP Semiconductors 74HC540; 74HCT540
Octal buffer/line driver; 3-state; inverting
Fig 11. Package outline SOT339-1 (SSOP20)
UNIT A1A2A3bpcD
(1) E(1) eH
ELL
pQ(1)
Zywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.21
0.05 1.80
1.65 0.38
0.25 0.20
0.09 7.4
7.0 5.4
5.2 0.65 7.9
7.6 0.9
0.7 0.9
0.5 8
0
o
o
0.131.25 0.2 0.1
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.2 mm maximum per side are not included.
1.03
0.63
SOT339-1 MO-150 99-12-27
03-02-19
X
wM
θ
A
A1
A2
bp
D
HE
Lp
Q
detail X
E
Z
e
c
L
vMA
(A )
3
A
110
20 11
y
0.25
pin 1 index
0 2.5 5 mm
scale
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm SOT339-1
A
max.
2
74HC_HCT540 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 3 — 21 January 2013 15 of 18
NXP Semiconductors 74HC540; 74HCT540
Octal buffer/line driver; 3-state; inverting
13. Abbreviations
14. Revision history
Table 10. Abbreviations
Acronym Description
CMOS Complementary Metal-Oxide Semiconductor
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
LSTTL Low-power Schottky Transistor-Transistor Logic
MM Machine Model
Table 11. Revision history
Document ID Release date Data sheet statu s Change notice Supersedes
74HC_HCT540 v.3 20130121 Product data sheet - 74HC_HCT540_CNV v.2
Modifications: •The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
•Legal texts have been adapted to the new company name where appropriate.
74HC_HCT540_CNV v.2 19970905 Product specification - -
74HC_HCT540 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 3 — 21 January 2013 16 of 18
NXP Semiconductors 74HC540; 74HCT540
Octal buffer/line driver; 3-state; inverting
15. Legal information
15.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of de vice(s) descr ibed in th is docume nt may have cha nged since this docume nt was publis hed and ma y dif fer in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
15.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liab ility for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and tit le. A short data sh eet is intended
for quick reference only and shou ld not be rel ied u pon to cont ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short dat a sheet, the
full data sheet shall pre vail.
Product specificat io n — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to off er functions and qualities beyond those described in the
Product data sheet.
15.3 Disclaimers
Limited warr a nty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Se miconductors takes no
responsibility for the content in this document if provided by an inf ormation
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequ ential damages (including - wit hout limitatio n - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconduct ors’ aggregate and cumulat ive liability toward s
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all informa tion supplied prior
to the publication hereof .
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in perso nal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconducto rs products in such equipment or
applications and ther efore such inclu sion and/or use is at the cu stomer’s own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty tha t such application s will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and ope ration of their applications
and products using NXP Semiconductors product s, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole re sponsibility to determine whether the NXP
Semiconductors product is suit able and fit for the custome r’s applications and
products planned, as well as fo r the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associate d with t heir
applications and products.
NXP Semiconductors does not accept any liabil ity related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for th e customer’s applications and pro ducts using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress rating s only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanent ly and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individua l agreement. In case an individual
agreement is concluded only the ter ms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly object s to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing i n this document may be interpreted or
construed as an of fer t o sell product s that is open for accept ance or t he grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.
Product [short] dat a sheet Production This document contains the product specification.
74HC_HCT540 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 3 — 21 January 2013 17 of 18
NXP Semiconductors 74HC540; 74HCT540
Octal buffer/line driver; 3-state; inverting
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors prod uct is automotive qualified,
the product is not suitable for automotive use. It i s neither qua lified nor test ed
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automot ive specifications and standard s, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications , and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from custome r design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
15.4 Trademarks
Notice: All referenced b rands, produc t names, service names and trademarks
are the property of their respect i ve ow ners.
16. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
NXP Semiconductors 74HC540; 74HCT540
Octal buffer/line driver; 3-state; inverting
© NXP B.V. 2013. All rights reserved.
For more information, please visit: http://www.nxp.co m
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 21 January 2013
Document identifier: 74HC_HCT540
Please be aware that important notices concerning this document and the product(s)
described herei n, have been included in section ‘Legal information’.
17. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 1
4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
5 Pinning information. . . . . . . . . . . . . . . . . . . . . . 5
5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5
6 Functional description . . . . . . . . . . . . . . . . . . . 5
7 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 6
8 Recommended operating conditions. . . . . . . . 6
9 Static characteristics. . . . . . . . . . . . . . . . . . . . . 7
10 Dynamic characteristics . . . . . . . . . . . . . . . . . . 8
11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 12
13 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 15
14 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 15
15 Legal information. . . . . . . . . . . . . . . . . . . . . . . 16
15.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 16
15.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
15.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 16
15.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 17
16 Contact information. . . . . . . . . . . . . . . . . . . . . 17
17 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18