DG408/409
Vishay Siliconix
Document Number: 70062
S-52433—Rev. E, 06-Sep-99 www.vishay.com
1
8-Ch/Dual 4-Ch High-Performance CMOS Analog Multiplexers
FEATURES BENEFITS APPLICATIONS
DLow On-Resistance—rDS(on): 100
DLow Charge Injection—Q: 20 pC
DFast Transition Time—tTRANS: 160 ns
DLow Power—ISUPPLY: 10 A
DSingle Supply Capability
D44-V Supply Max Rating
DTTL Compatible Logic
DReduced Switching Errors
DReduced Glitching
DImproved Data Throughput
DReduced Power Consumption
DIncreased Ruggedness
DWide Supply Ranges ("5 V to "20 V)
DData Acquisition Systems
DAudio Signal Routing
DATE Systems
DBattery Powered Systems
DHigh Rel Systems
DSingle Supply Systems
DMedical Instrumentation
DESCRIPTION
The DG408 is an 8-channel single-ended analog multiplexer
designed to connect one of eight inputs to a common output
as determined by a 3-bit binary address (A0, A1, A2). The
DG409 is a dual 4-channel differential analog multiplexer
designed t o connect one of four dif ferential inputs to a common
dual output as determined by its 2-bit binary address (A0, A1).
Break-before-make switching action protects against
momentary crosstalk between adjacent channels.
An on channel conducts current equally well in both directions.
In the off state each channel blocks voltages up to the power
supply rails. An enable (EN) function allows the user to reset
the multiplexer/demultiplexer to all switches off for stacking
several devices. All control inputs, address (Ax) and enable
(EN) are TTL compatible over the full specified operating
temperature range.
Applications for the DG408/409 include high speed data
acquisition, audio signal switching and routing, ATE systems,
and avionics. High performance and low power dissipation
make them ideal for battery operated and remote
instrumentation applications.
Designed in the 44-V silicon-gate CMOS process, the
absolute maximum voltage rating is extended to 44 V.
Additionally, single supply operation is also allowed. An
epitaxial layer prevents latchup.
For additional information please see Technical Article TA201
(FaxBack Number 70600).
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
S3
A0
S6
D
S4
A1
S8
S7
EN
Dual-In-Line
SOIC and TSSOP
A2
V– GND
S1V+
S2S5
Decoders/Drivers
1
2
3
4
5
6
7
16
15
14
13
12
11
10
Top View
89
A0
Da
A1
Db
EN GND
V– V+
S1a S1b
S2a S2b
S3a S3b
S4a S4b
Dual-In-Line
SOIC and TSSOP
Decoders/Drivers
1
2
3
4
5
6
7
16
15
14
13
12
11
10
Top View
89
DG408 DG409
DG408/409
Vishay Siliconix
www.vishay.com
2Document Number: 70062
S-52433Rev. E, 06-Sep-99
TRUTH TABLES AND ORDERING INFORMATION
TRUTH TABLE Ċ DG408
A2A1A0EN On Switch
X X X 0 None
0 0 0 1 1
0 0 1 1 2
0 1 0 1 3
0 1 1 1 4
1 0 0 1 5
1 0 1 1 6
1 1 0 1 7
1 1 1 1 8
TRUTH TABLE Ċ DG409
A1A0EN On Switch
X X 0 None
0 0 1 1
0 1 1 2
1 0 1 3
1 1 1 4
Logic 0=V
AL v 0.8 V
w
Logic 1=V
AH w 2.4 V
X = Dont Care
ORDERING INFORMATION Ċ DG408
Temp Range Package Part Number
16-Pin Plastic DIP DG408DJ
40 to 85_C16-Pin SOIC DG408DY
16-Pin TSSOP DG408DQ
DG408AK
_16-Pin CerDIP DG408AK/883
55 to 125_C5962-9204201MEA
LCC-20* 5962-9204201M2A
ORDERING INFORMATION Ċ DG409
Temp Range Package Part Number
16-Pin Plastic DIP DG409DJ
40 to 85_C16-Pin SOIC DG409DY
16-Pin TSSOP DG409DQ
DG409AK
_16-Pin CerDIP DG409AK/883
55 to 125_C5962-9204202MEA
LCC-20* 5962-9204202M2A
*Block Diagram and Pin Configuration not shown.
ABSOLUTE MAXIMUM RATINGS
Voltage Referenced to V
V+ 44 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
GND 25 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital Inputsa, VS, VD(V) 2 V to (V+) +2 V or. . . . . . . . . . . . . . . . . . . . . . . .
20 mA, whichever occurs first
Current (Any Terminal) 30 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Peak Current, S or D
(Pulsed at 1 ms, 10% Duty Cycle Max) 100 mA. . . . . . . . . . . . . . . . . . . . . . . .
Storage Temperature (AK Suffix) 65 to 150_C. . . . . . . . . . . . . . . . . .
(DJ, DY Suffix) 65 to 125_C. . . . . . . . . . . . . .
Power Dissipation (Package)b
16-Pin Plastic DIPc450 mW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
16-Pin Narrow SOIC and TSSOPd600 mW. . . . . . . . . . . . . . . . . . . . . . . . . . . .
16-Pin CerDIPe900 mW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LCC-20f750 mW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Notes
a. Signals on SX, DX or INX exceeding V+ or V will be clamped by internal
diodes. Limit forward diode current to maximum current ratings.
b. All leads soldered or welded to PC board.
c. Derate 6 mW/_C above 75_C.
d. Derate 7.6 mW/_C above 75_C.
e. Derate 12 mW/_C above 75_C.
f. Derate 10 mW/_C above 75_C.
DG408/409
Vishay Siliconix
Document Number: 70062
S-52433Rev. E, 06-Sep-99 www.vishay.com
3
SPECIFICATIONSa
Test Conditions
Unless Otherwise Specified A Suffix
55 to 125_CD Suffix
40 to 85_C
Parameter Symbol V+ = 15 V, V = 15 V
VAL = 0.8 V, VAH = 2.4 VfTempbTypcMindMaxdMindMaxdUnit
Analog Switch
Analog Signal RangeeVANALOG Full 15 15 15 15 V
Drain-Source On-Resistance rDS(on) VD = "10 V, IS = 10 mA Room
Full 40 100
125 100
125
rDS(on) Matching Between
ChannelsgrDS(on) VD = "10 V Room 15 15 %
Source Off
Leakage Current IS(off) VS = "10 V, VD = #10 V
VEN = 0 V Room
Full 0.5
50 0.5
50 0.5
50.5
5
VD = "10 V
#
DG408 Room
Full 1
100 1
100 1
20 1
20
Drain Off Leakage Current ID(off) VS = #10 V
VEN = 0 V DG409 Room
Full 1
50 1
50 1
10 1
10 nA
VS = VD = "10 V DG408 Room
Full 1
100 1
100 1
20 1
20
Drain On Leakage Current ID(on) Sequence Each
Switch On DG409 Room
Full 1
50 1
50 1
10 1
10
Digital Control
Logic High Input Voltage VINH Full 2.4 2.4
Logic Low Input Voltage VINL Full 0.8 0.8 V
Logic High Input Current IAH VA = 2.4 V, 15 V Full 10 10 10 10
Logic Low Input Current IAL VEN = 0 V, 2.4 V, VA = 0 V Full 10 10 10 10 A
Logic Input Capacitance Cin f = 1 MHz Room 8 pF
Dynamic Characteristics
Transition Time tTRANS See Figure 2 Full 160 250 250
Break-Before-Make Interval tOPEN See Figure 4 Room 10 10
Enable Turn-On Time tON(EN) See Figure 3 Room
Full 115 150
225 150 ns
Enable Turn-Off Time tOFF(EN)
See Figure 3 Room 105 150 150
Charge Injection Q CL = 10 nF, VS = 0 V Room 20 pC
Off IsolationhOIRR VEN = 0 V, RL = 1 k
f = 100 kHz Room 75 dB
Source Off Capacitance CS(off) VEN = 0 V, VS = 0 V, f = 1 MHz Room 3
DG408 Room 26
Drain Off Capacitance CD(off) VEN = 0 V, VD = 0 V DG409 Room 14 pF
VEN = 0 V, VD = 0 V
f = 1 MHz DG408 Room 37
Drain On Capacitance CD(on) DG409 Room 25
Power Supplies
Positive Supply Current I+ Full 10 75 75
Negative Supply Current IVEN = VA = 0 V or 5 V Full 1 75 75 A
Positive Supply Current I+ VEN = 2.4 V, VA = 0 V Room
Full 0.2 0.5
20.5
2mA
Negative Supply Current IVEN = 2.4 V, VA = 0 V Full 500 500 A
DG408/409
Vishay Siliconix
www.vishay.com
4Document Number: 70062
S-52433Rev. E, 06-Sep-99
SPECIFICATIONSa FOR SINGLE SUPPLY
Test Conditions
Unless Otherwise Specified A Suffix
55 to 125_CD Suffix
40 to 85_C
Parameter Symbol V+ = 12 V, V = 0 V
VAL = 0.8 V, VAH = 2.4 VfTempbTypcMindMaxdMindMaxdUnit
Analog Switch
Drain-Source
On-Resistancee, frDS(on) VD = 3 V, 10 V, IS = 1 mA Room 90
Dynamic Characteristics
Switching Time of MultiplexeretTRANS VS1 = 8 V, VS8 = 0 V, VIN = 2.4 V Room 180
Enable Turn On TimeetON(EN) VINH = 2.4 V, VINL = 0 V Room 180 ns
Enable Turn Off T imeetOFF(EN)
VINH = 2.4 V, VINL = 0 V
VS1 = 5 V Room 120
Charge InjectioneQ CL = 1 nF, VS= 6 V, RS = 0 Room 5 pC
Notes
a. Refer to PROCESS OPTION FLOWCHART.
b. Room = 25_C, Full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not subject to production test.
f. VIN = input voltage to perform proper function.
g. rDS(on) = rDS(on) Max rDS(on) Min.
h. Worst case isolation occurs on Channel 4 do to proximity to the drain pin.
DG408/409
Vishay Siliconix
Document Number: 70062
S-52433Rev. E, 06-Sep-99 www.vishay.com
5
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
Source/Drain Capacitance vs. Analog Voltage
(pF)CS, D
VANALOG Analog Voltage (V)
01515
0
20
40
80
60
V+ = 15 V
V = 15 V
CD(off)
CS(off)
10 5510
Drain Leakage Current vs. Source/Drain Voltage
(Single 12-V Supply)
(pA)
ID
VD Drain Voltage (V) 1201062 48
60
40
20
60
40
0
20 DG408 ID(off)
DG409 ID(off)
DG409 ID(on)
DG408 ID(on)
VS = 0 V for ID(off)
VS = VD for ID(on)
ÉÉÉÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉÉÉÉ
Input Switching Threshold vs. Supply Voltage
(V)
TH
V
+VSUPPLY (V)
12 2048 16
0.0
0.5
2.0
1.5
1.0
Negative Supply Current vs. Switching Frequency
I
Switching Frequency (Hz)
10 k 10 M100 1 k 100 k 1 M
VSUPPLY = "15 V
100 mA
1 mA
100 A
10 A
1 A
0.1 A
10 mA
VEN = 2.4 V
VEN = 0 V or 5 V
CD(on)
DG408 ID(on), ID(off)
Source Leakage Current vs. Source VoltageDrain Leakage Current vs. Source/DrainVoltage
(nA)I S(off)
(pA)
ID
VD or VS Drain or Source Voltage (V) VS Source Voltage (V)
01515
140
60
20
100
60
20
100
V+ = 15 V
V = 15 V
VS = VD for ID(off)
VD = VS(open) for ID(on)
DG409 ID(off)
10 5 5 10 0 1515
10
0
10
20
15
5
5
V+ = 15 V
V = 15 V
V+ = 12 V
V = 0 V
10 5510
DG409 ID(on)
DG408/409
Vishay Siliconix
www.vishay.com
6Document Number: 70062
S-52433Rev. E, 06-Sep-99
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
Positive Supply Current vs. Switching Frequency ISUPPLY vs. Temperature
I+
Switching Frequency (Hz)
10 k 10 M100 1 k 100 k 1 M
VSUPPLY = "15 V
100 mA
10 mA
1 mA
100 A
10 A
VEN = 2.4 V
VEN = 0 V or 5 V
I+, I
Temperature (_C)
12555 85455
VSUPPLY = "15 V
VA = 0 V
VEN = 0 V
I+
(I)
100 mA
1 mA
100 nA
10 nA
1 nA
100 pA
10 pA
10 mA
35 15 25 65 105
Charge Injection vs. Analog VoltagePositive Supply Current vs. Temperature (DG408)
Q (pC)
I+ ( A)
Temperature (_C) VS Source Voltage (V)
5
15
20
10
12555 85455
0
V+ = 15 V
V = 15 V
VIN = 0 V
VEN = 0 V
35 15 25 65 105 10
30
50
90
70
40
0
80
60
20
10
01515 10 5510
V+ = 15 V
V = 15 V
V+ = 12 V
V = 0 V
CL = 10,000 pF
VIN = 5 Vp-p
rDS(on) vs. VD and Supply rDS(on) vs. VD and Supply (Single Supply)
rDS(on) ()
rDS(on) ()
VD Drain Voltage (V) VD Drain Voltage (V)
0
40
100
60
80
120
20
20 12 84 0 4 8 12 16 2016
"5 V
"8 V
"10 V
"12 V
"20 V
220
0
40
100
60
140
160
80
120
20
4 8 12 16 20
V+ = 7.5 V
10 V
12 V
15 V 20 V
22 V
V = 0 V
"15 V
DG408/409
Vishay Siliconix
Document Number: 70062
S-52433Rev. E, 06-Sep-99 www.vishay.com
7
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
rDS(on) vs. VS and Temperature rDS(on) vs. VS and Temperature (Single Supply)
rDS(on) ()
rDS(on) ()
VS Source Voltage (V) VS Source Voltage (V)
01515
0
40
60
80
50
10
70
30
20
V+ = 15 V
V = 15 V
125_C
85_C
25_C
55_C
10 5510 12840
10
30
50
70
90
110
130
V+ = 12 V
V = 0 V
55_C
40_C
0_C
125_C
85_C
25_C
2610
Off Isolation and Crosstalk vs. Frequency Insertion Loss vs. Frequency
LOSS (dB)
(dB)
f Frequency (Hz) f Frequency (Hz)
10 k 10 M
30
70
90
50
100 1 k 100 k 1 M
110
100 M
130
150
V+ = 15 V
V = 15 V
RL = 1 k
Off-Isolation
Crosstalk
10 M
5
2
1
1
0
4
3
6
V+ = 15 V
V = 15 V
Ref. 1 Vrms
RL = 50
RL = 1 k
10 100 1 k 10 k 100 k 1 M 100 M
Switching Time vs. Single SupplySwitching Time vs. Bipolar Supply
t (ns)
t (ns)
VSUPPLY (V) VSUPPLY (V)
158
100
150
225
175
200
250
125
91214131110
275
tTRANS
tOFF(EN)
tON(EN)
75
125
200
150
175
100
tOFF(EN)
tON(EN)
tTRANS
"10 "12 "14 "16 "18 "20 "22
40_C
0_C
DG408/409
Vishay Siliconix
www.vishay.com
8Document Number: 70062
S-52433Rev. E, 06-Sep-99
SCHEMATIC DIAGRAM (TYPICAL CHANNEL)
FIGURE 1.
EN
A0
S1
D
V+
Sn
V
Decode/
Drive
Level
Shift
V
V+
VREF
AX
GND
V+
TEST CIRCUITS
FIGURE 2. Transition Time
A1
A0
A2
A1
A0
+15 V
15 V
EN
V+
VGND D
35 pF
VO
S1
S2 S7
S8
50 300
#10 V
"10 V
+15 V
15 V
EN
V+
VGND 35 pF
VO
S1
S1a S4a, Da
S4b
50 300
#10 V
"10 V
Db
Logic
Input
Switch
Output
VS8
VO
tTRANS
tr <20 ns
tf <20 ns
S8 ONS1 ON tTRANS
0 V
VS1
50%
90%
90%
3 V
0 V
DG408
DG409
DG408/409
Vishay Siliconix
Document Number: 70062
S-52433Rev. E, 06-Sep-99 www.vishay.com
9
TEST CIRCUITS
FIGURE 3. Enable Switching Time
Logic
Input
Switch
Output
VO
tr <20 ns
tf <20 ns
3 V
0 V
0 V
tOFF(EN)
tON(EN)
50%
90%
10%
VO
EN S1
S2 S8
A0
A1
A2
50 1 k
VO
V+
GND VD
5 V
35 pF
15 V
+15 V
S1b
S1a S4a, Da
S2b S4b
Db
EN
A0
A1
50 1 k
VO
V+
GND V
5 V
35 pF
15 V
+15 V
DG408
DG409
FIGURE 4. Break-Before-Make Interval
50%
80%
Logic
Input
Switch
Output
VO
VS
tOPEN
tr <20 ns
tf <20 ns
0 V
3 V
0 V
EN V+
GND V
+5 V
35 pF
15 V
+15 V
+2.4 V
A2Db, D
All S and Da
300
VO
50
A1
A0DG408
DG409
DG408/409
Vishay Siliconix
www.vishay.com
10 Document Number: 70062
S-52433Rev. E, 06-Sep-99
TEST CIRCUITS
FIGURE 5. Charge Injection
A0
EN
A1
A2
VO
V+
GND V
D
15 V
+15 V
RgSX
CL
10 nF
Channel
Select
3 V
0 V OFF ON
Logic
Input
Switch
Output
VO
VO is the measured voltage due to charge transfer
error Q, when the channel turns off.
Q = CL x VO
OFF
FIGURE 6. Off Isolation FIGURE 7. Crosstalk
RL
1 k
VO
V+
GND V
15 V
+15 V
A2
D
A1
A0
S8
SX
VS
EN
Rg = 50
Off Isolation = 20 log VOUT
VIN
VIN
RL
1 k
VO
V+
GND V
15 V
+15 V
A2
D
A1
A0
S8
SX
VS
EN
Rg = 50
Crosstalk = 20 log VOUT
VIN
VIN S1
FIGURE 8. Insertion Loss
RL
1 k
A2
VO
D
Rg = 50
Insertion Loss = 20 log VOUT
A1
VIN
A0
VSS1V+
GND V
15 V
+15 V
EN
FIGURE 9. Source Drain Capacitance
f = 1 MHz
S1
D
EN
+15 V
15 V
GND
V+
V
Meter
HP4192A
Impedance
Analyzer
or Equivalent
S8
A1
A2
A0
Channel
Select
DG408/409
Vishay Siliconix
Document Number: 70062
S-52433Rev. E, 06-Sep-99 www.vishay.com
11
APPLICATION HINTS
Overvoltage Protection
A very convenient form of overvoltage protection consists of
adding two small signal diodes (1N4148, 1N914 type) in series
with the supply pins (see Figure 10). This arrangement
effectively blocks the flow of reverse currents. It also floats the
supply pin above or below the normal V+ or V value. In this
case the overvoltage signal actually becomes the power
supply of the IC. From the point of view of the chip, nothing has
changed, as long as the difference VS (V) doesnt exceed
+44 V. The addition of these diodes will reduce the analog
signal range to 1 V below V+ and 1 V above V, but it
preserves the low channel resistance and low leakage
characteristics.
1N4148
DG408
D
V
V+
1N4148
SX
Vg
FIGURE 10. Overvoltage Protection Using Blocking Diodes
EN
A0A1
+15 V
(MUX On-Off Control)
Analog
Inputs
(Outputs)
Clock
In
NC
Enable In
Analog
Output
(Input)
+15 V 15 V
DG408 D
EN
GND
DM7493
V+ V
NC
GND
+15 V
8-Channel Sequential Multiplexer/Demultiplexer
Analog
Inputs
(Outputs) Analog
Outputs
(Inputs)
+15 V 15 V
DG409
GNDV+ V
Differential Differential
Clock
In
NC
GND
+15 V
NC
6
Reset Enable
Differential 4-Channel Sequential Multiplexer/Demultiplexer
J
K
CLK
J
K
CLK
CLEAR CLEAR
Q
S5
S7
S6
S8
S1
S3
S2
S4
S1a
S3a
S2a
S4a
S1b
S3b
S2b
S4b
Da
Db
A0A1A2
BIN
AIN
r01 r02
QB
QC
QD
QA1/2 MM74C73 1/2 MM74C73
FIGURE 11.
Q
Q
Q