1
Features
Fast charge of nickel cadmium
or nickel-metal hydride batter-
ies
Direct LED output displays
charge status
Fast-charge termination by -V,
maximum voltage, maximum
temperature, and maximum
time
Internal band-gap voltage ref-
erence
Optional top-off charge
Selectable pulse trickle charge
rates
Low-power mode
8-pin 300-mil DIP or 150-mil
SOIC
General Description
The bq2002 and bq2002/F Fast-Charge
ICs are low-cost CMOS battery-charge
controllers providing reliable charge
termination for both NiCd and NiMH
battery applications. Controlling a
current-limited or constant-current
supply allows the bq2002/F to be the
basis for a cost-effective stand-alone or
system-integrated charger. The
bq2002/F integrates fast charge with
optional top-off and pulsed-trickle con-
trol in a single IC for charging one or
more NiCd or NiMH battery cells.
Fast charge is initiated on application
of the charging supply or battery re-
placement. For safety, fast charge is
inhibited if the battery temperature
and voltage are outside configured
limits.
Fast charge is terminated by any of
the following:
nPeak voltage detection (PVD)
nNegative delta voltage (-V)
nMaximum voltage
nMaximum temperature
nMaximum time
After fast charge, the bq2002/F op-
tionally tops-off and pulse-trickles the
battery per the pre-configured limits.
Fast charge may be inhibited using
the INH pin. The bq2002/F may also
be placed in low-standby-power mode
to reduce system power consumption.
The bq2002F differs from the
bq2002 only in that a slightly differ-
ent set of fast-charge and top-off
time limits is available. All differ-
ences between the two ICs are illus-
trated in Table 1.
NiCd/NiMH Fast-Charge Management ICs
bq2002/F
TM Timer mode select input
LED Charging status output
BAT Battery voltage input
VSS System ground
1
PN-200201.eps
8-Pin DIP or
Narrow SOIC
2
3
4
8
7
6
5
TM
LED
BAT
VSS
CC
INH
VCC
TS
TS Temperature sense input
VCC Supply voltage input
INH Charge inhibit input
CC Charge control output
Pin Connections Pin Names
bq2002/F Selection Guide
Part No. TCO HTF LTF -VPVD Fast Charge tMTO Top-Off Maintenance
bq2002 0.5 VCC None None
C/2 160 C/32 C/64
1C 80 C/16 C/64
2C 40 None C/32
bq2002F 0.5 VCC None None
C/2 160 C/32 C/64
1C 100 C/16 C/64
2C 55 None C/32
SLUS131–JANUARY 1999 D
Pin Descriptions
TM Timer mode input
A three-level input that controls the settings
for the fast charge safety timer, voltage ter-
mination mode, top-off, pulse-trickle, and
voltage hold-off time.
LED Charging output status
Open-drain output that indicates the charging
status.
BAT Battery input voltage
The battery voltage sense input. The input to
this pin is created by a high-impedance re-
sistor divider network connected between
the positive and negative terminals of the
battery.
VSS System ground
TS Temperature sense input
Input for an external battery temperature
monitoring thermistor.
VCC Supply voltage input
5.0V ±20% power input.
INH Charge inhibit input
When high, INH suspends the fast charge in
progress. When returned low, the IC re-
sumes operation at the point where initially
suspended.
CC Charge control output
An open-drain output used to control the
charging current to the battery. CC switch-
ing to high impedance (Z) enables charging
current to flow, and low to inhibit charging
current. CC is modulated to provide top-off,
if enabled, and pulse trickle.
Functional Description
Figure 2 shows a state diagram and Figure 3 shows a
block diagram of the bq2002/F.
Battery Voltage and Temperature
Measurements
Battery voltage and temperature are monitored for
maximum allowable values. The voltage presented on
the battery sense input, BAT, should represent a
single-cell potential for the battery under charge. A
resistor-divider ratio of
RB1
RB2 = N - 1
is recommended to maintain the battery voltage within
the valid range, where N is the number of cells, RB1 is
the resistor connected to the positive battery terminal,
and RB2 is the resistor connected to the negative bat-
tery terminal. See Figure 1.
Note: This resistor-divider network input impedance to
end-to-end should be at least 200kand less than 1 M.
A ground-referenced negative temperature coefficient
thermistor placed near the battery may be used as a low-
cost temperature-to-voltage transducer. The temperature
sense voltage input at TS is developed using a resistor-
thermistor network between VCC and VSS. See Figure 1.
2
bq2002/F
Fg2002/F01.eps
bq2002/F
BAT
VSS
N
T
C
bq2002/F
VCC
VCC PACK +
TS
VSS
BAT pin connection Thermistor connection
TM
NTC = negative temperature coefficient thermistor.
RT
R3
R4
RB1
RB2
Mid-level
setting for TM
Figure 1. Voltage and Temperature Monitoring and TM Pin Configuration
3
bq2002/F
Battery
Temperature?
Battery
Voltage?
Chip on
VCC 4.0V
VCC 2V
Top-off
LED = Z
Trickle
LED = Z
Fast
LED = Low
Maximum Time-Out
or
or
VBAT < 2V
VBAT > 2V
SD2002/F01
VTS > VCC/2 VTS < VCC/2
VBAT > 2V
VBAT > 2V
VTS < VCC/2
VTS < VCC/2
((PVD or - V or
Maximum Time-Out)
and TM = high)
(PVD or - V or
Maximum Time-Out)
and TM = high
Figure 2. State Diagram
OSC
TM
CC LED VCC VSS
BAT
INH
Clock
Phase
Generator
Timing
Control
Sample
History
A to D
Converter
MCV
Check
TS
Bd2002f.eps
Voltage
Reference
PVD, -V
ALU
Power-On
Reset
TCO
Check
Power
Down
Charge-Control
State Machine
Figure 3. Block Diagram
Starting A Charge Cycle
Either of two events starts a charge cycle (see Figure 4):
1. Application of power to VCC or
2. Voltage at the BAT pin falling through the maximum
cell voltage VMCV where
VMCV = 2V ±5%.
If the battery is within the configured temperature and
voltage limits, the IC begins fast charge. The valid bat-
tery voltage range is VBAT <V
MCV
. The valid tempera-
ture range is VTS >V
TCO where
VTCO = 0.5 VCC ±5%.
If the battery voltage or temperature is outside of these
limits, the IC pulse-trickle charges until the next new
charge cycle begins.
Fast charge continues until termination by one or more of
the five possible termination conditions:
nPeak voltage detection (PVD)
nNegative delta voltage (-V)
nMaximum voltage
nMaximum temperature
nMaximum time
4
bq2002/F
Corresponding
Fast-Charge
Rate TM Termination
Typical Fast-Charge
and Top-Off
Time Limits
(minutes) Typical PVD
and -V Hold-Off
Time (seconds)
Top-Off
Rate
Pulse-
Trickle
Rate
Pulse-
Trickle
Period
(ms)
bq2002 bq2002F
C/2 Mid PVD 160 160 600 C/32 C/64 9.15
1C Low PVD 80 100 300 C/16 C/64 18.3
2C High -V 40 40 150 Disabled C/32 18.3
Notes: Typical conditions = 25°C, VCC = 5.0V.
Mid = 0.5 *VCC ±5V
Tolerance on all timing is ±20%.
Table 1. Fast-Charge Safety Time/Hold-Off Table
TD2002F1.eps
Fast ChargingVCC = 0 Fast Charging
CC Output
LED
s
s
Charge initiated by application of power
Charge initiated by battery replacement
Pulse-TrickleTop-Off
(optional)
286
See
Table 1
s
286
4576
Figure 4. Charge Cycle Phases
PVD and -V Termination
There are two modes for voltage termination depending
on the state of TM. For -V (TM = high), if VBAT is
lower than any previously measured value by 12mV
±3mV, fast charge is terminated. For PVD (TM = low or
mid), a decrease of 2.5mV ±2.5mV terminates fast
charge. The PVD and -V tests are valid in the range
1V<V
BAT <2V.
Voltage Sampling
Voltage is sampled at the BAT pin for PVD and -V ter-
mination once every 17s. The sample is an average of
voltage measurements taken 57µs apart. The IC takes
32 measurements in PVD mode and 16 measurements
in -V mode. The resulting sample periods (9.17 and
18.18ms, respectively) filter out harmonics centered
around 55 and 109Hz. This technique minimizes the ef-
fect of any AC line ripple that may feed through the
power supply from either 50 or 60Hz AC sources. Toler-
ance on all timing is ±20%.
Voltage Termination Hold-off
A hold-off period occurs at the start of fast charging.
During the hold-off time, the PVD and -V terminations
are disabled. This avoids premature termination on the
voltage spikes sometimes produced by older batteries
when fast-charge current is first applied. Maximum
voltage and temperature terminations are not affected
by the hold-off period.
Maximum Voltage, Temperature, and Time
Any time the voltage on the BAT pin exceeds the maxi-
mum cell voltage,VMCV
, fast charge or optional top-off
charge is terminated.
Maximum temperature termination occurs anytime the
voltage on the TS pin falls below the temperature cut-off
threshold VTCO.
Maximum charge time is configured using the TM pin.
Time settings are available for corresponding charge
rates of C/2, 1C, and 2C. Maximum time-out termina-
tion is enforced on the fast-charge phase, then reset, and
enforced again on the top-off phase, if selected. There is
no time limit on the trickle-charge phase.
Top-off Charge
An optional top-off charge phase may be selected to
follow fast charge termination for 1C and C/2 rates.
This phase may be necessary on NiMH or other bat-
tery chemistries that have a tendency to terminate
charge prior to reaching full capacity. With top-off en-
abled, charging continues at a reduced rate after
fast-charge termination for a period of time selected
by the TM pin. (See Table 1.) During top-off, the CC
pin is modulated at a duty cycle of 286µs active for
every 4290µs inactive. This modulation results in an
average rate 1/16th that of the fast charge rate. Maxi-
mum voltage, time, and temperature are the only ter-
mination methods enabled during top-off.
Pulse-Trickle Charge
Pulse-trickle is used to compensate for self-discharge
while the battery is idle in the charger. The battery is
pulse-trickle charged by driving the CC pin active for a
period of 286µs for every 18.0ms of inactivity for 1C and
2C selections, and 286µs for every 8.86ms of inactivity
for C/2 selection. This results in a trickle rate of C/64
for the top-off enabled mode and C/32 otherwise.
TM Pin
The TM pin is a three-level pin used to select the
charge timer, top-off, voltage termination mode, trickle
rate, and voltage hold-off period options. Table 1 de-
scribes the states selected by the TM pin. The mid-
level selection input is developed by a resistor di-
vider between VCC and ground that fixes the voltage
on TM at VCC/2 ±0.5V. See Figure 4.
Charge Status Indication
A fast charge in progress is uniquely indicated when the
LED pin goes low. The LED pin is driven to the high-Z
state for all conditions other than fast charge. Figure 2
outlines the state of the LED pin during charge.
Charge Inhibit
Fast charge and top-off may be inhibited by using the
INH pin. When high, INH suspends all fast charge and
top-off activity and the internal charge timer. INH
freezes the current state of LED until inhibit is re-
moved. Temperature monitoring is not affected by the
INH pin. During charge inhibit, the bq2002/F continues
to pulse-trickle charge the battery per the TM selection.
When INH returns low, charge control and the charge
timer resume from the point where INH became active.
Low-Power Mode
The IC enters a low-power state when VBAT is driven
above the power-down threshold (VPD) where
VPD = VCC - (1V ±0.5V)
Both the CC pin and the LED pin are driven to the
high-Z state. The operating current is reduced to less
than 1µA in this mode. When VBAT returns to a value
below VPD, the IC pulse-trickle charges until the next
new charge cycle begins.
5
bq2002/F
6
bq2002/F
Absolute Maximum Ratings
Symbol Parameter Minimum Maximum Unit Notes
VCC VCC relative to VSS -0.3 +7.0 V
VTDC voltage applied on any pin
excluding VCC relative to VSS -0.3 +7.0 V
TOPR Operating ambient temperature 0 +70 °C Commercial
TSTG Storage temperature -40 +85 °C
TSOLDER Soldering temperature - +260 °C 10 sec max.
TBIAS Temperature under bias -40 +85 °C
Note: Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional opera-
tion should be limited to the Recommended DC Operating Conditions detailed in this data sheet. Expo-
sure to conditions beyond the operational limits for extended periods of time may affect device reliability.
DC Thresholds (TA= 0 to 70°C; VCC ±20%)
Symbol Parameter Rating Tolerance Unit Notes
VTCO Temperature cutoff 0.5 *VCC ±5% VVTS VTCO inhibits/terminates
fast charge and top-off
VMCV Maximum cell voltage 2 ±5% VVBAT VMCV inhibits/terminates
fast charge and top-off
-VBAT input change for
-V detection -12 ±3mV
PVD BAT input change for
PVD detection -2.5 ±2.5 mV
7
bq2002/F
Recommended DC Operating Conditions (TA= 0 to 70°C)
Symbol Condition Minimum Typical Maximum Unit Notes
VCC Supply voltage 4.0 5.0 6.0 V
VDET -V, PVD detect voltage 1 - 2 V
VBAT Battery input 0 - VCC V
VTS Thermistor input 0.5 - VCC VV
TS < 0.5V prohibited
VIH
Logic input high 0.5 - - V INH
Logic input high VCC - 0.5 - - V TM
VIM Logic input mid VCC
2- 0.5 -VCC
205+.VTM
VIL
Logic input low - - 0.1 V INH
Logic input low - - 0.5 V TM
VOL Logic output low - - 0.8 V LED,CC,I
OL = 10mA
VPD Power down VCC - 1.5 -VCC - 0.5 V
VBAT VPD max. powers
down bq2002/F;
VBAT < VPD min. =
normal operation.
ICC Supply current - - 250 µAOutputs unloaded,
VCC = 5.1V
ISB Standby current - - 1 µAV
CC = 5.1V, VBAT = VPD
IOL LED, CC sink 10 - - mA @VOL = VSS + 0.8V
ILInput leakage - - ±1µA INH, CC, V = VSS to VCC
IOZ Output leakage in
high-Z state -5 - - µALED,CC
Note: All voltages relative to VSS.
8
bq2002/F
Impedance
Symbol Parameter Minimum Typical Maximum Unit
RBAT Battery input impedance 50 - - M
RTS TS input impedance 50 - - M
Timing (TA= 0 to +70°C; VCC ±10%)
Symbol Parameter Minimum Typical Maximum Unit Notes
dFCV Base time variation -20 - 20 %
Note: Typical is at TA= 25°C, VCC = 5.0V.
9
D
E1
E
C
e
L
G
B
A
A1
B1
S
8-Pin DIP (PN)
8-Pin PN (0.300" DIP)
Dimension
Inches Millimeters
Min. Max. Min. Max.
A 0.160 0.180 4.06 4.57
A1 0.015 0.040 0.38 1.02
B 0.015 0.022 0.38 0.56
B1 0.055 0.065 1.40 1.65
C 0.008 0.013 0.20 0.33
D 0.350 0.380 8.89 9.65
E 0.300 0.325 7.62 8.26
E1 0.230 0.280 5.84 7.11
e 0.300 0.370 7.62 9.40
G 0.090 0.110 2.29 2.79
L 0.115 0.150 2.92 3.81
S 0.020 0.040 0.51 1.02
bq2002/F
10
8-Pin SOIC Narrow (SN)
8-Pin SN (0.150" SOIC)
Dimension
Inches Millimeters
Min. Max. Min. Max.
A 0.060 0.070 1.52 1.78
A1 0.004 0.010 0.10 0.25
B 0.013 0.020 0.33 0.51
C 0.007 0.010 0.18 0.25
D 0.185 0.200 4.70 5.08
E 0.150 0.160 3.81 4.06
e 0.045 0.055 1.14 1.40
H 0.225 0.245 5.72 6.22
L 0.015 0.035 0.38 0.89
bq2002/F
11
bq2002/F
Ordering Information
Data Sheet Revision History
Change No. Page No. Description Nature of Change
13
Was: Table 1 gave the bq2002/F Operational Summary.
Is: Figure 2 gives the bq2002/F Operational Summary. Changed table to figure.
1 5 Added Termination column to table and Top-off values. Added column and values.
2 All Revised and expanded this data sheet to include bq2002F
3 1 Addition of selection guide
Notes: Change 1 = Sept. 1996 B changes from July 1994.
Change 2 = Aug. 1997 C changes from Sept. 1996 B.
Change 3 = Jan. 1999 D changes from Aug. 1997 C.
bq2002/F
Package Option:
PN = 8-pin plastic DIP
SN = 8-pin narrow SOIC
Device:
bq2002 Fast-Charge IC
bq2002F Fast-Charge IC
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
BQ2002FPN ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU Level-NC-NC-NC
BQ2002FPNE4 ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU Level-NC-NC-NC
BQ2002FSN ACTIVE SOIC D 8 75 Pb-Free
(RoHS) CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
BQ2002FSNTR ACTIVE SOIC D 8 2500 Pb-Free
(RoHS) CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
BQ2002PN ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU Level-NC-NC-NC
BQ2002PNE4 ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU Level-NC-NC-NC
BQ2002SN ACTIVE SOIC D 8 75 Pb-Free
(RoHS) CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
BQ2002SNTR ACTIVE SOIC D 8 2500 Pb-Free
(RoHS) CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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Addendum-Page 1
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