MC74VHCT257A Quad 2-Channel Multiplexer with 3-State Outputs The MC74VHCT257A is an advanced high speed CMOS quad 2-channel multiplexer fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. It consists of four 2-input digital multiplexers with common select (S) and enable (OE) inputs. When (OE) is held High, selection of data is inhibited and all the outputs go Low. The select decoding determines whether the A or B inputs get routed to the corresponding Y outputs. The VHCT inputs are compatible with TTL levels. This device can be used as a level converter for interfacing 3.3 V to 5.0 V because it has full 5.0 V CMOS level output swings. The VHCT257A input structures provide protection when voltages between 0 V and 5.5 V are applied, regardless of the supply voltage. The output structures also provide protection when VCC = 0 V. These input and output structures help prevent device destruction caused by supply voltage-input/output voltage mismatch, battery backup, hot insertion, etc. The internal circuit is composed of three stages, including a buffered output which provides high noise immunity and stable output. The inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V systems to 3.0 V systems. http://onsemi.com MARKING DIAGRAMS 16 SOIC-16 D SUFFIX CASE 751B 1 1 16 * High Speed: tPD = 4.1 ns (Typ) at VCC = 5.0 V Low Power Dissipation: ICC = 4.0 mA (Max) at TA = 25C TTL-Compatible Inputs: VIL = 0.8 V; VIH = 2.0 V Power Down Protection Provided on Inputs and Outputs Balanced Propagation Delays Designed for 2.0 V to 5.5 V Operating Range Low Noise: VOLP = 0.8 V (Max) Pin and Function Compatible with Other Standard Logic Families Latchup Performance Exceeds 300 mA ESD Performance: Human Body Model > 2000 V; Machine Model > 200 V These Devices are Pb-Free and are RoHS Compliant VHCT 257A ALYWG G TSSOP-16 DT SUFFIX CASE 948F 1 1 16 SOEIAJ-16 M SUFFIX CASE 966 Features * * * * * * * * * * VHCT257AG AWLYWW 1 74VHCT257 ALYWG 1 A = Assembly Location WL, L = Wafer Lot Y = Year WW, W = Work Week G or G = Pb-Free Package (Note: Microdot may be in either location) FUNCTION TABLE Inputs OE H L L Outputs Y0 - Y3 S X L H Z A0 -A3 B0 -B3 A0 - A3, B0 - B3 = the levels of the respective Data-Word Inputs. ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. (c) Semiconductor Components Industries, LLC, 2011 May, 2011 - Rev. 6 1 Publication Order Number: MC74VHCT257A/D MC74VHCT257A S 1 16 VCC A0 2 15 OE B0 3 14 A3 Y0 4 13 B3 A1 5 12 Y3 B1 6 11 A2 Y1 7 10 B2 GND 8 9 Y2 OE S A0 B0 A1 B1 A2 B2 A3 B3 Figure 1. Pin Assignment OE I0a I1a Za I0b I1b Zb 15 1 EN G1 2 3 5 6 1 1 MUX 4 7 11 10 14 13 9 12 Y0 Y1 Y2 Y3 Figure 2. IEC Logic Symbol I0c I1c I0d Zc I1d Zd Figure 3. Expanded Logic Diagram http://onsemi.com 2 S This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, Vin and Vout should be constrained to the range GND v (Vin or Vout) v VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V CC ). Unused outputs must be left open. MC74VHCT257A MAXIMUM RATINGS Symbol Parameter VCC Positive DC Supply Voltage Value Unit -0.5 to +7.0 V -0.5 to +7.0 V -0.5 to +7.0 -0.5 to VCC +0.5 V VIN Digital Input Voltage VOUT DC Output Voltage IIK Input Diode Current -20 mA IOK Output Diode Current $20 mA IOUT DC Output Current, per Pin $25 mA ICC DC Supply Current, VCC and GND Pins $75 mA PD Power Dissipation in Still Air 200 180 mW TSTG Storage Temperature Range -65 to +150 C VESD ESD Withstand Voltage Human Body Model (Note 1) Machine Model (Note 2) Charged Device Model (Note 3) >2000 >200 >2000 V Above VCC and Below GND at 125C (Note 4) $300 mA 143 164 C/W ILATCHUP Latchup Performance Output in 3-State High or Low State SOIC Package TSSOP Thermal Resistance, Junction-to-Ambient qJA SOIC Package TSSOP Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Tested to EIA/JESD22-A114-A 2. Tested to EIA/JESD22-A115-A 3. Tested to JESD22-C101-A 4. Tested to EIA/JESD78 RECOMMENDED OPERATING CONDITIONS Symbol Characteristics Min Max Unit 4.5 5.5 V DC Input Voltage 0 5.5 V DC Output Voltage 0 5.5 V -55 125 C 0 20 ns/V VCC DC Supply Voltage VIN VOUT TA Operating Temperature Range, all Package Types tr, tf Input Rise or Fall Time VCC = 5.0 V + 0.5 V 90 419,300 47.9 100 178,700 20.4 110 79,600 9.4 120 37,000 4.2 130 17,800 2.0 140 8,900 1.0 TJ = 80 C 117.8 TJ = 90 C 1,032,200 TJ = 100 C 80 FAILURE RATE OF PLASTIC = CERAMIC UNTIL INTERMETALLICS OCCUR TJ = 110 C Time, Years TJ = 120 C Time, Hours TJ = 130 C Junction Temperature C NORMALIZED FAILURE RATE DEVICE JUNCTION TEMPERATURE VERSUS TIME TO 0.1% BOND FAILURES 1 1 10 100 1000 TIME, YEARS Figure 4. Failure Rate vs. Time Junction Temperature http://onsemi.com 3 MC74VHCT257A DC CHARACTERISTICS (Voltages Referenced to GND) VCC Symbol (V) Min VIH Minimum High-Level Input Voltage 4.5 to 5.5 2 VIL Maximum Low-Level Input Voltage 4.5 to 5.5 VOH Maximum High-Level Output Voltage VOL Parameter Maximum Low-Level Output Voltage Condition TA = 25C Typ TA 85C Max Min -55C TA 125C Max Min 2 0.8 0.8 4.5 3.94 3.8 3.66 VIN = VIH or VIL IOH = -8 mA 4.5 3.94 3.8 3.66 VIN = VIH or VIL IOL = 50 mA 4.5 VIN = VIH or VIL IOH = 8 mA Unit V 0.8 VIN = VIH or VIL IOH = -50 mA 0 Max 2 V V 0.1 0.1 0.1 4.5 0.36 0.44 0.52 V IIN Input Leakage Current VIN = 5.5 V or GND 0 to 5.5 0.1 1.0 1.0 mA IOZ Maximum 3-State Leakage Current VIN = VIH or VIL VOUT = VCC or GND 5.5 0.2 5 2.5 2.5 mA ICCT Maximum Quiescent Supply Current VIN = VCC or GND 5.5 1.35 1.5 1.65 mA ICC Additional Quiescent Supply Current (per pin) VIN = VCC or GND 5.5 4.0 40 40 mA Output Leakage Current VOUT = 5.5 V IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIII IIIIII IIIII IIIIII IIIIIIII IIIIII IIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII IIIIIIII II IIIIIIII III III II III III III IIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII IIIIIIII II IIIIIIII III III II III III III IIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IOPD 0 0.5 5 5 mA AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0ns) TA = 25C Symbol tPLH, tPHL tPLH, tPHL tPZL, tPZH tPLZ, tPHZ CIN Parameter Maximum Propagation Delay, A or B to Y Maximum Propagation Delay, S to Y Maximum Output Enable, Time, OE to Y Maximum Output Disable, Time, OE to Y Min Test Conditions TA = 85C -55C TA 125C Typ Max Min Max Min Max Unit ns VCC = 3.3 0.3 V CL = 15 pF CL = 50 pF 5.8 8.3 9.3 12.8 1.0 1.0 11.0 14.5 1.0 1.0 11.0 14.5 VCC = 5.0 0.5 V CL = 15 pF CL = 50 pF 3.6 5.1 5.9 7.9 1.0 1.0 7.0 9.0 1.0 1.0 7.0 9.0 VCC = 3.3 0.3 V CL = 15 pF CL = 50 pF 7.0 9.5 11.0 14.5 1.0 1.0 13.0 16.5 1.0 1.0 13.0 16.5 VCC = 5.0 0.5 V CL = 15 pF CL = 50 pF 4.0 5.5 6.8 8.8 1.0 1.0 8.0 10.0 1.0 1.0 8.0 10.0 VCC = 3.3 0.3 V RL = 1 kW CL = 15 pF CL = 50 pF 6.7 9.2 10.5 14.0 1.0 1.0 12.5 16.0 1.0 1.0 12.5 16.0 VCC = 5.0 0.5 V RL = 1 kW CL = 15 pF CL = 50 pF 3.6 5.1 6.8 11.0 1.0 12.0 8.0 10.0 1.0 1.0 8.0 12.0 VCC = 3.3 0.3 V RL = 1 kW CL = 50 pF 10.5 14.0 1.0 15.0 1.0 15.0 VCC = 5.0 0.5 V RL = 1 kW CL = 50 pF 9.5 12.0 1.0 13.0 1.0 13.0 4 10 Maximum Input Capacitance 10 10 ns ns ns pF Typical @ 25C, VCC = 5.0 V 20 CPD Power Dissipation Capacitance (Note 5) pF 5. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no-load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC. NOISE CHARACTERISTICS (Input tr = tf = 3.0 ns, CL = 50 pF, VCC = 5.0 V) TA = 25C Typ Max Unit VOLP Quiet Output Maximum Dynamic VOL 0.3 0.8 V VOLV Quiet Output Minimum Dynamic VOL - 0.3 - 0.8 V VIHD Minimum High Level Dynamic Input Voltage 2.0 V VILD Maximum Low Level Dynamic Input Voltage 0.8 V Characteristic Symbol http://onsemi.com 4 MC74VHCT257A VCC OE 50% GND VCC 50% A, B or S tPHL tPLH Y tPZL GND tPLZ 50% VCC Y tPZH 50% VCC VOH - 0.3V Figure 6. Switching Waveform TEST POINT HIGH IMPEDANCE TEST POINT OUTPUT DEVICE UNDER TEST VOL + 0.3V tPHZ 50% VCC Y Figure 5. Switching Waveform HIGH IMPEDANCE DEVICE UNDER TEST CL* OUTPUT 1 kW CL * CONNECT TO VCC WHEN TESTING tPLZ AND tPZL. CONNECT TO GND WHEN TESTING tPHZ AND tPZH. *Includes all probe and jig capacitance *Includes all probe and jig capacitance Figure 7. Test Circuit Figure 8. Test Circuit INPUT Figure 9. Input Equivalent Circuit ORDERING INFORMATION Package Shipping MC74VHCT257ADG SOIC-16 (Pb-Free) 48 Units / Rail MC74VHCT257ADR2G SOIC-16 (Pb-Free) 2500 Tape & Reel MC74VHCT257ADTG TSSOP-16* 96 Units / Rail M74VHCT257ADTR2G TSSOP-16* 2500 Tape & Reel MC74VHCT257AMG SOEIAJ-16 (Pb-Free) 50 Units / Rail Device For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb-Free. http://onsemi.com 5 MC74VHCT257A PACKAGE DIMENSIONS SOIC-16 D SUFFIX CASE 751B-05 ISSUE K -A- 16 9 1 8 -B- P NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 8 PL 0.25 (0.010) B M S G R K F X 45 _ C -T- SEATING PLANE J M D 16 PL 0.25 (0.010) M T B S A S SOLDERING FOOTPRINT 8X 6.40 16X 1 1.12 16 16X 0.58 1.27 PITCH 8 9 DIMENSIONS: MILLIMETERS http://onsemi.com 6 DIM A B C D F G J K M P R MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019 MC74VHCT257A PACKAGE DIMENSIONS TSSOP-16 CASE 948F-01 ISSUE B 16X K REF 0.10 (0.004) 0.15 (0.006) T U T U M S V S K S K1 2X L/2 16 9 B -U- L SECTION N-N J PIN 1 IDENT. N 8 1 EEE CCC CCC EEE J1 0.25 (0.010) M 0.15 (0.006) T U S A -V- NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. N F DETAIL E -W- C 0.10 (0.004) -T- SEATING PLANE D H G DETAIL E DIM A B C D F G H J J1 K K1 L M SOLDERING FOOTPRINT 7.06 1 0.65 PITCH 16X 0.36 16X 1.26 DIMENSIONS: MILLIMETERS http://onsemi.com 7 MILLIMETERS MIN MAX 4.90 5.10 4.30 4.50 --- 1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.18 0.28 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.193 0.200 0.169 0.177 --- 0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.007 0.011 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_ MC74VHCT257A PACKAGE DIMENSIONS SOEIAJ-16 CASE 966-01 ISSUE A 16 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). LE 9 Q1 E HE 1 M_ L 8 Z DETAIL P D e VIEW P A A1 b 0.13 (0.005) c M 0.10 (0.004) DIM A A1 b c D E e HE L LE M Q1 Z MILLIMETERS MIN MAX --2.05 0.05 0.20 0.35 0.50 0.10 0.20 9.90 10.50 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 _ 0_ 0.70 0.90 --0.78 INCHES MIN MAX --0.081 0.002 0.008 0.014 0.020 0.007 0.011 0.390 0.413 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 _ 0_ 0.028 0.035 --0.031 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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