PD - 95954 IRL3202SPbF Advanced Process Technology Surface Mount l Optimized for 4.5V-7.0V Gate Drive l Ideal for CPU Core DC-DC Converters l Fast Switching l Lead-Free Description HEXFET(R) Power MOSFET l D l VDSS = 20V RDS(on) = 0.016 G ID = 48A S These HEXFET Power MOSFETs were designed specifically to meet the demands of CPU core DC-DC converters in the PC environment. Advanced processing techniques combined with an optimized gate oxide design results in a die sized specifically to offer maximum efficiency at minimum cost. The D2Pak is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible onresistance in any existing surface mount package. The D2Pak is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application. D 2 Pak Absolute Maximum Ratings ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C V GS VGSM EAS IAR EAR dv/dt TJ TSTG Parameter Max. Continuous Drain Current, VGS @ 4.5V Continuous Drain Current, VGS @ 4.5V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Gate-to-Source Voltage (Start Up Transient, tp = 100s) Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds 48 30 190 69 0.56 10 14 Units A W W/C V V 270 29 6.9 5.0 -55 to + 150 mJ A mJ V/ns 300 (1.6mm from case ) C Thermal Resistance Parameter RJC RJA Junction-to-Case Junction-to-Ambient ( PCB Mounted,steady-state)** Typ. Max. Units 1.8 40 C/W 12/21/04 IRL3202SPbF Electrical Characteristics @ TJ = 25C (unless otherwise specified) Parameter Drain-to-Source Breakdown Voltage V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient V(BR)DSS RDS(on) Static Drain-to-Source On-Resistance VGS(th) gfs Gate Threshold Voltage Forward Transconductance IDSS Drain-to-Source Leakage Current Qg Qgs Qgd td(on) tr td(off) tf Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time LS Internal Source Inductance Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance IGSS Min. 20 0.70 28 Typ. 0.029 9.8 100 63 82 Max. Units Conditions V VGS = 0V, ID = 250A V/C Reference to 25C, ID = 1mA 0.019 VGS = 4.5V, ID = 29A 0.016 VGS = 7.0V, ID = 29A V VDS = VGS , ID = 250A S VDS = 16V, ID = 29A 25 VDS = 20V, VGS = 0V A 250 VDS = 10V, V GS = 0V, TJ = 150C 100 VGS = 10V nA -100 VGS = -10V 43 ID = 29A 12 nC VDS = 16V 13 VGS = 4.5V, See Fig. 6 VDD = 10V ID = 29A ns RG = 9.5, VGS = 4.5V RD = 0.3, Between lead, nH 7.5 and center of die contact 2000 VGS = 0V 800 pF VDS = 15V 290 = 1.0MHz, See Fig. 5 Source-Drain Ratings and Characteristics IS I SM V SD t rr Q rr ton Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol 48 showing the A G integral reverse 190 S p-n junction diode. 1.3 V TJ = 25C, IS = 29A, VGS = 0V 68 100 ns TJ = 25C, IF = 29A 130 190 nC di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Notes: Repetitive rating; pulse width limited by max. junction temperature. Starting TJ = 25C, L = 0.64mH R G = 25, IAS = 29A. ISD 29A, di/dt 63A/s, VDD V(BR)DSS, TJ 150C Pulse width 300s; duty cycle 2%. Uses IRL3202 data and test conditions ** When mounted on FR-4 board using minimum recommended footprint. For recommended footprint and soldering techniques refer to application note #AN-994. IRL3202SPbF 1000 1000 VGS 7.50V 5.00V 4.00V 3.50V 3.00V 2.50V BOTTOM 2.00V BOTTOM 1.75V I D , Drain-to-Source Current (A) I D , Drain-to-Source Current (A) 100 100 10 2.0V 1 0.1 20s PULSE WIDTH TJ = 25 C 1 10 10 100 RDS(on) , Drain-to-Source On Resistance (Normalized) I D , Drain-to-Source Current (A) 2.0 TJ = 25 C 100 TJ = 150 C 10 V DS = 15V 20s PULSE WIDTH 3 4 Fig 3. Typical Transfer Characteristics 1 10 100 Fig 2. Typical Output Characteristics 1000 VGS , Gate-to-Source Voltage (V) 20s PULSE WIDTH TJ = 150 C VDS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics 2 2.0V 1 0.1 VDS , Drain-to-Source Voltage (V) 1 VGS 7.50V 5.00V 4.00V 3.50V 3.00V 2.50V BOTTOM 2.00V BOTTOM 1.75V TOP TOP 5 ID = 48A 1.5 1.0 0.5 0.0 -60 -40 -20 VGS = 4.5V 0 20 40 60 80 100 120 140 160 TJ , Junction Temperature ( C) Fig 4. Normalized On-Resistance Vs. Temperature IRL3202SPbF VGS = 0V, f = 1MHz Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd Coss = Cds + Cgd C, Capacitance (pF) 3000 2500 Ciss 2000 1500 Coss 1000 Crss 500 0 1 10 15 VGS , Gate-to-Source Voltage (V) 3500 ID = 29A VDS = 16V 12 9 6 3 0 100 0 10 VDS , Drain-to-Source Voltage (V) 30 40 50 60 70 Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage 1000 1000 OPERATION IN THIS AREA LIMITED BY RDS(on) I D , Drain Current (A) ISD , Reverse Drain Current (A) 20 QG , Total Gate Charge (nC) 100 100 TJ = 150 C TJ = 25 C 10 1 0.2 V GS = 0 V 0.8 1.4 2.0 VSD ,Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 2.6 100us 1ms 10 1 10ms TC = 25 C TJ = 150 C Single Pulse 1 10 VDS , Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area 100 IRL3202SPbF 600 EAS , Single Pulse Avalanche Energy (mJ) 50 ID , Drain Current (A) 40 30 20 10 0 25 50 75 100 125 150 TC , Case Temperature ( C) Fig 9. Maximum Drain Current Vs. Case Temperature TOP 500 BOTTOM ID 13A 18A 29A 400 300 200 100 0 25 50 75 100 125 Starting TJ , Junction Temperature ( C) 150 Fig 10. Maximum Avalanche Energy Vs. Drain Current Thermal Response (Z thJC ) 10 1 D = 0.50 0.20 0.10 0.1 0.01 0.00001 PDM 0.05 0.02 0.01 t1 SINGLE PULSE (THERMAL RESPONSE) t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case 1 0.018 RDS(on), Drain-to-Source On Resistance ( ) R DS (on), Drain-to-Source On Resistance( ) IRL3202SPbF VGS = 4.5V 0.016 0.014 VGS = 7.0V 0.012 0.010 0 10 20 30 40 50 I D , Drain Current (A) Fig 12. On-Resistance Vs. Drain Current 60 0.025 0.020 ID = 48A 0.015 0.010 0.0 2.0 4.0 6.0 V GS , Gate-to-Source Voltage (V) Fig 13. On-Resistance Vs. Gate Voltage 8.0 A IRL3202SPbF D2Pak Package Outline Dimensions are shown in millimeters (inches) D2Pak Part Marking Information T H IS IS AN IR F 530S WIT H LOT CODE 8024 AS S E MB L E D ON WW 02, 2000 IN T H E AS S E MB L Y L INE "L " INT E R NAT IONAL R E CT IF IE R L OGO Note: "P" in as s embly line pos ition indicates "Lead-F ree" P AR T NU MB E R F 530S AS S E MB LY LOT CODE OR INT E R NAT IONAL R E CT IF IE R L OGO AS S E MB L Y L OT CODE PAR T NU MB E R F 530S DAT E CODE P = DE S IGNAT E S L E AD-F R E E PR ODU CT (OPT IONAL ) YE AR 0 = 2000 WE E K 02 A = AS S E MB L Y S IT E CODE DAT E CODE YE AR 0 = 2000 WE E K 02 L INE L IRL3202SPbF D2Pak Tape & Reel Information TRR 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) FEED DIRECTION 1.85 (.073) 1.60 (.063) 1.50 (.059) 11.60 (.457) 11.40 (.449) 1.65 (.065) 0.368 (.0145) 0.342 (.0135) 15.42 (.609) 15.22 (.601) 24.30 (.957) 23.90 (.941) TRL 1.75 (.069) 1.25 (.049) 10.90 (.429) 10.70 (.421) 4.72 (.136) 4.52 (.178) 16.10 (.634) 15.90 (.626) FEED DIRECTION 13.50 (.532) 12.80 (.504) 27.40 (1.079) 23.90 (.941) 4 330.00 (14.173) MAX. 60.00 (2.362) MIN. NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE. 26.40 (1.039) 24.40 (.961) 3 30.40 (1.197) MAX. 4 Data and specifications subject to change without notice. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.12/04 Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/