Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 4.5V48
ID @ TC = 100°C Continuous Drain Current, VGS @ 4.5V30 A
IDM Pulsed Drain Current 190
PD @TC = 25°C Power Dissipation 69 W
Linear Derating Factor 0.56 W/°C
VGS Gate-to-Source Voltage ± 10 V
VGSM Gate-to-Source Voltage 14 V
(Start Up Transient, tp = 100µs)
EAS Single Pulse Avalanche Energy 270 mJ
IAR Avalanche Current29 A
EAR Repetitive Avalanche Energy6.9 mJ
dv/dt Peak Diode Recovery dv/dt 5.0 V/ns
TJOperating Junction and -55 to + 150
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
°C
12/21/04
IRL3202SPbF
HEXFET® Power MOSFET
PD - 95954
S
D
G
VDSS = 20V
RDS(on) = 0.016Ω
ID = 48A
These HEXFET Power MOSFETs were designed
specifically to meet the demands of CPU core DC-DC
converters in the PC environment. Advanced
processing techniques combined with an optimized
gate oxide design results in a die sized specifically to
offer maximum efficiency at minimum cost.
The D2Pak is a surface mount power package capable
of accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible on-
resistance in any existing surface mount package. The
D2Pak is suitable for high current applications because
of its low internal connection resistance and can
dissipate up to 2.0W in a typical surface mount
application.
Description
2
D Pak
Parameter Typ. Max. Units
RθJC Junction-to-Case 1.8
RθJA Junction-to-Ambient ( PCB Mounted,steady-state)** 40 °C/W
Thermal Resistance
Absolute Maximum Ratings
lAdvanced Process Technology
lSurface Mount
lOptimized for 4.5V-7.0V Gate Drive
lIdeal for CPU Core DC-DC Converters
lFast Switching
lLead-Free
IRL3202SPbF
Repetitive rating; pulse width limited by
max. junction temperature.
ISD ≤ 29A, di/dt ≤ 63A/µs, VDD ≤ V
(BR)DSS,
TJ ≤ 150°C
Notes:
Starting TJ = 25°C, L = 0.64mH
RG = 25Ω, IAS = 29A.
Pulse width ≤ 300µs; duty cycle ≤ 2%.
S
D
G
Parameter Min. Typ. Max. Units Conditions
ISContinuous Source Current MOSFET symbol
(Body Diode) showing the
ISM Pulsed Source Current integral reverse
(Body Diode) p-n junction diode.
VSD Diode Forward Voltage 1.3 V TJ = 25°C, IS = 29A, VGS = 0V
trr Reverse Recovery Time 68 100 ns TJ = 25°C, IF = 29A
Qrr Reverse Recovery Charge 130 190 nC di/dt = 100A/µs
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Source-Drain Ratings and Characteristics
48
190
A
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 20 V VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJBreakdown Voltage Temp. Coefficient 0.029 V/°C Reference to 25°C, ID = 1mA
0.019 VGS = 4.5V, ID = 29A
0.016 ΩVGS = 7.0V, ID = 29A
VGS(th) Gate Threshold Voltage 0.70 V VDS = VGS, ID = 250µA
gfs Forward Transconductance 28 S VDS = 16V, ID = 29A
25 µA VDS = 20V, VGS = 0V
250 VDS = 10V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage 100 nA VGS = 10V
Gate-to-Source Reverse Leakage -100 VGS = -10V
QgTotal Gate Charge 43 ID = 29A
Qgs Gate-to-Source Charge 12 nC VDS = 16V
Qgd Gate-to-Drain ("Miller") Charge 13 VGS = 4.5V, See Fig. 6
td(on) Turn-On Delay Time 9.8 VDD = 10V
trRise Time 100 ns ID = 29A
td(off) Turn-Off Delay Time 63 RG = 9.5Ω, VGS = 4.5V
tfFall Time 82 RD = 0.3Ω,
Between lead,
and center of die contact
Ciss Input Capacitance 2000 VGS = 0V
Coss Output Capacitance 800 pF VDS = 15V
Crss Reverse Transfer Capacitance 290 = 1.0MHz, See Fig. 5
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
RDS(on) Static Drain-to-Source On-Resistance
IGSS
nH
LSInternal Source Inductance 7.5
IDSS Drain-to-Source Leakage Current
Uses IRL3202 data and test conditions
** When mounted on FR-4 board using minimum recommended footprint.
For recommended footprint and soldering techniques refer to application note #AN-994.
IRL3202SPbF
Fig 4. Normalized On-Resistance
Vs. Temperature
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
1
10
100
1000
0.1 1 10 100
20µs PULSE WIDTH
T = 25 C
J°
TOP
BOTTOM
VGS
7.50V
5.00V
4.00V
3.50V
3.00V
2.50V
2.00V
1.75V
V , Drain-to-Source Voltage (V)
I , Drain-to-Source Current (A)
DS
D
2.0V
-60 -40 -20 020 40 60 80 100 120 140 160
0.0
0.5
1.0
1.5
2.0
T , Junction Temperature ( C)
R , Drain-to-Source On Resistance
(Normalized)
J
DS(on)
°
V =
I =
GS
D
4.5V
48A
1
10
100
1000
2345
V = 15V
20µs PULSE WIDTH
DS
V , Gate-to-Source Voltage (V)
I , Drain-to-Source Current (A)
GS
D
T = 25 C
J°
T = 150 C
J°
1
10
100
1000
0.1 1 10 100
20µs PULSE WIDTH
T = 150 C
J°
TOP
BOTTOM
VGS
7.50V
5.00V
4.00V
3.50V
3.00V
2.50V
2.00V
1.75V
V , Drain-to-Source Voltage (V)
I , Drain-to-Source Current (A)
DS
D
2.0V
BOTTOM BOTTOM
IRL3202SPbF
Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
1 10 100
0
500
1000
1500
2000
2500
3000
3500
V , Drain-to-Source Voltage (V)
C, Capacitance (pF)
DS
V
C
C
C
=
=
=
=
0V,
C
C
C
f = 1MHz
+ C
+ C
C SHORTED
GS
iss gs gd , ds
rss gd
oss ds gd
Ciss
Coss
Crss
1
10
100
1000
0.2 0.8 1.4 2.0 2.6
V ,Source-to-Drain Voltage (V)
I , Reverse Drain Current (A)
SD
SD
V = 0 V
GS
T = 25 C
J°
T = 150 C
J°
010 20 30 40 50 60 70
0
3
6
9
12
15
Q , Total Gate Charge (nC)
V , Gate-to-Source Voltage (V)
G
GS
I =
D29A
V = 16V
DS
1
10
100
1000
1 10 100
OPERATION IN THIS AREA LIMITED
BY RDS(on)
Single Pulse
T
T
= 150 C
= 25 C
°
°
J
C
V , Drain-to-Source Voltage (V)
I , Drain Current (A)I , Drain Current (A)
DS
D
100us
1ms
10ms
IRL3202SPbF
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current Vs.
Case Temperature
0.01
0.1
1
10
0.00001 0.0001 0.001 0.01 0.1 1
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
1 2
JDM thJC C
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
Thermal Response (Z )
1
thJC
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
25 50 75 100 125 150
0
10
20
30
40
50
T , Case Temperature ( C)
I , Drain Current (A)
°
C
D
Fig 10. Maximum Avalanche Energy
Vs. Drain Current
25 50 75 100 125 150
0
100
200
300
400
500
600
Starting T , Junction Temperature ( C)
E , Single Pulse Avalanche Energy (mJ)
J
AS
°
ID
TOP
BOTTOM
13A
18A
29A
IRL3202SPbF
Fig 12. On-Resistance Vs. Drain Current Fig 13. On-Resistance Vs. Gate Voltage
010 20 30 40 50 60
0.010
0.012
0.014
0.016
0.018
R , Drain-to-Source On Resistance
I , Drain Current (A)
D
DS (on)
VGS = 4.5V
VGS = 7.0V
( Ω )
0.010
0.015
0.020
0.025
0.0 2.0 4.0 6.0 8.0
A
GS
V , Gate-to-Source Voltage (V)
I = 48A
D
RDS(on), Drain-to-Source On Resistance ( Ω )
IRL3202SPbF
D2Pak Part Marking Information
Note: "P " in ass embly line
pos ition indicates "L ead-F ree"
F530S
T H IS IS AN IRF 530S WIT H
LOT CODE 8024
AS S E MBL ED ON WW 02, 2000
IN THE ASSEMBLY LINE "L"
AS S E MB L Y
LOT CODE
INT E R NAT IONAL
RECTIFIER
LOGO
PART NUMBER
DAT E CODE
YEAR 0 = 2000
WE EK 02
LINE L
OR
F 530S
A = ASSEMBLY SITE CODE
WEEK 02
P = DE S I GN AT E S L E AD-F R E E
PRODUCT (OPTIONAL)
RECTIFIER
INTE RNATIONAL
LOGO
LOT CODE
ASSEMBLY
YE AR 0 = 2000
DAT E CODE
PART NUMBER
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
IRL3202SPbF
D2Pak Tape & Reel Information
3
4
4
TRR
FEED DIRECTION
1.85 (.073)
1.65 (.065)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
TRL
FEED DIRECTION
10.90 (.429)
10.70 (.421)
16.10 (.634)
15.90 (.626)
1.75 (.069)
1.25 (.049)
11.60 (.457)
11.40 (.449) 15.42 (.609)
15.22 (.601)
4.72 (.136)
4.52 (.178)
24.30 (.957)
23.90 (.941)
0.368 (.0145)
0.342 (.0135)
1.60 (.063)
1.50 (.059)
13.50 (.532)
12.80 (.504)
330. 00
(14.173)
MAX.
27.40 (1.079)
23.90 (.941)
60.00 (2.362)
MIN.
30.40 (1.197)
MAX.
26.40 (1.039)
24.40 (.961)
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.12/04
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/
