CLC522 Wideband Variable Gain Amplifier General Description The CLC522 variable gain amplifier (VGA) is a dc-coupled, two-quadrant multipliers with differential voltage inputs and a single-ended voltage output. Two input buffers and an output operational amplifier are integrated with the multiplier core and make the CLC522 a complete VGA system that does not require external buffering. The CLC522 provides the flexibility of externally setting the maximum gain with only two external resistors. Greater than 40dB gain control is easily achieved through a single high impedance voltage input. The CLC522 provides a linear (in Volts per Volt) relationship between the amplifier's gain and the gain-control input voltage. The CLC522's maximum gain may be set anywhere over a nominal range of 2V/V to 100V/V. The gain control input then provides attenuation from the maximum setting. For example, set for a maximum gain of 100V/V, the CLC522 will provide a 100V/V to 1V/V gain control range by sweeping the gain control input voltage from +1 to -0.98V. Set at a maximum gain of 10V/V, the CLC522 provides a 165MHz signal channel bandwidth and a 165MHz gain control bandwidth. Gain nonlinearity over a 40dB gain range is 0.5% and gain accuracy at AVmax = 10V/V is typically 0.3%. n Differential or single end voltage inputs n Single-ended voltage output Applications n n n n n n n Variable attenuators Pulse amplitude equalizers HF modulators Automatic gain control & leveling loops Video production switching Differential line receivers Voltage controlled filters Gain vs. Gain Control Voltage (Vg) Features n n n n n 330MHz signal bandwidth: AVmax = 2 165MHz gain control bandwidth 0.3 to 60MHz linear phase deviation 0.04% (-68dB) signal-channel non-linearity > 40dB gain adjustment range DS012718-1 Connection Diagram DS012718-4 Pinout DIP & SOIC (c) 2001 National Semiconductor Corporation DS012718 www.national.com CLC522 Wideband Variable Gain Amplifier January 2001 CLC522 Typical Application DS012718-2 2nd Order Tuneable Bandpass Filter DS012718-3 Ordering Information Package Temperature Range Industrial Part Number Package Marking 14-pin plastic DIP -40C to +85C CLC522AJP CLC522AJP N14A 14-pin plastic SOIC -40C to +85C CLC522AJE CLC522AJE M14A, B www.national.com 2 NSC Drawing Lead Temperature (Soldering 10 sec) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Operating Ratings Supply Voltage Short Circuit Current Common-Mode Input Voltage Maximum Junction Temperature Storage TemperatureRange Thermal Resistance Package MDIP SOIC 7V 80mA VCC +200C -65C to +150C +300C (JC) 55C/W 35C/W (JA) 100C/W 105C/W Electrical Characteristics (VCC = 5 V; AVmax = +10; Rf = 1k; Rg = 182; RL = 100; Vg = +1.1V) Symbol Parameter Ambient Temperature Conditions CLC522AJE, AJP Typ Min/Max Ratings (Note 2) Units +25C +25C 0 to +70C -40 to +85C VOUT < 0.5VPP 165 120 115 110 MHz VOUT < 5.0VPP 150 100 95 90 MHz Gain Control Bandwidth (Note 5) VOUT < 0.5VPP 165 120 115 110 MHz Gain Flatness VOUT < 0.5VPP Frequency Domain Response -3dB Bandwidth (Note 7) Peaking (Note 7) DC to 30MHz 0 0.1 0.1 0.1 dB Rolloff (Note 7) DC to 30MHz 0.05 0.25 0.25 0.4 dB Linear Phase Deviation DC to 60MHz 0.3 1.0 1.1 1.2 deg Feedthrough (Note 7), (Note 6) 30MHz -62 -57 -57 -57 dB Time Domain Response Rise and Fall Time 0.5V Step 2.2 2.9 3.0 3.2 ns 5.0V Step 3.0 5.0 5.0 5.0 ns Settling Time 2.0V Step to 0.1% 12 18 18 18 ns Overshoot 0.5V Step 2 15 15 15 % Slew Rate 4.0V Step 2000 1400 1400 1400 V/s 2nd Harmonic Distortion (Note 7) 2VPP, 20MHz -50 -44 -44 -44 dBc 3rd Harmonic Distortion (Note 7) 2VPP, 20MHz -65 -58 -56 -54 Equivalent Input Noise 1 to 200MHz 5.8 6.2 6.5 6.8 1 to 200MHz -152 -150 -149 -149 dBm (1Hz) Signal Channel Nonlinearity (SGNL) (Note 4) VOUT = 2VPP 0.04 0.1 0.1 0.1 % Gain Control Nonlinearity (GCNL) (Note 4) Full Range 0.5 2.0 2.2 3.0 % Gain Error (GACCU) (Note 4) AVmax = +10 Distortion And Noise Response Noise Floor dBc nV/ Gain Accuracy 0.0 0.5 0.5 1.0 dB Vg High +990 +990 60 +990 60 +990 60 mV Vg Low -975 -975 80 -975 80 -975 80 mV 2.2 1.2 1.2 1.4 V Static, DC Performance VIN Voltage Range Common Mode Bias Current (Note 4) Average Drift Offset Current (Note 4) Average Drift Resistance Capacitance 3 9 21 26 45 A 65 - 175 275 nA/C 0.2 2.0 3.0 4.0 A 5 - 30 40 nA/C 1500 650 450 175 k 1.0 2.0 2.0 2.0 pF www.national.com CLC522 Absolute Maximum Ratings (Note 1) CLC522 Electrical Characteristics (Continued) (VCC = 5 V; AVmax = +10; Rf = 1k; Rg = 182; RL = 100; Vg = +1.1V) Symbol Parameter Conditions Typ Min/Max Ratings (Note 2) Units Static, DC Performance Vg Bias Current 15 Average Drift 47 82 A 125 - 300 600 nA/C Resistance 100 38 30 15 k Capacitance 1.0 2.0 2.0 2.0 pF 4.0 70 3.7 47 3.6 40 3.5 25 mA 25 85 95 120 mV 100 - 350 400 V/C Output Voltage Range RL = Current Offset Voltage (Note 4) AVmax = +10 Average Drift Resistance IRgmax ICC 38 V 0.1 0.2 0.3 0.6 1.8 1.37 1.26 1.15 mA 10 40 40 40 mV/V Power Supply Sensitivity (Note 7) Output Referred Common Mode Rejection Ratio Input Referred 70 59 59 59 dB Supply Current (Note 4) RL = 46 61 62 63 mA Note 1: "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The table of "Electrical Characteristics" specifies conditions of device operation. Note 2: Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are determined from tested parameters. Note 3: AJE (SOIC) is tested/guaranteed with Rf = 866 and Rg 165 Note 4: J-level: spec. is 100% tested at +25C, sample tested at +85C. Note 5: Tested with VIN = 0.2V and Vg < 0.5VPP Note 6: Feedthrough is tested at maximum attenuation (i.e., Vg = -1.1V Note 7: J-level, spec is sample tested at 25C. Typical Performance Characteristics Frequency Response (AVmax = 2) Frequency Response (AVmax =10) DS012718-6 DS012718-5 www.national.com 4 (Continued) Frequency Response (AVmax =100) PSRR and CMRR (input Referred) CLC522 Typical Performance Characteristics DS012718-7 DS012718-8 Feed-Through Isolation Gain Flatness & Linear Phase Deviation DS012718-10 DS012718-9 SGNL vs. Vg, Gain Large Signal Frequency Response DS012718-12 DS012718-11 5 www.national.com CLC522 Typical Performance Characteristics (Continued) Large & Small Signal Pulse Response Gain Control Settling Time & Delay DS012718-13 Gain Control Channel Feedthrough DS012718-14 Short Term Settling Time DS012718-15 DS012718-16 Long Term Settling Time Settling Time vs. Capacitive Load DS012718-18 DS012718-17 www.national.com 6 (Continued) Settling Time vs. Gain Differential Gain & Phase DS012718-20 DS012718-19 Differential Gain & Phase CLC522 Typical Performance Characteristics Input Referred Voltage Noise vs. AVmax DS012718-21 DS012718-22 2nd Harmonic Distortion vs. POUT 3rd Harmonic Distortion vs. POUT DS012718-23 DS012718-24 7 www.national.com CLC522 Typical Performance Characteristics (Continued) -1dB Compression at Maximum Gain DS012718-25 Application Division Theory of Operation The CLC522 is a linear wideband variable gain amplifier as illustrated in Figure 1. A voltage input signal may be applied differentially between the two inputs (+VIN, -VIN), or single-endedly by grounding one of the unused inputs. (2) The gain of the CLC522 is therefore a function of three external variables; Rg, Rf and Vg as expressed in Eq. 2. The gain control voltage (V) has an ideal input range of -1V Vg + 1V. At Vg = + 1V, the gain of the CLC522 is at its maximum as expressed in Eq. 3. (3) Notice also that Eq. 3 holds for both differential and singleended operation. Choosing Rf and Rg DS012718-26 FIGURE 1. Rg is calculated from Equation 4. Vinputmax is the maximum peak The CLC522 input buffers convert the input voltage to a current (IRg) that is a function of the differential input voltage (VINPUT = +VIN- -VIN) and the value of the gain-setting resistor (Rg). This current (IRg) is then mirrored to a gain stage with a current gain of 1.85. The voltage controlled two-quadrant multiplier attenuates this current which is then converted to a voltage via the output amplifier. This output amplifier is a current-feedback op amp configured as a transimpedance amplifier. Its transimpedance gain is the feedback resistor (Rf). The input signal, output, and gain control are all voltages. The output voltage can easily be calculated as seen in Eq. 1. (4) input voltage (Vpk) determined by the application. IRgmax is the maximum allowable current through Rg and is typically 1.8mA. Once AVmax is determined from the minimum input and desired output voltages, Rf is then determined using Eq. 5. These values of Rf and Rg are (5) the minimum possible values that meet the input voltage and maximum gain constraints. Scaling the resistor values will decrease bandwidth and improve stability. (1) www.national.com 8 the actual gain equation. Each of the gain error terms are specified in the Electrical Characteristics table and are defined below and illustrated in Figure 4. GACCU : error of AVmax, expressed as dB. (Continued) GCNL : deviation from theoretical expressed as . Vghigh : voltage on Vg producing AVmax. Vglow : voltage on Vg producing AVmin = 0V/V. Vghigh, Vglow : error of Vghigh, Vglow expressed as mV. DS012718-32 FIGURE 2. Bandwidth vs. Vinputmax vs. Avmax Figure 2 illustrates the resulting CLC522 bandwidths as a function of the maximum and minimum input voltages when Vout is held constant at 1Vpp. Adjusting Offsets Treating the offsets introduced by the input and output stages of the CLC522 is easily accomplished with a two step process. The offset voltage of the output stage is treated by first applying -1.1Volts on Vg, which effectively isolates the input stage and multiplier core from the output stage. DS012718-34 FIGURE 4. Combining these error terms with Eq. 2 gives the gain envelope equation and is expressed in Eq. 7. From the Electrical Characteristics table, the nominal endpoint values of Vg are: Vghigh = 990mV and Vglow = -975mV. (6) Signal-Channel Nonlinearity Signal-channel nonlinearity, SGNL, also known as integral endpoint linearity, measures the non-linearity of an amplifier's voltage transfer function. The CLC522's SGNL, as it is specified in the Electrical Characteristics table, is measured while the gain is set at its maximum (i.e. Vg =+1.1V). The Typical Performance Characteristics plot lableled SGNL & Gain vs Vg illustrates the CLC522's SGNL as Vg is swept through its full range. As can be seen in this plot, when the gain as reduced from AVmax, SGNL improves to < 0.02%(-74cB) at Vg =0 and then degrades somewhat at the lowest gains. Noise DS012718-33 FIGURE 3. As illustrated in Figure 3, the trip pot located at R14 on the CLC522 Evaluation Board should then be adjusted in order to null the offset voltage seen at the CLC522's output (pin 10). Once this is accomplished, the offset errors introduced by the input stage and multiplier core can then be treated. The second step requires the absence of an input signal and matched source impedances on the two input pins in order to cancel the bias current errors. This done then +1.1Volts should be applied to Vg and the trip pot located at R10 adjusted in order to mull the offset voltage seen at the CLC522's output. If a more limited gain range is anticipated, the above adjustments should be made at these operating points. Gain Errors The CLC522's gain equation as theoretically expressed in Eq. 2 must include the device's error terms in order to yield Figure 5 describes the CLC522's input-referred spot noise density as a function of AVmax. The plot includes all the noise contributing terms. At AVmax = 10V/V, the CLC522 has a typical input referred spot noise density (eni) of 5.8nV/ . The input RMS voltage noise can be determined from the following single-pole model: 9 www.national.com CLC522 Application Division CLC522 Application Division (Continued) (7) Further discussion and plots of noise and the noise model is provided in Application Note OA-23. National also provides SPICE models that model internal noise and other parameters for a typical part. DS012718-40 FIGURE 7. Vref (pin 9) to ground should include a small resistor value of 25 ohms or greater to buffer the internal voltage follower. The parasitic inductance of component leads or traces to pins 4, 5 and 9 should also be kept to a minimum. Parasitic or load capacitance, CL, on the output (pin 10) degrades phase margin and can lead to frequency response peaking or circuit oscillation. This should be treated with a small series resistor between output (pin 10) and CL(see the plot Settling Time vs. Capacitive Load for a recommended series resistance). Component parasitics also influence high frequency results, therefore it is recommended to use metal film resistors such as RN55D or leadless components such as surface mount devices. High profile sockets are not recommended. If socketing is necessary, it is recommended to use low impedance flush mount connector jacks such as Cambion (P/N 4502598). Application Circuits Four-Quadrant Multiplier Applications requiring multiplication, squaring or other non-linear functions can be implemented with four-quadrant multipliers. The CLC522 implements a four-quadrant multiplier as illustrated in Figure 8. DS012718-38 FIGURE 5. Input referred Voltage Noise vs. AVmax Circuit Layout Considerations Please refer to the CLC522 Evaluation Board literature for precise layout guidelines. Good high-frequency operation requires all of the de-coupling capacitors shown in to be placed as close as possible to the power supply pins in order to insure a proper high-frequency low-impedance bypass. DS012718-39 FIGURE 6. Adequate ground plane and low-inductive power returns are also required of the layout. Minimizing the parasitic capacitances at pins 3, 4, 5, 6, 9, 10 and 12 as shown in Figure 7 will assure best high frequency performance. DS012718-41 FIGURE 8. www.national.com 10 CLC522 Application Division (Continued) Frequency Shaping Frequency shaping the bandwidth extension of the CLC522 can be accomplished using parallel networks connected across the Rg ports. The network shown in the Figure 9 schematic will effectively extend the CLC522's bandwidth. DS012718-42 FIGURE 9. 2nd Order Tuneable Bandpass Filter The CLC522 Variable-Gain Amplifier placed into feedback loops provide signal processing functions such as 2nd order tuneable bandpass filters. The center frequency of the 2nd order bandpass illustrated on the front page is adjusted through the use of the CLC522's gain-control voltage, Vg. The integrators implemented with two CLC420s, provide the coefficients for the transfer function. 11 www.national.com CLC522 Physical Dimensions inches (millimeters) unless otherwise noted 14-Pin SOIC NS Package Number M14A 14-Pin SOIC NS Package Number M14B www.national.com 12 CLC522 Wideband Variable Gain Amplifier Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Pin MDIP NS Package Number N14A LIFE SUPPORT POLICY NATIONAL'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation Americas Tel: 1-800-272-9959 Fax: 1-800-737-7018 Email: support@nsc.com www.national.com National Semiconductor Europe Fax: +49 (0) 180-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 69 9508 6208 English Tel: +44 (0) 870 24 0 2171 Francais Tel: +33 (0) 1 41 91 8790 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 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