NCP502SN34T1G - ON SEMICONDUCTOR

March, 2010 − Rev. 17

1Publication Order Number:

NCP502/D

NCP502, NCP502A

80 mA CMOS Low Iq, Low-

Dropout Voltage Regulator

The NCP502/A series of fixed output linear regulators are designed

for handheld communication equipment and portable battery powered

applications which require low quiescent. The NCP502/A series

features an ultra−low quiescent current of 40 A. Each device contains

a voltage reference unit, an error amplifier, a PMOS power transistor,

resistors for setting output voltage, current limit, and temperature limit

protection circuits.

The NCP502/A has been designed to be used with low cost ceramic

capacitors. The device is housed in the micro−miniature SC70−5 and

TSOP−5 surface mount packages. Standard voltage versions are 1.5 V,

1.8 V, 2.5 V, 2.7 V, 2.8 V, 2.9 V, 3.0 V, 3.1 V, 3.3 V, 3.4 V, 3.5 V, 3.6 V,

3.7 V and 5.0 V. Other voltages are available in 100 mV steps.

Features

•Low Quiescent Current of 40 A Typical

•Excellent Line and Load Regulation

•Low Output Voltage Option

•Output Voltage Accuracy of 2.0%

•Industrial Temperature Range of −40°C to 85°C

•NCP502: 1.3 V Enable Threshold High, 0.3 V Enable Threshold Low

•NCP502A: 1.0 V Enable Threshold High, 0.4 V Enable Threshold Low

•These are Pb−Free Devices

Typical Applications

•Cellular Phones

•Battery Powered Consumer Products

•Hand−Held Instruments

•Camcorders and Cameras

Figure 1. Typical Application Diagram

This device contains 86 active transistors

Vout

Battery or

Unregulated

Voltage C1

OFF

See detailed ordering and shipping information in the package

dimensions section on page 8 of this data sheet.

ORDERING INFORMATION

PIN CONNECTIONS

3N/C

Vin

2GND

Enable 4

Vout

(Top View)

xxx = Specific Device Code

A = Assembly Location

Y = Year

W = Work Week

M = Date Code

G= Pb−Free Package

MARKING

DIAGRAM

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123

5SC70−5

SQ SUFFIX

CASE 419A

xxx MG

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(Note: Microdot may be in either location)

TSOP−5

(SOT23−5, SC59−5)

SN SUFFIX

CASE 483 1

xxx AYWG

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ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ

PIN FUNCTION DESCRIPTION

ÁÁÁÁ

Pin No.

ÁÁÁÁÁ

Pin Name

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ

Description

ÁÁÁÁ

ÁÁÁÁÁ

Vin

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ

Positive power supply input voltage.

ÁÁÁÁ

ÁÁÁÁÁ

GND

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ

Power supply ground.

ÁÁÁÁ

ÁÁÁÁÁ

Enable

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ

This input is used to place the device into low−power standby. When this input is pulled low, the device is

disabled. If this function is not used, Enable should be connected to Vin.

ÁÁÁÁ

ÁÁÁÁÁ

N/C

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ

No internal connection.

ÁÁÁÁ

ÁÁÁÁÁ

Vout

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ

Regulated output voltage.

MAXIMUM RATINGS

Rating Symbol Value Unit

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ

Input Voltage

ÁÁÁÁÁ

Vin

ÁÁÁÁÁÁÁÁ

ÁÁÁÁ

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ

Enable Voltage

ÁÁÁÁÁ

Enable

ÁÁÁÁÁÁÁÁ

−0.3 to Vin +0.3

ÁÁÁÁ

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ

Output Voltage

ÁÁÁÁÁ

Vout

ÁÁÁÁÁÁÁÁ

−0.3 to Vin +0.3

ÁÁÁÁ

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ

Power Dissipation and Thermal Characteristics

Power Dissipation

ÁÁÁÁÁ

ÁÁÁÁÁÁÁÁ

Internally Limited

ÁÁÁÁ

Operating Junction Temperature TJ+150 °C

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ

Operating Ambient Temperature

ÁÁÁÁÁ

ÁÁÁÁÁÁÁÁ

−40 to +85

ÁÁÁÁ

°C

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ

Storage Temperature

ÁÁÁÁÁ

Tstg

ÁÁÁÁÁÁÁÁ

−55 to +150

ÁÁÁÁ

°C

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the

Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect

device reliability.

1. Latchup capability (85°C) "100 mA DC with trigger voltage.

THERMAL CHARACTERISTICS

Rating Symbol Test Conditions Value Unit

Thermal Characteristics, TSOP−5 (Note 2)

Thermal Resistance, Junction−to−Air (Note 3)

RJA 1 oz Copper Thickness, 100 mm2

205

°C/W

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ

Thermal Resistance, Junction−to−Ambient, SC70−5

ÁÁÁÁ

RJA

ÁÁÁÁ

400

ÁÁÁ

°C/W

NOTE: Single component mounted on a 80 x 80 x 15 mm FR4 PCB with stated copper head spreading area. Using the following

boundary conditions as stated in EIA/JESD 51−1, 2, 3, 7, 12.

2. True no connect. Printed circuit board traces are allowable.

3. This device series contains ESD protection and exceeds the following tests:

Human Body Model 2000 V per MIL−STD−883, Method 3015.

Machine Model Method 200 V..

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ELECTRICAL CHARACTERISTICS (Vin = Vout(nom.) + 2.0 V, Venable = Vin, Cin = 1.0 F, Cout = 1.0 F, TJ = 25°C, unless

otherwise noted.)

Characteristic Symbol Min Typ Max Unit

Output Voltage (TA = 25°C, Iout = 10 mA) Vin = Vout (nom.) +1.0 V

1.5 V

1.8 V

2.5 V

2.7 V

2.8 V

2.9 V

3.0 V

3.1 V

3.3 V

3.4 V

3.5 V

3.6 V

3.7 V

5.0 V

Vout

1.455

1.746

2.425

2.646

2.744

2.842

2.94

3.038

3.234

3.332

3.43

3.528

3.626

4.900

1.5

1.8

2.5

2.7

2.8

2.9

3.0

3.1

3.3

3.4

3.5

3.6

3.7

5.0

1.545

1.854

2.575

2.754

2.856

2.958

3.06

3.162

3.366

3.468

3.57

3.672

3.774

5.100

Output Voltage (TA = −40°C to 85°C, Iout = 10 mA) Vin = Vout (nom.)

1.5 V

1.8 V

2.5 V

2.7 V

2.8 V

2.9 V

3.0 V

3.1 V

3.3 V

3.4 V

3.5 V

3.6 V

3.7 V

5.0 V

Vout

1.455

1.746

2.425

2.619

2.716

2.813

2.910

3.007

3.201

3.298

3.43

3.528

3.626

4.900

1.5

1.8

2.5

2.7

2.8

2.9

3.0

3.1

3.3

3.4

3.5

3.6

3.7

5.0

1.545

1.854

2.575

2.781

2.884

2.987

3.09

3.193

3.399

3.502

3.57

3.672

3.774

5.100

Line Regulation (Vin = Vout + 1.0 V to 12 V, Iout = 10 mA) Regline −0.4 3.0 mV/V

Load Regulation (Iout = 1.0 mA to 80 mA) Regload −0.2 0.8 mV/mA

Output Current (Vout = (Vout at Iout = 80 mA) −3%) Io(nom.) 80 180 −mA

Dropout Voltage (TA = −40°C to 85°C, Iout = 80 mA, Measured at

Vout −3.0%)

1.5 V−1.7 V

1.8 V−2.4 V

2.5 V−2.6 V

2.7 V−2.9 V

3.0 V−4.0 V

4.1 V−5.0 V

Vin−Vout

−

1500

1300

1000

850

600

1900

1700

1400

1300

1200

900

Quiescent Current

(Enable Input = 0 V)

(Enable Input = Vin, Iout = 1.0 mA to Io(nom.))

−

0.1

1.0

A

Output Short Circuit Current (Vout = 0 V) Iout(max) 90 200 500 mA

Ripple Rejection (f = 1.0 kHz, 15 mA) RR −55 −dB

Output Voltage Noise (f = 100 Hz to 100 kHz) Vn−180 −Vrms

Enable Input Threshold Voltage (NCP502)

(Voltage Increasing, Output Turns On, Logic High)

(Voltage Decreasing, Output Turns Off, Logic Low)

Vth(en)

1.3

−

0.3

Enable Input Threshold Voltage (NCP502A)

(Voltage Increasing, Output Turns On, Logic High)

(Voltage Decreasing, Output Turns Off, Logic Low)

Vth(en)

1.0

−

0.4

Output Voltage Temperature Coefficient TC−100 −ppm/°C

4. Maximum package power dissipation limits must be observed.

PD +TJ(max) *TA

RJA

5. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.

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−40

OUTPUT VOLTAGE

DEVIATION (mV)

100504020100

t, TIME (s)

−20

30 60 70

VIN, INPUT

VOLTAGE (V)

80 90

T, TEMPERATURE (°C)

IQ, QUIESCENT CURRENT (A)

73210

Figure 2. Quiescent Current versus Input Voltage

VIN, INPUT VOLTAGE (V)

Figure 3. Quiescent Current versus Temperature

Figure 4. Line Transient Response Figure 5. Enable Response

100600−20−40−60

32.5

42.5

VOUT = 3.0 V

37.5

VIN = 5.0 V

VOUT = 3.0 V

VIN = 4.0 V to 5.0 V

456 40

COUT = 1.0 F

IOUT = 30 mA

20 80

VOUT

, OUTPUT

VOLTAGE (V)

1.00.40.30.10

t, TIME (ms)

1.0

2.0

0.2 0.5 0.6

ENABLE

VOLTAGE (V)

0.7 0.9

3.0

VIN = 4.0 V

VENABLE = 0 to 4.0 V

IOUT = 30 mA

COUT = 1.0 F

0.8

−100

OUTPUT VOLTAGE

DEVIATION (mV)

450250200100500

t, TIME (s)

−50

100

150 300 350

IOUT

, OUTPUT

CURRENT (mA)

400

Figure 6. Load Transient Response Figure 7. Ripple Rejection/Frequency

COUT = 1.0 F

VOUT = 3.0 V

VIN = 4.0 V

0.10.01

FREQUENCY (kHz)

1.0

RIPPLE REJECTION (dB)

VIN = 4.5 V + 0.5 VP−P

VOUT = 3.0 V

IOUT = 30 mA

COUT = 1.0 F

10 100

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Figure 8. Output Voltage versus Temperature Figure 9. Output Voltage versus Input Voltage

Figure 10. Dropout Voltage versus Temperature

VIN − VOUT

, DROPOUT VOLTAGE (mV)

12525−50

T, TEMPERATURE (°C)

1200

VOUT

, OUTPUT VOLTAGE (V)

100604020−20−40−60

T, TEMPERATURE (°C)

VOUT

, OUTPUT VOLTAGE (V)

610

3.5

VIN, INPUT VOLTAGE (V)

2.5

2.96

2.995

2.97

080

2.965

2.99

2.975

2.98

VIN = 12 V CIN = 1.0 F

COUT = 1.0 F

VENABLE = VIN

80 mA LOAD

VIN = 4.0 V

IOUT = 10 mA

2345

1.5

0.5

−25 0 50 75 100

1000

800

600

400

200

40 mA LOAD

10 mA LOAD

2.985

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DEFINITIONS

Load Regulation

The change in output voltage for a change in output

current at a constant temperature.

Dropout Voltage

The input/output differential at which the regulator output

no longer maintains regulation against further reductions in

input voltage. Measured when the output drops 3.0% below

its nominal. The junction temperature, load current, and

minimum input supply requirements affect the dropout level.

Maximum Power Dissipation

The maximum total dissipation for which the regulator

will operate within its specifications.

Quiescent Current

The quiescent current is the current which flows through

the ground when the LDO operates without a load on its

output: internal IC operation, bias, etc. When the LDO

becomes loaded, this term is called the Ground current. It is

actually the difference between the input current (measured

through the LDO input pin) and the output current.

Line Regulation

The change in output voltage for a change in input voltage.

The measurement is made under conditions of low

dissipation or by using pulse technique such that the average

chip temperature is not significantly affected.

Line Transient Response

Typical over and undershoot response when input voltage

is excited with a given slope.

Thermal Protection

Internal thermal shutdown circuitry is provided to protect

the integrated circuit in the event that the maximum junction

temperature is exceeded. When activated at typically 160°C,

the regulator turns off. This feature is provided to prevent

failures from accidental overheating.

Maximum Package Power Dissipation

The maximum power package dissipation is the power

dissipation level at which the junction temperature reaches

its maximum operating value, i.e. 125°C. Depending on the

ambient power dissipation and thus the maximum available

output current.

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APPLICATIONS INFORMATION

A typical application circuit for the NCP502/A series is

shown in Figure 1, front page.

Input Decoupling (C1)

A 1.0 F capacitor either ceramic or tantalum is

recommended and should be connected close to the

NCP502/A package. Higher values and lower ESR will

improve the overall line transient response. If large line or

load transients are not expected, then it is possible to operate

the regulator without the use of a capacitor.

TDK capacitor: C2012X5R1C105K, or C1608X5R1A105K

Output Decoupling (C2)

The NCP502/A is a stable regulator and does not require

any specific Equivalent Series Resistance (ESR) or a

minimum output current. Capacitors exhibiting ESRs

ranging from a few m up to 5.0  can thus safely be used.

The minimum decoupling value is 1.0 F and can be

augmented to fulfill stringent load transient requirements.

The regulator accepts ceramic chip capacitors as well as

tantalum devices. Larger values improve noise rejection and

load regulation transient response.

TDK capacitor: C2012X5R1C105K, C1608X5R1A105K,

or C3216X7R1C105K

Enable Operation

The enable pin will turn on the regulator when pulled high

and turn off the regulator when pulled low. These limits of

threshold are covered in the electrical specification section

of this data sheet. If the enable is not used then the pin should

be connected to Vin.

Hints

Please be sure the Vin and GND lines are sufficiently

wide. When the impedance of these lines is high, there is a

chance to pick up noise or cause the regulator to

malfunction.

Set external components, especially the output capacitor,

as close as possible to the circuit, and make leads as short as

possible.

Thermal

As power across the NCP502/A increases, it might

become necessary to provide some thermal relief. The

maximum power dissipation supported by the device is

dependent upon board design and layout. Mounting pad

configuration on the PCB, the board material and also the

ambient temperature effect the rate of temperature rise for

the part. This is stating that when the NCP502/A has good

thermal conductivity through the PCB, the junction

temperature will be relatively low with high power

dissipation applications.

The maximum dissipation the package can handle is

given by:

PD +TJ(max) *TA

RJA

If junction temperature is not allowed above the

maximum 125°C, then the NCP502/A can dissipate up to

250 mW @ 25°C.

The power dissipated by the NCP502/A can be calculated

from the following equation:

Ptot +ƪVin *I

gnd (Iout)ƫ)[Vin *Vout]*I

out

VinMAX +Ptot )Vout *Iout

Ignd )Iout

If an 80 mA output current is needed then the ground

current from the data sheet is 40A. For an NCP502/A

(3.0 V), the maximum input voltage will then be 6.12 V.

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ORDERING INFORMATION

Device

Nominal

Output Voltage Marking Package Shipping†

NCP502SQ15T1G 1.5 LCC

SC70−5

(Pb−Free) 3000 / Tape & Reel

NCP502SQ15T2G

NCP502SQ18T1G 1.8 LCD

NCP502SQ18T2G

NCP502SQ25T1G 2.5 LCE

NCP502SQ25T2G

NCP502SQ27T1G 2.7 LCF

NCP502SQ27T2G

NCP502SQ28T1G 2.8 LCG

NCP502SQ28T2G

NCP502SQ29T1G 2.9 LJI

NCP502SQ29T2G

NCP502SQ30T1G 3.0 LCH

NCP502SQ30T2G

NCP502SQ31T1G 3.1 LJJ

NCP502SQ31T2G

NCP502SQ33T1G 3.3 LCI

NCP502SQ33T2G

NCP502SQ34T1G 3.4 LJK

NCP502SQ34T2G

NCP502SQ35T1G 3.5 LGO

NCP502SQ35T2G

NCP502SQ36T1G 3.6 LIU

NCP502SQ36T2G

NCP502SQ37T1G 3.7 LJQ

NCP502SQ37T2G

NCP502SQ50T1G 5.0 LCJ

NCP502SQ50T2G

NCP502ASQ15T1G 1.5 LGP

NCP502ASQ18T1G 1.8 LGQ

NCP502ASQ25T1G 2.5 LGR

NCP502ASQ27T1G 2.7 LGS

NCP502ASQ28T1G 2.8 LGT

NCP502ASQ30T1G 3.0 LGU

NCP502ASQ33T1G 3.3 LGV

NCP502ASQ35T1G 3.5 LGW

NCP502ASQ50T1G 5.0 LGX

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ORDERING INFORMATION

Device Shipping†

PackageMarking

Nominal

Output Voltage

NCP502SN28T1G 2.8 LKD

TSOP−5

(Pb−Free) 3000 / Tape & Reel

NCP502SN29T1G 2.9 LJN

NCP502SN30T1G 3.0 LKE

NCP502SN31T1G 3.1 LJO

NCP502SN33T1G 3.3 LKF

NCP502SN34T1G 3.4 LJK

NCP502SN35T1G 3.5 LJ6

NCP502SN36T1G 3.6 AC4

NCP502SN37T1G 3.7 LKC

NCP502SN50T1G 5.0 LKG

Additional voltages in 100 mV steps are available upon request by contacting your ON Semiconductor representative.

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

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PACKAGE DIMENSIONS

SC70−5, SC−88A, SOT−353

SQ SUFFIX

CASE 419A−02

ISSUE J

0.65

0.025

0.65

0.025

0.50

0.0197

0.40

0.0157

1.9

0.0748 ǒmm

inchesǓ

SCALE 20:1

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

SOLDERING FOOTPRINT*

NOTES:

1. DIMENSIONING AND TOLERANCING

PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. 419A−01 OBSOLETE. NEW STANDARD

419A−02.

4. DIMENSIONS A AND B DO NOT INCLUDE

MOLD FLASH, PROTRUSIONS, OR GATE

BURRS.

DIM

MIN MAX MIN MAX

MILLIMETERS

1.80 2.200.071 0.087

INCHES

B1.15 1.350.045 0.053

C0.80 1.100.031 0.043

D0.10 0.300.004 0.012

G0.65 BSC0.026 BSC

H--- 0.10---0.004

J0.10 0.250.004 0.010

K0.10 0.300.004 0.012

N0.20 REF0.008 REF

S2.00 2.200.079 0.087

B0.2 (0.008) MM

12 3

D 5 PL

−B−

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PACKAGE DIMENSIONS

TSOP−5

CASE 483−02

ISSUE H

NOTES:

1. DIMENSIONING AND TOLERANCING PER

ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETERS.

3. MAXIMUM LEAD THICKNESS INCLUDES

LEAD FINISH THICKNESS. MINIMUM LEAD

THICKNESS IS THE MINIMUM THICKNESS

OF BASE MATERIAL.

4. DIMENSIONS A AND B DO NOT INCLUDE

MOLD FLASH, PROTRUSIONS, OR GATE

BURRS.

5. OPTIONAL CONSTRUCTION: AN

ADDITIONAL TRIMMED LEAD IS ALLOWED

IN THIS LOCATION. TRIMMED LEAD NOT TO

EXTEND MORE THAN 0.2 FROM BODY.

DIM MIN MAX

MILLIMETERS

A3.00 BSC

B1.50 BSC

C0.90 1.10

D0.25 0.50

G0.95 BSC

H0.01 0.10

J0.10 0.26

K0.20 0.60

L1.25 1.55

M0 10

S2.50 3.00

123

54 S

0.7

0.028

1.0

0.039

ǒmm

inchesǓ

SCALE 10:1

0.95

0.037

2.4

0.094

1.9

0.074

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

SOLDERING FOOTPRINT*

0.20

CAB

T0.10

2X T0.20

NOTE 5

SEATING

PLANE

0.05

DETAIL Z

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice

to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability

arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.

“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All

operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights

nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications

intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should

Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,

and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death

associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal

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PUBLICATION ORDERING INFORMATION

N. American Technical Support: 800−282−9855 Toll Free

USA/Canada

Europe, Middle East and Africa Technical Support:

Phone: 421 33 790 2910

Japan Customer Focus Center

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NCP502/D

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