CENTELLAX • Web: http://www.centellax.com/ • Email: sales@centellax.com • Tel: 866.522.6888 • Fax: 707.568.7647
CENTELLAX
UATM30M2C Datasheet
Specifications subject to change without notice. Copyright © 2001-2004 Centellax, Inc. Printed in USA. 10 Aug 2004.
Key Specifications
Vdd=5.0V, Idd=150mA, Zo=50ΩSpecifications pertain to wafer measurements with RF probes and DC bias cards @ 25°C
6 - 20GHz 1.5 - 20GHz 0.04 - 30GHz
Parameter Description Min Typ Max Min Typ Max Min Typ Max
S21 (dB) Small Signal Gain 16.5 18 16.5 18 14.5 16
Flatness (±dB) Gain Flatness 0.3 0.6 0.6 1.0 1.5 2.0
S11 (dB) Input Match -16 -13 -16 -13 -10 -8
S22 (dB) Output Match -18 -15 -18 -15 -18 -15
S12 (dB) Reverse Isolation -35 -30 -35 -30 -30 -25
P-1dB (dBm) 1dB Compressed Output Power 16 17 16 17 12 13.5
Psat (dBm) Saturated Output Power 19 20 19 20 14 16.5
Pout @16dB (dBm) Output Power at 16dB Gain 17 18.5 17 18.5
NF (dB) Noise Figure 2.5 5 5.5
RFdet (mV/mW) RF Detector Sensitivity 0.5 0.5 0.5
0.04 - 30GHz Broadband MMIC
Low-Noise Amplifier
Application
The UATM30M2C Broadband MMIC Low-Noise
Amplifier is designed for low-noise and broadband
flat-gain applications in RF and microwave commu-
nications, test equipment and military systems. By
using specific external components, the bandwidth
of operation can be extended below 40MHz.
Description
The UATM30M2C is an eight stage traveling wave
amplifier. The amplifier has been designed for low
noise, flat gain, and good return loss to 30GHz. The
amplifier typically has 2.5dB NF and 18dB gain from
6-20GHz, and 16dB gain from 0.04-30GHz.
Features
The UATM30M2C has >30dB dynamic gain control,
and includes a temperature-referenced power detec-
tor output.
Device Highlights
•Low noise, ultra-flat gain 6-20GHz:
•2.5dB NF, 18 ± 0.3dB gain
•Excellent 1.5-20GHz performance:
•Very flat gain (18 ± 0.6dB)
•High Psat at 20GHz (20dBm)
•High P-1dB at 20GHz (17dBm)
•Wideband operation: 0.04-30GHz
•Good input / output return loss
•High isolation
•>30dB dynamic gain control
•Integrated power detector
•100% DC, RF, and visually tested
•Size: 2390x920um (94.1x36.2mil)
CENTELLAX • Web: http://www.centellax.com/ • Email: sales@centellax.com • Tel: 866.522.6888 • Fax: 707.568.7647
UATM30M2C S21
0
5
10
15
20
0 5 10 15 20 25 30
Frequency (GHz)
S21 (dB)
5V, 150mA 7V, 190mA
Typical IC performance measured on-wafer
Typical IC performance measured on-wafer
UATM30M2C S11, S22
-30
-25
-20
-15
-10
-5
0
0 5 10 15 20 25 30
Frequency (GHz)
S11, S 22 ( dB)
5V, 150mA S11 5V, 150mA S22
7V, 190mA S11 7V, 190mA S22
UATM30M2C Output Power
12
14
16
18
20
22
24
26
0 5 10 15 20 25 30
Frequency (GHz)
Output Power (dBm)
UATM30M2C S12
-50
-40
-30
-20
-10
0
0 5 10 15 20 25 30
Frequency (GHz)
S12 (dB)
5V, 150mA 7V, 190mA
UATM30M2C Gr oup Delay
0
10
20
30
40
50
60
70
80
0 5 10 15 20 25 30
Frequency (GHz)
Group Delay (ps)
5V, 150mA 7V, 190mA
Typical measurement data is available upon request. Email support@centellax.com for more information.
UATM30M2C Noi se Figure
0
1
2
3
4
5
6
0 5 10 15 20 25 30
Frequency (GHz)
NF ( dB)
Typical IC performance measured on-wafer
Typical IC performance measured on-wafer Typical IC performance measured on-wafer
Typical IC performance with package de-embedded
CENTELLAX • Web: http://www.centellax.com/ • Email: sales@centellax.com • Tel: 866.522.6888 • Fax: 707.568.7647
DC Bias
The UATM30M2C is biased by apply-
ing a positive voltage to the drain
(Vdd), then setting the drain current
(Idd) using a negative voltage on the
gate (Vg1).
When zero volts is applied to the gate,
the drain to source channel is open;
this results in high Idd. When Vg1 is
biased negatively, the channel is
pinched off and Idd decreases.
The nominal bias is Vdd=5.0V,
Idd=150mA. Improved noise or power
performance can be achieved with
application-specific biasing.
Gain Control
Dynamic gain control is available
when operating the amplifier in
the linear gain region. Negative
voltage applied to the second
gate (Vg2) reduces amplifier gain.
RF Power Detection
RF output power can be calcu-
lated from the difference between
the RF detector voltage and the
DC detector voltage, minus a DC
offset. Please consult the power
detector application note avail-
able from the Centellax webpage.
Low-Frequency Use
The UATM30M2C has been
designed so that the bandwidth
can be extended to low frequen-
cies. The low end corner fre-
quency of the device is primarily
determined by the external bias-
ing and AC coupling circuitry.
Matching
The amplifier incorporates on-
chip termination resistors on the
RF input and output. These resis-
tors are RF grounded through on-
chip capacitors, which are small
and become open circuits at fre-
quencies below 1GHz.
A pair of gate and drain termina-
tion bypass pads are provided for
connecting external capacitors
required for the low frequency
extension network. These cap ac-
itors should be 10x the value of
the DC blocking capacitors.
DC Blocks
The amplifier is DC coupled to the
RF input and output pads; DC
voltage on these pads must be
isolated from external circuitry.
For operation above 2GHz, a
series DC-blocking capacitor with
minimum value of 20pF is recom-
mended; operation above 40MHz
requires a minimum of 120pF.
Inductor Bias
DC bias applied to the drain (Vdd)
must be decoupled with an off-
chip RF choke inductor. The
amount of bias inductance will
determine the low frequency
operating point. Inductive biasing
can also be applied to the chip
through the RF output.
For many applications above
2GHz, a bondwire from the Vdd
pad will suffice as the biasing
inductor. Ensure the correct bond
length as shown in the assembly
diagrams.
Supplemental Specifications
Parameter Description Min Typ Max
Vdd Drain Bias Voltage 3V 5V 8V
Idd Drain Bias Current — 150mA 250mA
Vg1 1st Gate Bias Voltage -4V — 0V
Vg2 2nd Gate Bias Voltage Vdd-Vg2<8V N/C +4V
Pin Input Power (CW) 20dBm
Pdc Power Dissipation 0.75W
Tch Channel Temperature 150°C
Θch Thermal Resistance (Tcase=85°C) 18°C/W
CENTELLAX • Web: http://www.centellax.com/ • Email: sales@centellax.com • Tel: 866.522.6888 • Fax: 707.568.7647
CENTELLAX
UATM30M2C Datasheet
Specifications subject to change without notice. Copyright © 2001-2004 Centellax, Inc. Printed in USA. 10 Aug 2004.
Applications Support
Alternate assembly diagrams and other additional
application support are available upon request.
Visit the Centellax website for large printable
assembly diagrams and application notes:
http://www.centellax.com/products/microwave/mmi
cs/UATM30M2C.shtml.
Pick-up and Chip Handling:
This MMIC has exposed air bridges on the top sur-
face. Do not pick up chip with vacuum on the
die center; handle from edges or with a custom
collet.
Thermal Heat Sinking:
To avoid damage and for optimum performance,
you must observe the maximum channel tempera-
ture and ensure adequate heat sinking.
ESD Handling and Bonding:
This MMIC is ESD sensitive; preventive meas-
ures should be taken during handling, die attach,
and bonding.
Epoxy die attach is recommended. Please visit
our website for more handling, die attach and bond-
ing information: http://www.centellax.com/.
Recommended Components
>20pF DC Block:
Presidio SL1010X7R101M16VH
>120pF DC Block:
Presidio SL1010X7R181M16VH
Drain Bias Inductor:
Piconics CC21T36K240G5
Bypass Capacitors:
Drain: Presidio SL5050X7R222M16VH
Gate: Presidio SL3535X7R182M16VH
Chip size: 2390x920um (94.1x36.2mil)
Chip size tolerance: ±5um (0.2mil)
Chip thickness: 100 ±10um (4 ±0.4mil)
Pad dimensions: 80x80um (3.1x3.1mil)
Die size, pad locations, and pad descriptions
2 - 30GHz bonding diagram
40MHz - 30GHz bonding diagram