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74LVC86A
Quad 2-input exclusive OR gate
Product specification
Supercedes data of 1997 Aug 11
IC24 Data Handbook
1998 Apr 28
INTEGRATED CIRCUITS
Philips Semiconductors Product specification
74LVC86AQuad 2-input exclusive OR gate
2
1998 Apr 28 853-2018 19310
FEATURES
•Wide supply range of 1.2V to 3.6V
•Complies with JEDEC standard no. 8-1A
•Inputs accept voltages up to 5.5V
•CMOS low power consumption
•Direct interface with TTL levels
•5-volt tolerant inputs, for interfacing with 5-volt logic
DESCRIPTION
The 74LVC86A is a high-performance, low-power, low-voltage
Si-gate CMOS device that is pin and superior to most advanced
CMOS compatible TTL families.
Inputs can be driven from either 3.3 V or 5 V devices. This feature
allows the use of these devices as translators in a mixed 3.3 V/5 V
environment.
The 74LVC86A provides the 2-input EXCLUSIVE-OR function.
QUICK REFERENCE DATA
GND = 0 V ; Tamb = 25°C; tr = tf ≤ 2.5 ns
SYMBOL PARAMETER CONDITIONS TYPICAL UNIT
tPHL
tPLH Propagation delay
nA, nB to nYn CL = 50 pF;
VCC = 3.3 V 3.0 ns
CIInput capacitance 5.0 pF
CPD Power dissipation capacitance per gate VCC = 3.3 V, VI = GND to VCC128 pF
NOTE:
1. CPD is used to determine the dynamic power dissipation (PD in µW)
PD = CPD × VCC2 × fi Σ (CL × VCC2 × fo) where:
fi = input frequency in MHz; CL = output load capacity in pF;
fo = output frequency in MHz; VCC = supply voltage in V ;
Σ (CL × VCC2 × fo) = sum of the outputs.
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA PKG. DWG. #
14-Pin Plastic DIL –40°C to +85°C74LVC86A N 74LVC86A N SOT27-1
14-Pin Plastic SO –40°C to +85°C74LVC86A D 74LVC86A D SOT108-1
14-Pin Plastic SSOP Type II –40°C to +85°C74LVC86A DB 74LVC86A DB SOT337-1
14-Pin Plastic TSSOP Type I –40°C to +85°C74LVC86A PW 74LVC86APW DH SOT402-1
PIN CONFIGURATION
SV00481
1
2
3
4
5
6
7
1A
1B
1Y
2A
2B
2Y
GND
VCC
4B
4A
4Y
3B
3A
3Y
14
13
12
11
10
9
8
PIN DESCRIPTION
PIN
NUMBER SYMBOL FUNCTION
1, 4, 9, 12 1A – 4A
Data in
p
uts
2, 5, 10, 13 1B – 4B
Data
inp
u
ts
3, 6, 8, 11 1Y – 4Y Data outputs
7 GND Ground (0 V)
14 VCC Positive supply voltage
LOGIC SYMBOL (IEEE/IEC)
SV00479
1
4
9
12
2
5
10
13
3
6
8
11
=1
=1
=1
=1
Philips Semiconductors Product specification
74LVC86AQuad 2-input exclusive OR gate
1998 Apr 28 3
LOGIC SYMBOL
4B
4A
SV00480
1A
1B
2A
2B
3B
3A
1Y
2Y
3Y
4Y
1
2
4
5
13
12
10
9
3
6
11
8
LOGIC DIAGRAM (ONE GATE)
SV00478
A
B
Y
FUNCTION TABLE
INPUTS OUTPUTS
nA nB nY
L L L
L H H
H L H
H H L
NOTES:
H =HIGH voltage level
L =LOW voltage level
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
CONDITIONS
LIMITS
UNIT
SYMBOL
PARAMETER
CONDITIONS
MIN MAX
UNIT
VCC
DC supply voltage (for max. speed performance) 2.7 3.6
V
V
CC DC supply voltage (for low-voltage applications) 1.2 3.6
V
VIDC Input voltage range 0 5.5 V
VODC output voltage range 0 VCC V
Tamb Operating ambient temperature range in free-air –40 +85 °C
tr, tfInput rise and fall times VCC = 1.2 to 2.7V
VCC = 2.7 to 3.6V 0
020
10 ns/V
ABSOLUTE MAXIMUM RATINGS1
Absolute Maximum Rating System (IEC 134)
Voltages are referenced to GND (ground = 0V)
SYMBOL PARAMETER CONDITIONS RATING UNIT
VCC DC supply voltage (for max. speed
performance) –0.5 to +6.5 V
IIK DC input diode current VI t0 –50 mA
VIDC input voltage Note 2 –0.5 to +5.5 V
IOK DC output diode current VO uVCC or VO t 0 "50 mA
VODC output voltage Note 2 –0.5 to VCC + 0.5 V
IODC output source or sink current VO = 0 to VCC "50 mA
IGND, ICC DC VCC or GND current "100 mA
Tstg Storage temperature range –65 to +150 °C
Power dissipation per package
PTOT – plastic mini-pack (SO) above +70°C derate linearly with 8 mW/K 500
mW
– plastic shrink mini-pack (SSOP and TSSOP) above +60°C derate linearly with 5.5 mW/K 500
mW
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
Philips Semiconductors Product specification
74LVC86AQuad 2-input exclusive OR gate
1998 Apr 28 4
DC CHARACTERISTICS
Over recommended operating conditions voltages are referenced to GND (ground = 0V)
LIMITS
SYMBOL PARAMETER TEST CONDITIONS Temp = -40°C to +85°C UNIT
MIN TYP1MAX
V
HIGH level In
p
ut voltage
VCC = 1.2V VCC
V
V
IH
HIGH
le
v
el
Inp
u
t
v
oltage
VCC = 2.7 to 3.6V 2.0
V
V
LOW level In
p
ut voltage
VCC = 1.2V GND
V
V
IL
LOW
le
v
el
Inp
u
t
v
oltage
VCC = 2.7 to 3.6V 0.8
V
VCC = 2.7V ; VI = VIH or VIL;I
O = –12mA VCC*0.5
VO
HIGH level out
p
ut voltage
VCC = 3.0V ; VI = VIH or VIL;I
O = –100µA VCC*0.2 VCC
V
V
OH
HIGH
le
v
el
o
u
tp
u
t
v
oltage
VCC = 3.0V ; VI = VIH or VIL; IO = –18mA VCC*0.6
V
VCC = 3.0V ; VI = VIH or VIL; IO = –24mA VCC*0.8
VCC = 2.7V ; VI = VIH or VIL;I
O = 12mA 0.40
VOL LOW level output voltage VCC = 3.0V ; VI = VIH or VIL;I
O = 100µA 0.20 V
VCC = 3.0V ; VI = VIH or VIL; IO = 24mA 0.55
I
In
p
ut leakage current
;
"01
"5
µA
I
I
Inp
u
t
leakage
c
u
rrent
CC =
.
;
I =
.
"0
.
1
"5
µ
A
ICC Quiescent supply current VCC = 3.6V ; VI = VCC or GND; IO = 0 0.1 10 µA
∆ICC Additional quiescent supply current
per input pin VCC = 2.7V to 3.6V ; VI = VCC –0.6V; IO = 0 5 500 µA
NOTES:
1. All typical values are at VCC = 3.3V and Tamb = 25°C.
AC CHARACTERISTICS
GND = 0 V ; tr = tf v 2.5 ns; CL = 50 pF; RL = 500; Tamb = –40C to +85C
LIMITS
SYMBOL PARAMETER WAVEFORM VCC = 3.3V ±0.3V VCC = 2.7V VCC = 1.2V UNIT
MIN TYP1MAX MIN TYP1MAX TYP
tPHL/
tPLH Propagation delay
nA, nB to nY Figures 1, 2 1.5 3.0 5 1.5 3.4 5.8 11 ns
NOTE:
1. These typical values are at VCC = 3.3V and Tamb = 25°C.
AC WAVEFORMS
VM = 1.5 V at VCC w 2.7 V
VM = 0.5 VCC at VCC < 2.7 V
VOL and VOH are the typical output voltage drop that occur with the
output load.
VI
nA, nB INPUT
GND
VOH
nY OUTPUT
VOL
VM
tPHL tPLH
VM
SV00377
Figure 1. Input (nA, nB) to output (nY) propagation delays
TEST CIRCUIT
PULSE
GENERATOR
VI
RT
D.U.T. VO
CL50pF
S12 < VCC
Open
GND
500Ω
500Ω
VCC VI
t 2.7V VCC
2.7V – 3.6V 2.7V
Test S1
tPLH/tPHL Open
VCC
SY00077
Figure 2. Load circuitry for switching times.
Philips Semiconductors Product specification
74LVC86AQuad 2-input exclusive OR gate
1998 Apr 28 5
DIP14: plastic dual in-line package; 14 leads (300 mil) SOT27-1
Philips Semiconductors Product specification
74LVC86AQuad 2-input exclusive OR gate
1998 Apr 28 6
SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1
Philips Semiconductors Product specification
74LVC86AQuad 2-input exclusive OR gate
1998 Apr 28 7
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm SOT337-1
Philips Semiconductors Product specification
74LVC86AQuad 2-input exclusive OR gate
1998 Apr 28 8
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1
Philips Semiconductors Product specification
74LVC86AQuad 2-input exclusive OR gate
1998 Apr 28 9
NOTES
Philips Semiconductors Product specification
74LVC86AQuad 2-input exclusive OR gate
yyyy mmm dd 10
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing
or modification.
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Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appl iances, devices,
or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected
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Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
DEFINITIONS
Data Sheet Identification Product Status Definition
Objective Specification
Preliminary Specification
Product Specification
Formative or in Design
Preproduction Product
Full Production
This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
print code Date of release: 05-96
Document order number: 9397-750-04488
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