74HC/HCT126 MSI QUAD BUFFER/LINE DRIVER; 3-STATE FEATURES . . TYPICAL * Output capability: bus driver SYMBOL | PARAMETER CONDITIONS UNIT Icc category: MS! HC | HCT GENERAL DESCRIPTION tpHL/ propagation delay C. = 15 pF 9 11 | ns The 74HC/HCT 126 are high-speed PLH nA tony Voc =5V Si-gate CMOS devices and are pin . . compatible with low power Schottky CI input capacitance 3.5 39 pF TTL (LSTTL}. They are specified in dissipati compliance with JEDEC standard no. 7A. Cep peeapacitance per buffer | Totestand2 | 23 | 24 | pF The HC/HCT126 are four non- inverting buffer/line drivers with 3-state GND = 0V: Tamb = 25 C; ty = tp = 6 ns outputs. The 3-state outputs (nY) are controiled by the output enable input Notes (nOE), A LOW at nOE causes the . . . seein at : . outputs to assume a HIGH impedance 1. Cpp is used to determine the dynamic power dissipation (Pp in #W): OF F-state. Pp =Cpp x Vcc? x fi+ (CL x Vcc? x fo) where: The 126" is identical to the 125 but fj = input frequency in MHz CL output load capacitance in pF has active HIGH enable inputs, fo = output frequency in MHz Vcc = supply voltage in V = (CL x Voc? x fo) = sum of outputs 2. For HC the condition is V} = GND to Vcc For HCT the condition is Vj = GND to Vcc 1.5 V PACKAGE OUTLINES 14-lead DIL; plastic (SOT27) 14-lead mini pack; plastic (S014; SOT108A) PIN DESCRIPTION PIN NO. SYMBOL NAME AND FUNCTION 1,4, 10, 13 10E to 40E output enable inputs (active HIGH) 2,5, 9, 12 1Ato4A data inputs 3, 6, 8, 11 1V to 4Y data outputs 7 GND ground (0 V) 14 Vec positive supply voltage 21 Dp a 3 U 3 1 1y-2 1 dey VE roe [1] 14] Yee en af? | [13] 406 6 a | 6 2 > gLs vy {3 | [12] 4a 4 {EN 20e[4| 126 ta] ay s Ls a > {8 2a[s | [10] 30 10 J 10 ten t 2 [| 2] 3A 2 12 u > i cno [7 | |e] 3v Bo 3B fen vr 7283376 7Z93377.1 7296938 7293376 fa) {b) Fig. 1 Pin configuration. Fig. 2. Logic symbol. Fig. 3 IEC logic symbol. December 1990 249 Printed From CAPS XPert Version 1.2P This Material Copyrighted By Philips Semiconductors.74HC/HCT126 MSi Fig. 4 Functionai diagram. 72933768 oa l>o>o_oo ov nor >| >o| _ 7293834 Fig. 5 Logic diagram (one buffer}. FUNCTION TABLE INPUTS OUTPUT nOE nA nY H L L H H H L Xx Zz H = HIGH voltage level L = LOW voltage level X = dont care Z = high impedance OFF-state 250 January 1986 Printed From CAPS XPert Version 1.2P This Material Copyrighted By Philips Semiconductors.Quad buffer/line driver; 3-state DC CHARACTERISTICS FOR 74HC ) \ For the DC characteristics see chapter HCMOS family characteristics, section Family specifications. Output capability: bus driver Icc category: MSI AC CHARACTERISTICS FOR 74HC GND = OV; t, = tp = 6 ns; C_ = 50 pF 74HC/HCT126 MSI Tamb (C) TEST CONDITIONS 74HC SYMBOL | PARAMETER UNIT | Veco | WAVEFORMS +25 40to +85 | 40to +125 Vv min, | typ. | max. | min.| max. | min. | max. . 30 100 125 150 2.0 tPHL! propagation delay 11} 20 25 30 | ns 4.5 | Fig.6 'PLH nA to nY 9 117 21 26 6.0 . 41 125 155 190 2.0 tezH/ 3-state output enable time 16 | 25 31 38 ns 45 Fig. 7 tPZb nOE ton 12 | 21 26 32 | 6.0 . . 41 | 125 155 180 2.0 tpyz/ 3-state output disable time 15 | 25 31 38 ns) 45 | Fig? tpLz nOE to nY 12 71 26 32 6.0 / 14 | 60 75 90 , 2.0 THLE output transition time 5 12 15 18 ns | 4.5 Fig. 6 TLH 4 | 10 13 15 | 6.0 Printed From CAPS XPert Version 1.2P This Material Copyrighted By Philips Semiconductors. January 1986 25174HC/HCT126 MSI! DC CHARACTERISTICS FOR 74HCT For the DC characteristics see chapter HCMOS family characteristics, section Family specifications. Output capability: bus driver lIcc category: MSI Note to HCT types The value of additional quiescent supply current (Alcc) for a unit load of 7 is given in the family specifications. To determine Alcc per input, multiply this value by the unit load coefficient shown in the table below, INPUT UNIT LOAD COEFFICIENT nA, nOE 1.00 AC CHARACTERISTICS FOR 74HCT GND = OV; t, = tg =6 ns; CL = 50 pF Tamb (C) TEST CONDITIONS 74HCT SYMBOL | PARAMETER UNIT } Vee | WAVEFORMS +25 40 to +85 | 40 to +125 Vv min, | typ.] max. | min. | max. | min. | max. *PHL/ _| Propagation delay 14 | 24 30 36 | ns 45 | Fig.6 tPLH nA ta ny tpzy/ 3-state output enable time 13 | 25 31 a8 ns 45 Fig. 7 tpZL nOE to nY teH2/ 3-state output disable time 18 | 28 35 40 ns 45 | Fig.7 PLZ nOE tony tTHL! output transition time 5 12 15 18 ns 45 Fig. 6 TTLH 252 January 1986 Printed From CAPS XPert Version 1.2P This Material Copyrighted By Philips Semiconductors.Quad buffer/line driver; 3-state 74HC/HCT126 Msi AC WAVEFORMS nOE (NPUT n& (NPUT OUTPUT LOW-t0-OFF OFF-to- LOW nY OUTPUT OUTPUT 7293378 HIGH-to-OFF OFF-to-HIGH outputs |.4 outputs ___ |. outputs 7293379 enabled disabled enabled Fig. 6 Waveforms showing the input (nA) to output (nY) propagation delays and Fig. 7 Waveforms showing the 3-state enable the output transition times, and disable times. Note to AC waveforms (1) HC : Vpq = 50%; Vy = GND to Vcc. HCT: Vy = 1.3; Vy = GND to3V. January 1986 253 Printed From CAPS XPert Version 1.2P This Material Copyrighted By Philips Semiconductors.