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74HC4024

7-stage binary ripple counter

Rev. 10 — 23 November 2018 Product data sheet

1. General description

The 74HC4024 is a 7-stage binary ripple counter with a clock input (CP), an overriding

asynchronous master reset input (MR) and seven fully buffered parallel outputs (Q0 to Q6). The

counter advances on the HIGH-to-LOW transition of CP. A HIGH on MR clears all counter stages

and forces all outputs LOW, independent of the state of CP. Each counter stage is a static toggle

flip-flop. Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock

rise and fall times. Inputs include clamp diodes. This enables the use of current limiting resistors to

interface inputs to voltages in excess of VCC.

2. Features and benefits

•Low-power dissipation

•Complies with JEDEC standard no. 7A

•CMOS input levels

•ESD protection:

•HBM JESD22-A114F exceeds 2 000 V

•MM JESD22-A115-A exceeds 200 V.

•Specified from -40 °C to +80 °C and from -40 °C to +125 °C.

3. Applications

•Frequency dividing circuits

•Time delay circuits.

4. Ordering information

Table 1. Ordering information

PackageType number

Temperature range Name Description Version

74HC4024D -40 °C to +125 °C SO14 plastic small outline package;

14 leads; body width 3.9 mm

SOT108-1

Nexperia 74HC4024

7-stage binary ripple counter

5. Functional diagram

001aab906

Q6 3

Fig. 1. Logic symbol

001aab908

7-STAGE

COUNTER

Fig. 2. Functional diagram

001aab907

CT = 0

CTR7

Fig. 3. IEC logic symbol

001aab909

TCP

Q0 Q1 Q2 Q3 Q4 Q5 Q6

Fig. 4. Logic diagram

6. Pinning information

6.1. Pinning

74HC4024

CP VCC

MR n.c.

Q6 Q0

Q5 Q1

Q4 n.c.

Q3 Q2

GND n.c.

001aab905

7 8

Fig. 5. Pin configuration SOT108-1 (SO14)

Product data sheet Rev. 10 — 23 November 2018 2 / 13

Nexperia 74HC4024

7-stage binary ripple counter

6.2. Pin description

Table 2. Pin description

Symbol Pin Description

CP 1 clock input (HIGH-to-LOW, edge-triggered)

MR 2 master reset input (active HIGH)

Q6, Q5, Q4, Q3, Q2, Q2, Q1, Q0 3, 4, 5, 6, 9, 11, 12 parallel output

GND 7 ground (0 V)

n.c. 8, 10, 13 not connected

VCC 14 positive supply voltage

7. Functional description

Table 3. Function table

H = HIGH voltage level; L = LOW voltage level; X = don’t care; ↑ = LOW-to-HIGH clock transition;

↓ = HIGH-to-LOW clock transition.

Input Output

MR CP Qn

H X L

↑ no changeL

↓ count

8. Limiting values

Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions Min Max Unit

VCC supply voltage -0.5 +7 V

IIK input clamping current VI < -0.5 V or VI > VCC + 0.5 V - ±20 mA

IOK output clamping current VO < -0.5 V or VO > VCC + 0.5 V - ±20 mA

IOoutput current VO = -0.5 V to VCC + 0.5 V - ±25 mA

ICC supply current - 50 mA

IGND ground current -50 - mA

Tstg storage temperature -65 +150 °C

Ptot total power dissipation [1] - 500 mW

[1] For SO16 package: Ptot derates linearly with 8 mW/K above 70 °C.

Product data sheet Rev. 10 — 23 November 2018 3 / 13

Nexperia 74HC4024

7-stage binary ripple counter

9. Recommended operating conditions

Table 5. Recommended operating conditions

Symbol Parameter Conditions Min Typ Max Unit

VCC supply voltage 2.0 5.0 6.0 V

VIinput voltage 0 - VCC V

VOoutput voltage 0 - VCC V

VCC = 2.0 V - - 625 ns/V

VCC = 4.5 V - 1.67 139 ns/V

Δt/ΔV input transition rise and fall

rate

VCC = 6.0 V - - 83 ns/V

Tamb ambient temperature -40 - +125 °C

10. Static characteristics

Table 6. Static characteristics

At recommended operating conditions; voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions Min Typ Max Unit

Tamb = 25 °C

VCC = 2.0 V 1.5 1.2 - V

VCC = 4.5 V 3.15 2.4 - V

VIH HIGH-level input voltage

VCC = 6.0 V 4.2 3.2 - V

VCC = 2.0 V - 0.8 0.5 V

VCC = 4.5 V - 2.1 1.35 V

VIL LOW-level input voltage

VCC = 6.0 V - 2.8 1.8 V

VI = VIH or VIL

IO = -20 μA; VCC = 2.0 V 1.9 2.0 - V

IO = -20 μA; VCC = 4.5 V 4.4 4.5 - V

IO = -20 μA; VCC = 6.0 V 5.9 6.0 - V

IO = -4 mA; VCC = 4.5 V 3.98 4.32 - V

VOH HIGH-level output voltage

IO = -5.2 mA; VCC = 6.0 V 5.48 5.81 - V

VI = VIH or VIL

IO = 20 μA; VCC = 2.0 V - 0 0.1 V

IO = 20 μA; VCC = 4.5 V - 0 0.1 V

IO = 20 μA; VCC = 6.0 V - 0 0.1 V

IO = 4 mA; VCC = 4.5 V - 0.15 0.26 V

VOL LOW-level output voltage

IO = 5.2 mA; VCC = 6.0 V - 0.16 0.26 V

IIinput leakage current VI = VCC or GND; VCC = 6.0 V - - ±0.1 μA

ICC supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 8.0 μA

CIinput capacitance - 3.5 - pF

Product data sheet Rev. 10 — 23 November 2018 4 / 13

Nexperia 74HC4024

7-stage binary ripple counter

Symbol Parameter Conditions Min Typ Max Unit

Tamb = -40 °C to +85 °C

VCC = 2.0 V 1.5 - - V

VCC = 4.5 V 3.15 - - V

VIH HIGH-level input voltage

VCC = 6.0 V 4.2 - - V

VCC = 2.0 V - - 0.5 V

VCC = 4.5 V - - 1.35 V

VIL LOW-level input voltage

VCC = 6.0 V - - 1.8 V

VI = VIH or VIL

IO = -20 μA; VCC = 2.0 V 1.9 - - V

IO = -20 μA; VCC = 4.5 V 4.4 - - V

IO = -20 μA; VCC = 6.0 V 5.9 - - V

IO = -4 mA; VCC = 4.5 V 3.84 - - V

VOH HIGH-level output voltage

IO = -5.2 mA; VCC = 6.0 V 5.34 - - V

VI = VIH or VIL

IO = 20 μA; VCC = 2.0 V - - 0.1 V

IO = 20 μA; VCC = 4.5 V - - 0.1 V

IO = 20 μA; VCC = 6.0 V - - 0.1 V

IO = 4 mA; VCC = 4.5 V - - 0.33 V

VOL LOW-level output voltage

IO = 5.2 mA; VCC = 6.0 V - - 0.33 V

IIinput leakage current VI = VCC or GND; VCC = 6.0 V - - ±1.0 μA

ICC supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 80 μA

Tamb = -40 °C to +125 °C

VCC = 2.0 V 1.5 - - V

VCC = 4.5 V 3.15 - - V

VIH HIGH-level input voltage

VCC = 6.0 V 4.2 - - V

VCC = 2.0 V - - 0.5 V

VCC = 4.5 V - - 1.35 V

VIL LOW-level input voltage

VCC = 6.0 V - - 1.8 V

VI = VIH or VIL

IO = -20 μA; VCC = 2.0 V 1.9 - - V

IO = -20 μA; VCC = 4.5 V 4.4 - - V

IO = -20 μA; VCC = 6.0 V 5.9 - - V

IO = -4 mA; VCC = 4.5 V 3.7 - - V

VOH HIGH-level output voltage

IO = -5.2 mA; VCC = 6.0 V 5.2 - - V

VI = VIH or VIL

IO = 20 μA; VCC = 2.0 V - - 0.1 V

IO = 20 μA; VCC = 4.5 V - - 0.1 V

IO = 20 μA; VCC = 6.0 V - - 0.1 V

IO = 4 mA; VCC = 4.5 V - - 0.4 V

VOL LOW-level output voltage

IO = 5.2 mA; VCC = 6.0 V - - 0.4 V

IIinput leakage current VI = VCC or GND; VCC = 6.0 V - - ±1.0 μA

ICC supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 160 μA

Product data sheet Rev. 10 — 23 November 2018 5 / 13

Nexperia 74HC4024

7-stage binary ripple counter

11. Dynamic characteristics

Table 7. Dynamic characteristics

GND = 0 V; tr = tf = 6 ns; CL = 50 pF; for test circuit see Fig. 7.

Symbol Parameter Conditions Min Typ Max Unit

Tamb = 25 °C

CP to Q0; see Fig. 6 [1]

VCC = 2.0 V - 47 175 ns

VCC = 4.5 V - 17 35 ns

VCC = 6.0 V - 14 30 ns

VCC = 5.0 V; CL = 15 pF - 14 - ns

Qn to Qn+1; see Fig. 6 [1]

VCC = 2.0 V - 25 80 ns

VCC = 4.5 V - 9 16 ns

tpd propagation delay

VCC = 6.0 V - 7 14 ns

MR to Q0; see Fig. 6

VCC = 2.0 V - 63 200 ns

VCC = 4.5 V - 23 40 ns

tPHL HIGH to LOW

propagation delay

VCC = 6.0 V - 18 34 ns

see Fig. 6 [2]

VCC = 2.0 V - 19 75 ns

VCC = 4.5 V - 7 15 ns

tttransition time

VCC = 6.0 V - 6 13 ns

CP HIGH or LOW; see Fig. 6

VCC = 2.0 V 80 17 - ns

VCC = 4.5 V 16 6 - ns

VCC = 6.0 V 14 5 - ns

MR HIGH; see Fig. 6

VCC = 2.0 V 80 22 - ns

VCC = 4.5 V 16 8 - ns

tWpulse width

VCC = 6.0 V 14 6 - ns

MR to CP; see Fig. 6

VCC = 2.0 V 50 6 - ns

VCC = 4.5 V 10 2 - ns

trec recovery time

VCC = 6.0 V 9 2 - ns

CP; see Fig. 6

VCC = 2.0 V 6.0 27 - MHz

VCC = 4.5 V 30 82 - MHz

VCC = 6.0 V 35 98 - MHz

fmax maximum frequency

VCC = 5.0 V; CL = 15 pF - 90 - MHz

CPD power dissipation

capacitance

VI = GND to VCC [3] - 25 - pF

Product data sheet Rev. 10 — 23 November 2018 6 / 13

Nexperia 74HC4024

7-stage binary ripple counter

Symbol Parameter Conditions Min Typ Max Unit

Tamb = -40 °C to +85 °C

CP to Q0; see Fig. 6 [1]

VCC = 2.0 V - - 220 ns

VCC = 4.5 V - - 44 ns

VCC = 6.0 V - - 37 ns

Qn to Qn+1; see Fig. 6 [1]

VCC = 2.0 V - - 100 ns

VCC = 4.5 V - - 20 ns

tpd propagation delay

VCC = 6.0 V - - 17 ns

MR to Q0; see Fig. 6

VCC = 2.0 V - - 250 ns

VCC = 4.5 V - - 50 ns

tPHL HIGH to LOW

propagation delay

VCC = 6.0 V - - 43 ns

see Fig. 6 [2]

VCC = 2.0 V - - 95 ns

VCC = 4.5 V - - 19 ns

tttransition time

VCC = 6.0 V - - 16 ns

CP HIGH or LOW; see Fig. 6

VCC = 2.0 V 100 - - ns

VCC = 4.5 V 20 - - ns

VCC = 6.0 V 17 - - ns

MR HIGH; see Fig. 6

VCC = 2.0 V 100 - - ns

VCC = 4.5 V 20 - - ns

tWpulse width

VCC = 6.0 V 17 - - ns

MR to CP; see Fig. 6

VCC = 2.0 V 65 - - ns

VCC = 4.5 V 13 - - ns

trec recovery time

VCC = 6.0 V 11 - - ns

CP; see Fig. 6

VCC = 2.0 V 4.8 - - MHz

VCC = 4.5 V 24 - - MHz

fmax maximum frequency

VCC = 6.0 V 28 - - MHz

Product data sheet Rev. 10 — 23 November 2018 7 / 13

Nexperia 74HC4024

7-stage binary ripple counter

Symbol Parameter Conditions Min Typ Max Unit

Tamb = -40 °C to +125 °C

CP to Q0; see Fig. 6 [1]

VCC = 2.0 V - - 265 ns

VCC = 4.5 V - - 53 ns

VCC = 6.0 V - - 45 ns

Qn to Qn+1; see Fig. 6 [1]

VCC = 2.0 V - - 120 ns

VCC = 4.5 V - - 24 ns

tpd propagation delay

VCC = 6.0 V - - 20 ns

MR to Q0; see Fig. 6

VCC = 2.0 V - - 300 ns

VCC = 4.5 V - - 60 ns

tPHL HIGH to LOW

propagation delay

VCC = 6.0 V - - 51 ns

see Fig. 6 [2]

VCC = 2.0 V - - 110 ns

VCC = 4.5 V - - 22 ns

tttransition time

VCC = 6.0 V - - 19 ns

CP HIGH or LOW; see Fig. 6

VCC = 2.0 V 120 - - ns

VCC = 4.5 V 24 - - ns

VCC = 6.0 V 20 - - ns

MR HIGH; see Fig. 6

VCC = 2.0 V 120 - - ns

VCC = 4.5 V 24 - - ns

tWpulse width

VCC = 6.0 V 20 - - ns

MR to CP; see Fig. 6

VCC = 2.0 V 75 - - ns

VCC = 4.5 V 15 - - ns

trec recovery time

VCC = 6.0 V 13 - - ns

CP; see Fig. 6

VCC = 2.0 V 4.0 - - MHz

VCC = 4.5 V 20 - - MHz

fmax maximum frequency

VCC = 6.0 V 24 - - MHz

[1] tpd is the same as tPLH and tPHL.

[2] tt is the same as tTHL and tTLH.

[3] CPD is used to determine the dynamic power dissipation (PD in μW).

PD = CPD x VCC

2 x fi x N + ∑(CL x VCC

2 x fo) where:

fi = input frequency in MHz;

fo = output frequency in MHz;

CL = output load capacitance in pF;

VCC = supply voltage in V;

N = number of inputs switching;

∑(CL x VCC

2 x fo) = sum of outputs.

Product data sheet Rev. 10 — 23 November 2018 8 / 13

Nexperia 74HC4024

7-stage binary ripple counter

11.1. Waveforms and test circuit

MR input

CP input

Q0 or Qn

output

tPHL

1/fmax

trec

001aab910

tPLH

tTLH tTHL

tPHL

90 % 90 %

10 % 10 %

Also showing the master reset (MR) pulse width, the master reset to output (Qn) propagation delays and the

master reset to clock (CP) recovery time.

VM = 0.5 x VCC.

Fig. 6. Waveforms showing the clock (CP) to output (Qn) propagation delays, the clock pulse width, the output

transition times and the maximum clock frequency

001aah768

negative

pulse

GND

positive

pulse

GND

10 %

90 %

10 %

VMVM

VCC

DUT

VIVO

Test data is given in Table 8.

Definitions for test circuit:

RT = Termination resistance should be equal to output impedance Zo of the pulse generator.

CL = Load capacitance including jig and probe capacitance.

Fig. 7. Test circuit for measuring switching times

Table 8. Test data

Supply Input Load

VCC VItr, tfCL

2.0 V VCC 6 ns 50 pF

4.5 V VCC 6 ns 50 pF

6.0 V VCC 6 ns 50 pF

5.0 V VCC 6 ns 15 pF

Product data sheet Rev. 10 — 23 November 2018 9 / 13

Nexperia 74HC4024

7-stage binary ripple counter

12. Package outline

UNIT A

max. A

1 A

2 A

3 b

p c D

(1) E

(1) (1)

e H

E L L

p Q Z y w v θ

REFERENCES

OUTLINE

VERSION

EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

inches

1.75 0.25

0.10

1.45

1.25 0.25 0.49

0.36

0.25

0.19

8.75

8.55

4.0

3.8 1.27 6.2

5.8

0.7

0.6

0.7

0.3 8

0.25 0.1

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

Note

1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.

1.0

0.4

SOT108-1

w M

detail X

v M A

(A )

076E06 MS-012

pin 1 index

0.069 0.010

0.004

0.057

0.049 0.01 0.019

0.014

0.0100

0.0075

0.35

0.34

0.16

0.15 0.05

1.05

0.041

0.244

0.228

0.028

0.024

0.028

0.012

0.01

0.25

0.01 0.004

0.039

0.016

99-12-27

03-02-19

0 2.5 5 mm

scale

SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1

Fig. 8. Package outline SOT108-1 (SO14)

Product data sheet Rev. 10 — 23 November 2018 10 / 13

Nexperia 74HC4024

7-stage binary ripple counter

13. Abbreviations

Table 9. Abbreviations

Acronym Description

CMOS Complementary Metal-Oxide Semiconductor

DUT Device Under Test

ESD ElectroStatic Discharge

HBM Human Body Model

MM Machine Model

14. Revision history

Table 10. Revision history

Document ID Release date Data sheet status Change notice Supersedes

74HC4024 v.10 20181123 Product data sheet - 74HC4024 v.9

Modifications: •The format of this data sheet has been redesigned to comply with the identity guidelines of

Nexperia.

•Legal texts have been adapted to the new company name where appropriate.

•Type number 74HC4024PW (SOT402-1/TSSOP14) removed.

74HC4024 v.9 20160428 Product data sheet - 74HC4024 v.8

Modifications: •Type number 74HC4024DB (SOT337-1) removed.

74HC4024 v.8 20151202 Product data sheet - 74HC4024 v.7

Modifications: •Type number 74HC4024N (SOT27-1) removed.

74HC4024 v.7 20131031 Product data sheet - 74HC4024 v.6

Modifications: •General description updated.

74HC4024 v.6 20120823 Product data sheet - 74HC4024 v.5

74HC4024 v.4 20100929 Product data sheet - 74HC4024 v.3

74HC4024 v.3 20041112 Product data sheet - 74HC_HCT4024_CNV v.2

74HC_HCT4024_CNV v.2 19970901 Product specification - 74HC_HCT4024 v.1

74HC_HCT4024 v.1 19901201 Product specification - -

Product data sheet Rev. 10 — 23 November 2018 11 / 13

Nexperia 74HC4024

7-stage binary ripple counter

15. Legal information

Data sheet status

Document status

[1][2]

Product

status [3]

Definition

Objective [short]

data sheet

Development This document contains data from

the objective specification for

product development.

Preliminary [short]

data sheet

Qualification This document contains data from

the preliminary specification.

Product [short]

data sheet

Production This document contains the product

specification.

[1] Please consult the most recently issued document before initiating or

completing a design.

[2] The term 'short data sheet' is explained in section "Definitions".

[3] The product status of device(s) described in this document may have

changed since this document was published and may differ in case of

multiple devices. The latest product status information is available on

the internet at https://www.nexperia.com.

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Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those

given in the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

repeated exposure to limiting values will permanently and irreversibly affect

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In the event that customer uses the product for design-in and use in

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Notice: All referenced brands, product names, service names and

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Product data sheet Rev. 10 — 23 November 2018 12 / 13

Nexperia 74HC4024

7-stage binary ripple counter

Contents

1. General description......................................................1

2. Features and benefits.................................................. 1

3. Applications.................................................................. 1

4. Ordering information....................................................1

5. Functional diagram.......................................................2

6. Pinning information......................................................2

6.1. Pinning.........................................................................2

6.2. Pin description............................................................. 3

7. Functional description................................................. 3

8. Limiting values............................................................. 3

9. Recommended operating conditions..........................4

10. Static characteristics..................................................4

11. Dynamic characteristics.............................................6

11.1. Waveforms and test circuit........................................ 9

12. Package outline........................................................ 10

13. Abbreviations............................................................ 11

14. Revision history........................................................11

15. Legal information......................................................12

For more information, please visit: http://www.nexperia.com

For sales office addresses, please send an email to: salesaddresses@nexperia.com

Date of release: 23 November 2018

Product data sheet Rev. 10 — 23 November 2018 13 / 13