Semiconductor Components Industries, LLC, 2001
October, 2001 – Rev. 2 1Publication Order Number:
MBT3904DW1T1/D
MBT3904DW1T1
Dual General Purpose
Transistor
The MBT3904DW1T1 device is a spin–off of our popular
SOT–23/SOT–323 three–leaded device. It is designed for general
purpose amplifier applications and is housed in the SOT–363
six–leaded surface mount package. By putting two discrete devices in
one package, this device is ideal for low–power surface mount
applications where board space is at a premium.
hFE, 100–300
Low VCE(sat), 0.4 V
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
Available in 8 mm, 7–inch/3,000 Unit Tape and Reel
Device Marking: MBT3904DW1T1 = MA
MAXIMUM RATINGS
Rating Symbol Value Unit
Collector–Emitter Voltage VCEO 40 Vdc
Collector–Base Voltage VCBO 60 Vdc
Emitter–Base V oltage VEBO 6.0 Vdc
Collector Current – Continuous IC200 mAdc
Electrostatic Discharge ESD HBM>16000,
MM>2000 V
THERMAL CHARACTERISTICS
Characteristic Symbol Max Unit
Total Package Dissipation(1)
TA = 25°CPD150 mW
Thermal Resistance Junction to
Ambient RJA 833 °C/W
Junction and Storage
Temperature Range TJ, Tstg –55 to +150 °C
1. Device mounted on FR4 glass epoxy printed circuit board using the minimum
1. recommended footprint.
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Device Package Shipping
ORDERING INFORMATION
MBT3904DW1T1 SOT–363
SOT–363/SC–88
CASE 419B
STYLE 1
3000 Units/Reel
Q1
(1)(2)
(3)
(4) (5) (6)
Q2
123
654
MBT3904DW1T1
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ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic Symbol Min Max Unit
OFF CHARACTERISTICS
Collector–Emitter Breakdown Voltage(2)
(IC = 1.0 mAdc, IB = 0) V(BR)CEO 40 Vdc
Collector–Base Breakdown Voltage
(IC = 10 Adc, IE = 0) V(BR)CBO 60 Vdc
Emitter–Base Breakdown Voltage
(IE = 10 Adc, IC = 0) V(BR)EBO 6.0 Vdc
Base Cutoff Current
(VCE = 30 Vdc, VEB = 3.0 Vdc) IBL 50 nAdc
Collector Cutoff Current
(VCE = 30 Vdc, VEB = 3.0 Vdc) ICEX 50 nAdc
ON CHARACTERISTICS (2)
DC Current Gain
(IC = 0.1 mAdc, VCE = 1.0 Vdc)
(IC = 1.0 mAdc, VCE = 1.0 Vdc)
(IC = 10 mAdc, VCE = 1.0 Vdc)
(IC = 50 mAdc, VCE = 1.0 Vdc)
(IC = 100 mAdc, VCE = 1.0 Vdc)
hFE 40
70
100
60
30
300
Collector–Emitter Saturation Voltage
(IC = 10 mAdc, IB = 1.0 mAdc)
(IC = 50 mAdc, IB = 5.0 mAdc)
VCE(sat)
0.2
0.3
Vdc
Base–Emitter Saturation Voltage
(IC = 10 mAdc, IB = 1.0 mAdc)
(IC = 50 mAdc, IB = 5.0 mAdc)
VBE(sat) 0.65
0.85
0.95
Vdc
SMALL–SIGNAL CHARACTERISTICS
Current–Gain – Bandwidth Product
(IC = 10 mAdc, VCE = 20 Vdc, f = 100 MHz) fT300 MHz
Output Capacitance
(VCB = 5.0 Vdc, IE = 0, f = 1.0 MHz) Cobo 4.0 pF
Input Capacitance
(VEB = 0.5 Vdc, IC = 0, f = 1.0 MHz) Cibo 8.0 pF
2. Pulse Test: Pulse Width 300 µs; Duty Cycle 2.0%.
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ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) (Continued)
Characteristic Symbol Min Max Unit
Input Impedance
(VCE = 10 Vdc, IC = 1.0 mAdc, f = 1.0 kHz) hie 1.0
2.0 10
12
k
Voltage Feedback Ratio
(VCE = 10 Vdc, IC = 1.0 mAdc, f = 1.0 kHz) hre 0.5
0.1 8.0
10
X 10–4
Small–Signal Current Gain
(VCE = 10 Vdc, IC = 1.0 mAdc, f = 1.0 kHz) hfe 100
100 400
400
Output Admittance
(VCE = 10 Vdc, IC = 1.0 mAdc, f = 1.0 kHz) hoe 1.0
3.0 40
60
mhos
Noise Figure
(VCE = 5.0 Vdc, IC = 100 Adc, RS = 1.0 k , f = 1.0 kHz) NF
5.0
4.0
dB
SWITCHING CHARACTERISTICS
Delay Time (VCC = 3.0 Vdc, VBE = –0.5 Vdc) td 35
ns
Rise Time (IC = 10 mAdc, IB1 = 1.0 mAdc) tr 35 ns
Storage Time (VCC = 3.0 Vdc, IC = 10 mAdc) ts 200
ns
Fall Time (IB1 = IB2 = 1.0 mAdc) tf 50 ns
Figure 1. Delay and Rise Time
Equivalent Test Circuit Figure 2. Storage and Fall Time
Equivalent Test Circuit
+3 V
275
10 k
1N916 Cs < 4 pF*
+3 V
275
10 k
Cs < 4 pF*
< 1 ns
-0.5 V
+10.9 V
300 ns
DUTY CYCLE = 2%
< 1 ns
-9.1 V
+10.9 V
DUTY CYCLE = 2%
t1
0
10 < t1 < 500 s
* Total shunt capacitance of test jig and connectors
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4
TYPICAL TRANSIENT CHARACTERISTICS
Figure 3. Capacitance
REVERSE BIAS VOLTAGE (VOLTS)
2.0
3.0
5.0
7.0
10
1.0
0.1
Figure 4. Charge Data
IC, COLLECTOR CURRENT (mA)
5000
1.0
VCC = 40 V
IC/IB = 10
Q, CHARGE (pC)
3000
2000
1000
500
300
200
700
100
50
70
2.0 3.0 5.0 7.0 10 20 30 50 70 100 200
CAPACITANCE (pF)
1.0 2.0 3.0 5.0 7.0 10 20 30 40
0.2 0.3 0.5 0.7
QT
QA
Cibo
Cobo
TJ = 25°C
TJ = 125°C
Figure 5. TurnOn Time
IC, COLLECTOR CURRENT (mA)
70
100
200
300
500
50
Figure 6. Rise Time
IC, COLLECTOR CURRENT (mA)
TIME (ns)
1.0 2.0 3.0 10 20 70
5100
t , RISE TIME (ns)
Figure 7. Storage Time
IC, COLLECTOR CURRENT (mA)
Figure 8. Fall Time
IC, COLLECTOR CURRENT (mA)
5.0 7.0 30 50 200
10
30
7
20
70
100
200
300
500
50
1.0 2.0 3.0 10 20 70
5100
5.0 7.0 30 50 200
10
30
7
20
70
100
200
300
500
50
1.0 2.0 3.0 10 20 70
5100
5.0 7.0 30 50 200
10
30
7
20
70
100
200
300
500
50
1.0 2.0 3.0 10 20 70
5100
5.0 7.0 30 50 200
10
30
7
20
r
t , FALL TIME (ns)
f
t , STORAGE TIME (ns)
s
VCC = 40 V
IC/IB = 10
VCC = 40 V
IB1 = IB2
IC/IB = 20
IC/IB = 10
IC/IB = 10
tr @ VCC = 3.0 V
td @ VOB = 0 V
40 V
15 V
2.0 V
IC/IB = 10
IC/IB = 20
IC/IB = 10
IC/IB = 20
ts = ts - 1/8 tf
IB1 = IB2
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5
TYPICAL AUDIO SMALL–SIGNAL CHARACTERISTICS
NOISE FIGURE VARIATIONS
(VCE = 5.0 Vdc, TA = 25°C, Bandwidth = 1.0 Hz)
Figure 9. Noise Figure
f, FREQUENCY (kHz)
4
6
8
10
12
2
0.1
Figure 10. Noise Figure
RS, SOURCE RESISTANCE (k OHMS)
0
NF, NOISE FIGURE (dB)
1.0 2.0 4.0 10 20 40
0.2 0.4
0100
4
6
8
10
12
2
14
0.1 1.0 2.0 4.0 10 20 40
0.2 0.4 100
NF, NOISE FIGURE (dB)
f = 1.0 kHz IC = 1.0 mA
IC = 0.5 mA
IC = 50 A
IC = 100 A
SOURCE RESISTANCE = 200
IC = 1.0 mA
SOURCE RESISTANCE = 200
IC = 0.5 mA
SOURCE RESISTANCE = 500
IC = 100 A
SOURCE RESISTANCE = 1.0 k
IC = 50 A
h PARAMETERS
(VCE = 10 Vdc, f = 1.0 kHz, TA = 25°C)
Figure 11. Current Gain
IC, COLLECTOR CURRENT (mA)
70
100
200
300
50
Figure 12. Output Admittance
IC, COLLECTOR CURRENT (mA)
h , CURRENT GAIN
h , OUTPUT ADMITTANCE ( mhos)
Figure 13. Input Impedance
IC, COLLECTOR CURRENT (mA)
Figure 14. Voltage Feedback Ratio
IC, COLLECTOR CURRENT (mA)
30
100
50
5
10
20
2.0
3.0
5.0
7.0
10
1.0
0.1 0.2 1.0 2.0 5.0
0.5 10
0.3 0.5 3.0
0.7
2.0
5.0
10
20
1.0
0.2
0.5
oe
h , VOLTAGE FEEDBACK RATIO (x 10 )
re
h , INPUT IMPEDANCE (k OHMS)
ie
0.1 0.2 1.0 2.0 5.0 10
0.3 0.5 3.0
0.1 0.2 1.0 2.0 5.0 10
0.3 0.5 3.0
2
1
0.1 0.2 1.0 2.0 5.0 10
0.3 0.5 3.0
fe
-4
MBT3904DW1T1
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6
TYPICAL STATIC CHARACTERISTICS
Figure 15. DC Current Gain
IC, COLLECTOR CURRENT (mA)
0.3
0.5
0.7
1.0
2.0
0.2
0.1
h , DC CURRENT GAIN (NORMALIZED)
0.5 2.0 3.0 10 50 70
0.2 0.3
0.1 100
1.00.7 200
30205.0 7.0
FE
VCE = 1.0 V
TJ = +125°C
+25°C
-55°C
Figure 16. Collector Saturation Region
IB, BASE CURRENT (mA)
0.4
0.6
0.8
1.0
0.2
0.1
V , COLLECTOR EMITTER VOLTAGE (VOLTS)
0.5 2.0 3.0 100.2 0.3
01.00.7 5.0 7.0
CE
IC = 1.0 mA
TJ = 25°C
0.070.050.030.020.01
10 mA 30 mA 100 mA
Figure 17. “ON” Voltages
IC, COLLECTOR CURRENT (mA)
0.4
0.6
0.8
1.0
1.2
0.2
Figure 18. Temperature Coefficients
IC, COLLECTOR CURRENT (mA)
V, VOLTAGE (VOLTS)
1.0 2.0 5.0 10 20 50
0100
-0.5
0
0.5
1.0
0 60 80 120 140 160 180
20 40 100
COEFFICIENT (mV/ C)
200
-1.0
-1.5
-2.0
200
°
TJ = 25°C
VBE(sat) @ IC/IB =10
VCE(sat) @ IC/IB =10
VBE @ VCE =1.0 V
+25°C TO +125°C
-55°C TO +25°C
+25°C TO +125°C
-55°C TO +25°C
VC FOR VCE(sat)
VB FOR VBE(sat)
MBT3904DW1T1
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7
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
0.5 mm (min)
0.4 mm (min)
0.65 mm 0.65 mm
1.9 mm
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values
into the equation for an ambient temperature TA of 25°C,
one can calculate the power dissipation of the device which
in this case is 150 milliwatts.
INFORMATION FOR USING THE SOT–363 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the
total design. The footprint for the semiconductor packages
must be the correct size to insure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
SOT–363 POWER DISSIPATION
PD = TJ(max) – TA
RθJA
PD = 150°C – 25°C
833°C/W = 150 milliwatts
The power dissipation of the SOT–363 is a function of
the pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power dissipa-
tion. Power dissipation for a surface mount device is deter-
mined b y T J(max), the maximum rated junction temperature
of the die, RθJA, the thermal resistance from the device
junction to ambient, and the operating temperature, TA.
Using the values provided on the data sheet for the
SOT–363 package, PD can be calculated as follows:
The 833°C/W for the SOT–363 package assumes the use
of the recommended footprint on a glass epoxy printed
circuit board to achieve a power dissipation of 150 milli-
watts. There are other alternatives to achieving higher
power dissipation from the SOT–363 package. Another
alternative would be to use a ceramic substrate or an
aluminum core board such as Thermal Clad. Using a
board material such as Thermal Clad, an aluminum core
board, the power dissipation can be doubled using the same
footprint.
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the
rated temperature of the device. When the entire device is
heated to a high temperature, failure to complete soldering
within a short time could result in device failure. There-
fore, the following items should always be observed in
order to minimize the thermal stress to which the devices
are subjected.
Always preheat the device.
The delta temperature between the preheat and
soldering should be 100°C or less.*
When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering
method, the difference shall be a maximum of 10°C.
The soldering temperature and time shall not exceed
260°C for more than 10 seconds.
When shifting from preheating to soldering, the
maximum temperature gradient shall be 5°C or less.
After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and
result in latent failure due to mechanical stress.
Mechanical stress or shock should not be applied
during cooling.
* Soldering a device without preheating can cause exces-
sive thermal shock and stress which can result in damage
to the device.
SOT–363
MBT3904DW1T1
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8
PACKAGE DIMENSIONS
SOT–363/SC–88
CASE 419B–01
ISSUE G
STYLE 1:
PIN 1. EMITTER 2
2. BASE 2
3. COLLECTOR 1
4. EMITTER 1
5. BASE 1
6. COLLECTOR 2
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
DIM
A
MIN MAX MIN MAX
MILLIMETERS
1.80 2.200.071 0.087
INCHES
B1.15 1.350.045 0.053
C0.80 1.100.031 0.043
D0.10 0.300.004 0.012
G0.65 BSC0.026 BSC
H--- 0.10---0.004
J0.10 0.250.004 0.010
K0.10 0.300.004 0.012
N0.20 REF0.008 REF
S2.00 2.200.079 0.087
V0.30 0.400.012 0.016
B0.2 (0.008) MM
123
A
GV
S
H
C
N
J
K
654
–B–
D6 PL
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without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
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4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031
Phone: 81–3–5740–2700
Email: r14525@onsemi.com
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Sales Representative.
MBT3904DW1T1/D
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