MC74HC1G08 Single 2-Input AND Gate The MC74HC1G08 is a high speed CMOS 2-input AND gate fabricated with silicon gate CMOS technology. The internal circuit is composed of multiple stages, including a buffer output which provides high noise immunity and stable output. The MC74HC1G08 output drive current is 1/2 compared to MC74HC series. http://onsemi.com MARKING DIAGRAMS Features * High Speed: tPD = 7 ns (Typ) at VCC = 5 V Low Power Dissipation: ICC = 1 mA (Max) at TA = 25C High Noise Immunity Balanced Propagation Delays (tpLH = tpHL) Symmetrical Output Impedance (IOH = IOL = 2 mA) Chip Complexity: FET = 44 NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC-Q100 Qualified and PPAP Capable These Devices are Pb-Free / Halogen-Free and are RoHS Compliant IN B 1 IN A 2 GND 3 5 VCC 4 OUT Y & SC-88A / SOT-353 / SC-70 DF SUFFIX CASE 419A H2 M G G 1 5 H2 M G G TSOP-5 / SOT-23 / SC-59 DT SUFFIX CASE 483 H2 M G 1 = Device Code = Date Code* = Pb-Free Package (Note: Microdot may be in either location) *Date Code orientation and/or position may vary depending upon manufacturing location. PIN ASSIGNMENT 1 Figure 1. Pinout IN A IN B 5 M * * * * * * * IN B 2 IN A 3 GND 4 OUT Y 5 VCC FUNCTION TABLE OUT Y Inputs Figure 2. Logic Symbol Output A B Y L L H H L H L H L L L H ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. (c) Semiconductor Components Industries, LLC, 2012 October, 2012 - Rev. 14 1 Publication Order Number: MC74HC1G08/D MC74HC1G08 MAXIMUM RATINGS Symbol Parameter Value Unit *0.5 to )7.0 V V VCC DC Supply Voltage VIN DC Input Voltage *0.5 to VCC )0.5 DC Output Voltage VOUT *0.5 to VCC )0.5 V IIK DC Input Diode Current $20 mA IOK DC Output Diode Current $20 mA IOUT DC Output Sink Current $12.5 mA ICC DC Supply Current per Supply Pin $25 mA *65 to )150 C TSTG Storage Temperature Range TL Lead Temperature, 1 mm from Case for 10 Seconds TJ Junction Temperature Under Bias qJA Thermal Resistance PD Power Dissipation in Still Air at 85C MSL Moisture Sensitivity FR Flammability Rating VESD Latchup Performance C C SC70-5/SC-88A/SOT-353 (Note 1) SOT23-5/TSOP-5/SC59-5 350 230 C/W SC70-5/SC-88A/SOT-353 SOT23-5/TSOP-5/SC59-5 150 200 mW Level 1 Oxygen Index: 28 to 34 ESD Withstand Voltage ILATCHUP 260 )150 UL 94 V-0 @ 0.125 in Human Body Model (Note 2) Machine Model (Note 3) Charged Device Model (Note 4) u2000 u200 N/A V Above VCC and Below GND at 125C (Note 5) $500 mA Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Measured with minimum pad spacing on an FR4 board, using 10 mm-by-1 inch, 20 ounce copper trace with no air flow. 2. Tested to EIA/JESD22-A114-A. 3. Tested to EIA/JESD22-A115-A. 4. Tested to JESD22-C101-A. 5. Tested to EIA/JESD78. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit VCC DC Supply Voltage 2.0 6.0 V VIN DC Input Voltage 0.0 VCC V DC Output Voltage Operating Temperature Range Input Rise and Fall Time VCC = 2.0 V VCC = 3.0 V VCC = 4.5 V VCC = 6.0 V 80 1,032,200 117.8 90 419,300 47.9 100 178,700 20.4 110 79,600 9.4 120 37,000 4.2 130 17,800 2.0 140 8,900 1.0 V C 0 0 0 0 1000 600 500 400 ns TJ = 80C Time, Years VCC )125 TJ = 90C Time, Hours 0.0 *55 FAILURE RATE OF PLASTIC = CERAMIC UNTIL INTERMETALLICS OCCUR TJ = 110C Junction Temperature C NORMALIZED FAILURE RATE DEVICE JUNCTION TEMPERATURE VERSUS TIME TO 0.1% BOND FAILURES TJ = 130C tr , tf TJ = 120C TA TJ = 100C VOUT 1 1 10 TIME, YEARS 100 1000 Figure 3. Failure Rate vs. Time Junction Temperature http://onsemi.com 2 MC74HC1G08 DC ELECTRICAL CHARACTERISTICS VCC Symbol Parameter Test Conditions (V) Min 1.5 2.1 3.15 4.20 VIH Minimum High-Level Input Voltage 2.0 3.0 4.5 6.0 VIL Maximum Low-Level Input Voltage 2.0 3.0 4.5 6.0 VOH Minimum High-Level Output Voltage VIN = VIH or VIL VIN = VIH or VIL IOH = -20 mA VIN = VIH or VIL IOH = -2 mA IOH = -2.6 mA VOL Maximum Low-Level Output Voltage VIN = VIH or VIL VIN = VIH or VIL IOL = 20 mA TA = 255C Typ TA v 855C Max Min Max 1.5 2.1 3.15 4.20 0.5 0.9 1.35 1.80 *555C v TA v 1255C Min Max 1.5 2.1 3.15 4.20 0.5 0.9 1.35 1.80 V 0.5 0.9 1.35 1.80 2.0 3.0 4.5 6.0 1.9 2.9 4.4 5.9 2.0 3.0 4.5 6.0 1.9 2.9 4.4 5.9 1.9 2.9 4.4 5.9 4.5 6.0 4.18 5.68 4.31 5.80 4.13 5.63 4.08 5.58 Unit V V 2.0 3.0 4.5 6.0 0.0 0.0 0.0 0.0 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 VIN = VIH or VIL IOL = 2 mA IOL = 2.6 mA 4.5 6.0 0.17 0.18 0.26 0.26 0.33 0.33 0.40 0.40 V IIN Maximum Input Leakage Current VIN = 6.0 V or GND 6.0 $0.1 $1.0 $1.0 mA ICC Maximum Quiescent Supply Current VIN = VCC or GND 6.0 1.0 10 40 mA AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 6.0 ns) TA = 255C TA v 855C *555C v TA v 1255C IIIIIIIIIII IIIIIIII III III II III III IIII IIII II IIIIIIII III III II III III IIII IIII II IIII IIIIIII IIIIIIII III III II III III IIII IIII II IIII IIIIIII IIIIIIII III III II III III IIIIIIII II IIIIIIIIIII IIII IIIIIII IIIIIIII III III II III III IIII IIII II IIIIIIIIIII IIIIIIII III III II III III IIII IIII II IIIIIIIIIII IIIIIIII III III II III III IIII IIII II IIIIIIIIIII IIIIIIII III III II III III IIIIIIII II IIII IIIIIII IIIIIIII III III II III III IIII IIII II IIIIIIIIIII IIIIIIII III III II III III IIIIIIII II Symbol Parameter Test Conditions tPLH, tPHL Maximum Propagation Delay, Input A or B to Y VCC = 5.0 V tTLH, tTHL Output Transition Time CIN Maximum Input Capacitance Min Typ Max CL = 15 pF 3.5 15 VCC = 2.0 V VCC = 3.0 V VCC = 4.5 V VCC = 6.0 V CL = 50 pF 20 11 8 7 VCC = 5.0 V CL = 15 pF VCC = 2.0 V VCC = 3.0 V VCC = 4.5 V VCC = 6.0 V CL = 50 pF Min Max Min Max Unit 20 25 ns 100 27 20 17 125 35 25 21 155 90 35 26 3 10 15 20 25 16 11 9 125 35 25 21 155 45 31 26 200 60 38 32 5 10 10 10 ns pF Typical @ 255C, VCC = 5.0 V CPD Power Dissipation Capacitance (Note 6) 10 pF 6. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no-load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC. http://onsemi.com 3 MC74HC1G08 tr INPUT A or B OUTPUT Y tf VCC 90% 50% 10% GND tPHL tPLH 90% 50% 10% tTLH tTHL Figure 4. Switching Waveforms VCC OUTPUT INPUT CL* *Includes all probe and jig capacitance. A 1-MHz square input wave is recommended for propagation delay tests. Figure 5. Test Circuit ORDERING INFORMATION Device Package MC74HC1G08DFT1G SC70-5/SC-88A/SOT-353 (Pb-Free) MC74HC1G08DFT2G SC70-5/SC-88A/SOT-353 (Pb-Free) MC74HC1G08DTT1G SOT23-5/TSOP-5/SC59-5 (Pb-Free) NLVHC1G08DFT1G* SC70-5/SC-88A/SOT-353 (Pb-Free) NLVHC1G08DFT2G* SC70-5/SC-88A/SOT-353 (Pb-Free) NLVHC1G08DTT1G* SOT23-5/TSOP-5/SC59-5 (Pb-Free) Shipping 3000 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC-Q100 Qualified and PPAP Capable. http://onsemi.com 4 MC74HC1G08 PACKAGE DIMENSIONS SC-88A (SC-70-5/SOT-353) CASE 419A-02 ISSUE K A NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. 419A-01 OBSOLETE. NEW STANDARD 419A-02. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. G 5 4 -B- S 1 2 DIM A B C D G H J K N S 3 D 5 PL 0.2 (0.008) M B M N J C H K http://onsemi.com 5 INCHES MIN MAX 0.071 0.087 0.045 0.053 0.031 0.043 0.004 0.012 0.026 BSC --0.004 0.004 0.010 0.004 0.012 0.008 REF 0.079 0.087 MILLIMETERS MIN MAX 1.80 2.20 1.15 1.35 0.80 1.10 0.10 0.30 0.65 BSC --0.10 0.10 0.25 0.10 0.30 0.20 REF 2.00 2.20 MC74HC1G08 PACKAGE DIMENSIONS TSOP-5 CASE 483-02 ISSUE H D 5X NOTE 5 2X 0.10 T 2X 0.20 T NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. 5. OPTIONAL CONSTRUCTION: AN ADDITIONAL TRIMMED LEAD IS ALLOWED IN THIS LOCATION. TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2 FROM BODY. 0.20 C A B M 5 1 4 2 L 3 B S K DETAIL Z G A DIM A B C D G H J K L M S DETAIL Z J C 0.05 SEATING PLANE H T MILLIMETERS MIN MAX 3.00 BSC 1.50 BSC 0.90 1.10 0.25 0.50 0.95 BSC 0.01 0.10 0.10 0.26 0.20 0.60 1.25 1.55 0_ 10 _ 2.50 3.00 SOLDERING FOOTPRINT* 0.95 0.037 1.9 0.074 2.4 0.094 1.0 0.039 0.7 0.028 SCALE 10:1 mm inches *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC's product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. 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