September 2013 Doc ID 17360 Rev 3 1/37
1
VNQ5E250AJ-E
Quad channel high-side driver with analog current sense
for automotive applications
Features
■
General
– Inrush current active management by
power limitation
– Very low standby current
– 3.0 V CMOS compatible inputs
– Optimized electromagnetic emissions
– Very low electromagnetic susceptibility
– Compliant with European directive
2002/95/EC
– Very low current sense leakage
■
Diagnostic functions
– Proportional load current sense
– High current sense precision for wide
currents range
– Current sense disable
– Off-state open-load detection
– Output short to V
CC
detection
– Overload and short to ground (power
limitation) indication
– Therm al sh utdow n indica tion
■
Protections
– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss
of V
CC
– Overtemperature shutdown with auto
restart (thermal shutdown)
– Reverse battery protected
– Electros tatic disc harge protection
Applications
■
All types of resistive, inductive and capacitive
loads
■
Suitable as LED driver
■
Suitable as relays driver
Description
The VNQ5E250AJ-E is a quad channel high-side
driver manufactured using ST proprietary
VIPower™ M0-5 technology and housed in
PowerSSO-16 package. The device is designed
to drive 12 V automotive grounded loads, and to
provide protection and diagnostics. It also
implements a 3 V and 5 V CMOS compatible
interface for the use with any microcontroller.
The device integrates advanced protective
functions such as load current limitation, inrush
and overload active management by power
limitation, overtemperature shut-off with auto-
restart and overvoltage active clamp. A dedicated
analog current sense pin is associated with every
output channel providing enhanced diagnostic
functions including fast detection of overload and
short-circuit to ground through power limitation
indication, overtemperature indication, short-
circuit to V
CC
diagnosis and on-state and off-state
open-load detection. The current sensing and
diagnostic feedback of the whole device can be
disabled by pulling the CS_DIS pin high to share
the external sense resistor with similar devices.
Max supply voltage V
CC
41 V
Operati ng vol tage range V
CC
4 to 28 V
Max on-state resistance (per ch.) R
ON
250 mΩ
Current lim itation (typ) I
LIMH
5A
Off-st a te sup ply current I
S
2µA
(1)
1. Typical value with all loads connected.
PowerSSO-16
www.st.com
Contents VNQ5E250AJ-E
2/37 Doc ID 17360 Rev 3
Contents
1 Block diagram and pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Elect rical char acteristi c s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.5 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 24
3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 24
3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 25
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.4 Curre nt sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.4.1 Short to V
CC
and off-state open load detection . . . . . . . . . . . . . . . . . . . 27
3.5 Maximum demagnetization energy (V
CC
=13.5V) . . . . . . . . . . . . . . . . . . 28
4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
4.1 PowerSSO-16 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.1 ECOPACK
®
packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.2 PowerSSO-16 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
6 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
VNQ5E250AJ-E List of tables
Doc ID 17360 Rev 3 3/37
List of tables
Table 1. Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 5. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 6. Switching (V
CC
= 13 V; Tj = 25 °C). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 7. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 8. Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 9. Current sense (8 V < V
CC
< 18 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 10. Open-load detection (8 V < V
CC
< 18 V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 12. Electrical transient requirements (part 1/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 13. Electrical transient requirements (part 2/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 14. Electrical transient requirements (part 3/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 15. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table 16. PowerSSO-16 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Table 17. Device summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
List of figures VNQ5E250AJ-E
4/37 Doc ID 17360 Rev 3
List of figures
Figure 1. Block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 5. Open-load off-state delay timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 6. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 7. Delay response time between rising edge of output current and rising edge of current
sense (CS enabled) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 8. Output voltage drop limitation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 9. I
OUT
/I
SENSE
vs I
OUT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 10. Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 11. Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 12. Overload or short to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 13. Intermittent overload. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 14. Off-state open-load with external circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 15. Short to V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 16. T
J
evolution in overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 17. Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 18. High-level input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 19. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 20. Input low-level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 21. Input high-level voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 22. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 23. On-state resistance vs T
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 24. On-state resistance vs V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 25. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 26. Turn-on voltage slope. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 27. I
LIMH
vs T
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 28. Turn-off voltage slope. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 29. CS_DIS high-level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 30. CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 31. CS_DIS low-level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 32. Application schematic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 33. Current sense and diagnostic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 34. Maximum turn-off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 28
Figure 35. PowerSSO-16 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 36. Rthj-amb vs PCB copper area in open box free air condition (one channel ON) . . . . . . . . 29
Figure 37. PowerSSO-16 thermal impedance junction ambient single pulse (one channel on) . . . . . 30
Figure 38. Thermal fitting model of a double channel HSD in PowerSSO-16 . . . . . . . . . . . . . . . . . . . 31
Figure 39. PowerSSO-16 package dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 40. PowerSSO-16 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 41. PowerSSO-16 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
VNQ5E250AJ-E Block diagram and pin configuration
Doc ID 17360 Rev 3 5/37
1 Block diagram and pin configuration
Figure 1. Block diagram
Table 1. Pin functions
Name Function
V
CC
Battery connection.
OUTPUT
n
Power output.
GND Ground connection. Must be reverse battery protected by an external
diode/resist or ne twork.
INPUT
n
Voltage controlled input pin with hysteresis, CMOS compatible. Controls output
switch state.
CURRENT
SENSE
n
Analog current sense pin, delivers a current proportional to the load current.
CS_DIS Active high CMOS compatible pin, to disable the current sense pin.
V
CC
CH 1
Control & Diagnostic 1
LOGIC
DRIVER
V
ON
Limitation
Current
Limitation
Power
Clamp
OFF State
Open load
Over
temp.
Undervoltage
V
SENSEH
Current
Sense
CH 3
CH 4
CH 2
OVERLOAD PROTECTION
(ACTIVE POWER LIMITATION)
IN1
IN2
IN3
IN4
CS1
CS2
CS3
CS4
CS_
DIS
GND
OUT4
OUT3
OUT2
OUT1
Signal Clamp
CONTROL & DIAGNO STIC
Channels 2, 3 & 4
Block diagram and pin configuration VNQ5E250AJ-E
6/37 Doc ID 17360 Rev 3
Figure 2. Configuration diagram (top view)
Table 2. Suggested connections for unused and not connected pin s
Connection / pin Current sense N.C. Output Input CS_DIS
Floating Not allowed X X X X
To ground Through 1 kΩ
resistor X Not allowed Through 10 kΩ
resistor Through
10 kΩ resistor
CURRENT SENSE4
CURRENT SENSE3
CURRENT SENSE2
CURRENT SENSE1
INPUT2
INPUT4
INPUT1
INPUT3
GND
N.C.
OUTPUT3
OUTPUT1
OUTPUT2
CS_DIS
N.C.
OUTPUT4
TAB=Vcc
1
3
2
4
5
6
7
89
10
11
12
13
15
14
16
VNQ5E250AJ-E Electrical spec ifications
Doc ID 17360 Rev 3 7/37
2 Electrical specifications
Figure 3. Current and voltage conventions
Note: V
Fn
= V
OUTn
- V
CC
during reverse battery condition.
2.1 Absolute maximum ratings
Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to the conditions in table below for extended
periods may affect device reliability. Refer also to the STMicroelectronics SURE Program
and other relevant quality document.
V
Fn
I
S
I
GND
V
CC
V
CC
OUTPUTn
INPUTn
V
INn
V
SENSEn
GND
CS_DIS
I
CSD
V
CSD
I
INn
CURRENT
S
ENSEn
V
OUTn
I
OUTn
I
SENSEn
Table 3. Absolute maximum ratings
Symbol Parameter Value Unit
V
CC
DC supply voltage 41 V
V
CC
Reverse DC supply voltage 0.3 V
I
GND
DC reverse ground pin current 200 mA
I
OUT
DC output current Internally
limited A
-I
OUT
Reverse DC output current 5 A
I
IN
DC input current -1 to 10 mA
I
CSD
DC current sense disable input current -1 to 10 mA
I
CSENSE
DC reverse CS pin current 200 mA
V
CSENSE
Current sense maximum voltage V
CC
-41
+V
CC
V
V
E
MAX
Maximum switching energy (single pulse)
(L = 36 mH; R
L
=0Ω; V
bat
=13.5V; T
jstart
=150°C;
I
OUT
= I
limL
(Typ.)) 39 mJ
Electrical specifications VNQ5E250AJ-E
8/37 Doc ID 17360 Rev 3
2.2 Thermal data
V
ESD
Electrostatic discharge (human body model: R=1.5KΩ; C=100pF)
– Input
– Current sense
– CS_DIS
– Output
–V
CC
4000
2000
4000
5000
5000
V
V
V
V
V
V
ESD
Charge device model (CDM-AEC-Q100-011) 750 V
T
j
Junction operating temperature -40 to 150 °C
T
stg
Storage temperature -55 to 150 °C
Table 3. Absolute maximum ratings (continued)
Symbol Parameter Value Unit
Table 4. Thermal data
Symbol Parameter Max. value Unit
R
thj-amb
Thermal resistance junction-ambie nt (MA X) See Figure 36 °C/W
R
thj-case
Thermal resistance junction -case (MAX) 4.5 °C/W
VNQ5E250AJ-E Electrical spec ifications
Doc ID 17360 Rev 3 9/37
2.3 Electrical characteristics
Values specified in this section are for 8 V < V
CC
<28V, -40°C<T
j
< 150 °C, unless
otherwise specified.
Table 5. Power section
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
CC
Operating supply voltage 4 13 28 V
V
USD
Undervoltage shutdown 3.5 4 V
V
USDhyst
Undervoltage shutdown
hysteresis 0.5 V
R
ON
On-state res istance
I
OUT
= 0.5 A; T
j
= 25 °C 250 mΩ
I
OUT
= 0.5 A; T
j
= 150 °C 500 mΩ
I
OUT
= 0.5 A; V
CC
=5V; T
j
= 25 °C 300 mΩ
V
clamp
Clamp voltage I
S
=20 mA 41 46 52 V
I
S
Supply current
Off-state; V
CC
=13V; T
j
=25°C;
V
IN
=V
OUT
=V
SENSE
=V
CSD
=0V 2
(1)
1. PowerMOS leakage included.
5
(1)
µA
On-state; V
CC
=13V; V
IN
=5V;
I
OUT
=0A 814mA
I
L(off)
Off-state output current
(2)
2. For each channel.
V
IN
=V
OUT
=0V; V
CC
=13V;
T
j
=25°C 00.013 µA
V
IN
=V
OUT
=0V; V
CC
=13V;
T
j
=125°C 05µA
V
F
Output - V
CC
diode
voltage
(2)
-I
OUT
= 0.5 A; T
j
=150°C 0.7 V
Table 6. Switching (V
CC
=13V; T
j
=25°C)
Symbol Parameter Test conditions Min. Typ. Max. Unit
t
d(on)
Turn-on delay time R
L
=26Ω (see Figure 6)— 10 — µs
t
d(off)
Turn-off delay time R
L
=26Ω (see Figure 6)— 8 — µs
(dV
OUT
/dt)
on
Turn-on voltage slope R
L
=26Ω—0.8—V/µs
(dV
OUT
/dt)
off
Turn-off voltage slope R
L
=26Ω—1—V/µs
W
ON
Switching energy
losses during t
won
R
L
=26Ω (see Figure 6)— 16 — µJ
W
OFF
Switching energy
losses during t
woff
R
L
=26Ω (see Figure 6)— 12 — µJ
Electrical specifications VNQ5E250AJ-E
10/37 Doc ID 17360 Rev 3
Table 7. Logic inputs
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
IL
Input low level voltage 0.9 V
I
IL
Low level input current V
IN
=0.9V 1 µA
V
IH
Input high level voltage 2.1 V
I
IH
High lev el input curr ent V
IN
=2.1V 10 µA
V
I(hyst)
Input hysteresis voltage 0.25 V
V
ICL
Input clamp voltage I
IN
=1mA 5.5 7 V
I
IN
=-1mA -0.7 V
V
CSDL
CS_DIS low level voltage 0.9 V
I
CSDL
Low level CS_DIS current V
CSD
=0.9V 1 µA
V
CSDH
CS_DIS high level voltage 2.1 V
I
CSDH
High level CS_DIS current V
CSD
=2.1V 10 µA
V
CSD(hyst)
CS_DIS hysteresis voltage 0.25 V
V
CSCL
CS_DIS clamp voltage I
CSD
=1mA 5.5 7 V
I
CSD
=-1mA -0.7 V
Table 8. Protections and diagnostics
(1)
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
limH
DC short circuit current V
CC
=13V 3.5 5 7 A
4.5 V < V
CC
<28V 7 A
I
limL
Short circuit current
during therm al cycling V
CC
=13V; T
R
<T
j
<T
TSD
1.25 A
T
TSD
Shutdown temperature 150 175 200 °C
T
R
Reset temperature
T
RS
+ 1
T
RS
+ 5
°C
T
RS
Thermal reset of
STATUS 135 °C
T
HYST
Thermal hysteresis
(T
TSD
-T
R
)7°C
V
DEMAG
Turn-off output voltage
clamp I
OUT
= 0.5 A; V
IN
=0;
L=20mH
V
CC
-41
V
CC
-46 V
CC
-52
V
V
ON
Output voltage drop
limitation
I
OUT
=0.015;
T
j
= -40 °C...150 °C
(see Figure 8)25 mV
VNQ5E250AJ-E Electrical spec ifications
Doc ID 17360 Rev 3 11/37
Table 9. Current sense (8 V < V
CC
<18V)
Symbol Parameter Test conditions Min. Typ. Max. Unit
K
0
I
OUT
/I
SENSE
I
OUT
= 0.025 A;V
SENSE
=0.5V
T
j
= -40 °C...150 °C 295 500 705
K
1
I
OUT
/I
SENSE
I
OUT
= 0.25 A;V
SENSE
=0.5V
T
j
= -40 °C...150 °C
T
j
= 25 °C...150 °C 360
395 470
470 595
568
dK
1
/K
1(1)
Current sense ratio drift I
OUT
= 0.25 A;V
SENSE
=4V
T
j
= -40 °C...150 °C -9 +9 %
K
2
I
OUT
/I
SENSE
I
OUT
= 0.5 A;V
SENSE
=4V
T
j
= -40 °C...150 °C
T
j
= 25 °C...150 °C 425
445 485
485 555
540
dK
2
/K
2(1)
Current sense ratio drift I
OUT
= 0.5 A; V
SENSE
=4V
T
j
= -40 °C...150 °C -6 +6 %
K
3
I
OUT
/I
SENSE
I
OUT
= 1 A; V
SENSE
=4V
T
j
= -40 °C...150 °C
T
j
= 25 °C...150 °C 465
475 500
500 535
525
dK
3
/K
3(1)
Current sense ratio drift I
OUT
= 1 A; V
SENSE
=4V
T
j
= -40 °C...150 °C -4 +4 %
I
SENSE0
Analog sense leakage
current
I
OUT
= 0 A; V
SENSE
=0V;
V
CSD
=5V; V
IN
=0V;
T
j
= -40 °C...150 °C 01µA
V
CSD
=0V; V
IN
=5V;
T
j
= -40 °C...150 °C 02µA
I
OUT
= 0.5 A; V
SENSE
=0V;
V
CSD
=5V; V
IN
=5V;
T
j
= -40 °C...150 °C 01µA
I
OL
Openload ON-state
current
detectionthreshold
V
IN
= 5V; 8V<V
CC
<18V;
I
SENSE
= 5 µA 0.5 5 mA
V
SENSE
Max analog sense
output vol t ag e I
OUT
= 0.5 A; V
CSD
=0V;
R
SENSE
=10KΩ5V
V
SENSEH
Analog sense output
voltage in fault
condition
(2)
V
CC
= 13 V; R
SENSE
= 3.9 KΩ8V
V
CC
= 5 V; R
SENSE
= 3.9 KΩ4.5
I
SENSEH
Analog sense output
current in fault
condition
(2)
V
CC
=13V; V
SENSE
=5V 9 mA
V
CC
=5V; V
SENSE
=3.5V 6
t
DSENSE1H
Delay response time
from falling edge of
CS_DIS pin
V
SENSE
<4V;
0.025 A <I
OUT
< 1 A;
4.5 V < V
CC
<18V;
I
SENSE
=90% of I
SENSE
max
(see Figure 4)
40 100 µs
Electrical specifications VNQ5E250AJ-E
12/37 Doc ID 17360 Rev 3
t
DSENSE1L
Delay response time
from rising edge of
CS_DIS pin
V
SENSE
<4V;
0.025 A < I
OUT
< 1 A;
4.5 V < V
CC
<18V;
I
SENSE
=10 % of I
SENSE
max
(see Figure 4)
520µs
t
DSENSE2H
Delay response time
from rising edge of
INPUT pin
V
SENSE
<4V;
0.025A < I
OUT
< 1 A;
4.5 V < V
CC
<18V;
I
SENSE
=90% of I
SENSE
max
(see Figure 4)
50 200 µs
Δt
DSEN
SE
2H
Delay response time
between rising edge of
output curre nt and rising
edge of current sense
V
SENSE
<4V;
I
SENSE
=90% of I
SENSEMAX
;
4.5 V < V
CC
<18V;
I
OUT
=90% of I
OUTMAX
I
OUTMAX
= 1.5 A (see Figure 7)
110 µs
t
DSENSE2L
Delay response time
from falling edge of
INPUT pin
V
SENSE
<4V;
0.025A < I
OUT
< 1 A;
4.5 V < V
CC
<18V;
I
SENSE
=10% of I
SENSE
max
(see Figure 4)
15 150 µs
1. Parameter guaranteed by design; it is not tested.
2. Fault condition includes: power limitation, overtemperature and open load OFF-state detection.
Table 10. Open-load detection (8 V < V
CC
<18V)
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
OL
Open-l oad o ff-s tat e vol tag e
detection threshold V
IN
= 0 V; 4.5 V < V
CC
<18V 2 - 4 V
t
DSTKON
Output short circuit to V
CC
detection delay at turn-off See Figure 5 180 - 1200 µs
I
L(off2)
Off-state output current at
V
OUT
= 4 V V
IN
=0V; V
SENSE
=0V
V
OUT
rising from 0 V to 4 V -120 - 0 µA
td_vol Delay response from output
rising edge to V
SENSE
rising
edge in open-load
V
OUT
= 4 V; V
IN
= 0 V
V
SENSE
= 90% of V
SENSEH
-20µs
Table 9. Current sense (8 V < V
CC
< 18 V) (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
VNQ5E250AJ-E Electrical spec ifications
Doc ID 17360 Rev 3 13/37
Figure 4. Current sense delay characteristics
Figure 5. Open-load off-state delay timing
Figure 6. Switching characteristics
SENSE CURRENT
INPUT
LOAD CURRENT
CS_DIS
t
DSENSE2H
t
DSENSE2L
t
DSENSE1L
t
DSENSE1H
V
IN
V
CS
t
DSTKON
OUTPUT STUCK TO V
CC
V
OUT
> V
OL
V
SENSEH
V
OUT
dV
OUT
/dt
(on)
t
r
80%
10% t
f
dV
OUT
/dt
(off)
t
d(off)
t
d(on)
INPUT
t
t
90%
t
Won
t
Woff
Electrical specifications VNQ5E250AJ-E
14/37 Doc ID 17360 Rev 3
Figure 7. Delay response time between rising edge of output current and rising
edge of current sense (CS enabled)
Figure 8. Output voltage drop limitation
V
IN
I
OUT
I
SENSE
I
OUTMAX
I
SENSEMAX
90% I
SENSEMAX
90% I
OUTMAX
Δt
DSENSE2H
t
t
t
Von
Iout
Vcc-Vout
Tj=150
o
CTj=25
o
C
Tj=-40
o
C
Von/Ron(T)
VNQ5E250AJ-E Electrical spec ifications
Doc ID 17360 Rev 3 15/37
Figure 9. I
OUT
/I
SENSE
vs I
OUT
Figure 10. Maximum current sense ratio drift vs load current
Note: Parameter guaranteed by design; it is not tested.
250
300
350
400
450
500
550
600
650
700
750
0 0.2 0.4 0.6 0.8 1 1.2
Iout(A)
Iout/Isense
A
B
C
D
E
A: Max, T
j
= -40 °C to 150 °C
B: Max, T
j
= 25 °C to 150 °C
C: Typical, T
j
= -40 °C to 150 °C
D: Min, T
j
= 25 °C to 150 °C
E: Min, T
j
= -40 °C to 150 °C
-20
-15
-10
-5
0
5
10
15
20
0 0.25 0.5 0.75 1 1.25
Iout(A)
dK/K(%)
B
A
A Max, T
j
= -40 °C...150 °C B Min, T
j
= -40 °C...150 °C
Electrical specifications VNQ5E250AJ-E
16/37 Doc ID 17360 Rev 3
Table 11. Truth table
Conditions Input Output Sense (VCSD =0V)
(1)
1. If the V
CSD
is high, the SENSE output is at a high impedance, its potential depends on leakage currents
and external circuit.
Normal operati on L
HL
H0
Nominal
Overtemperature L
HL
L0
VSENSEH
Undervoltage L
HL
L0
0
Overload
H
H
X
(no power limitation)
Cycling
(power limit a tion)
Nominal
VSENSEH
Short circuit to GND
(Power limitation) L
HL
L0
VSENSEH
Open lo ad off- state
(with external pull-up) LHV
SENSEH
Short circuit to VCC
(external pul l-up
disconnected)
L
HH
HVSENSEH
< Nominal
Negative output voltage
clamp LL0
VNQ5E250AJ-E Electrical spec ifications
Doc ID 17360 Rev 3 17/37
Table 12. Electrical transient requirements (part 1/3)
ISO 7637 -2:
2004(E)
Test pulse
Test levels(1)
1. The above test levels must be considered referred to V
CC
= 13.5V except for pulse 5b.
Number of
pulses or
test times
Burst cycle/p ulse
repetition time Delays and
impedance
III IV Min. Max.
1 -75V -100V 5000 pulses 0.5s 5s 2 ms, 10Ω
2a +37V +50V 5000 pulses 0.2s 5s 50µs, 2Ω
3a -100 V -15 0V 1h 90ms 100ms 0.1µs, 50Ω
3b +75V +100V 1h 90ms 100ms 0.1µs, 50Ω
4 -6V -7V 1 pulse 100ms, 0.01Ω
5b(2)
2. Valid in case of external load dump clamp: 40V maximum referred to ground.
+65V +87V 1 pulse 400ms, 2Ω
Table 13. Electrical transient requirements (part 2/3)
ISO 7637-2:
2004E
Test pulse
Test level results
III VI
1C C
2a C C
3a C C
3b C C
4C C
5b(2) CC
Table 14. Electrical transient requirements (part 3/3)
Class Contents
C All functions of the device performed as designed after exposure to disturbance.
EOne or more functions of the device did not perform as designed after exposure to
disturbance and cannot be returned to proper operation without replacing the device.
Electrical specifications VNQ5E250AJ-E
18/37 Doc ID 17360 Rev 3
2.4 Waveforms
Figure 11. Normal operation
Figure 12. Overload or short to GND
I
OUT
V
SENSE
V
CS_DIS
INPUT
Nominal load Nominal load
Normal operation
VNQ5E250AJ-E Electrical spec ifications
Doc ID 17360 Rev 3 19/37
Figure 13. Intermittent overload
Figure 14. Off-state open-load with external circuitry
I
OUT
V
SENSE
V
CS_DIS
INPUT
I
LimH
>Nominal load
Intermittent Overload
I
LimL
>
Overload
V
SENSEH
>
INPUT
OFF-State Open Load
with external circutry
VOL
IOUT
VSENSE
VCS_DIS
VOUT
VOUT > VOL
tDSTK(on)
VSENSEH >
Electrical specifications VNQ5E250AJ-E
20/37 Doc ID 17360 Rev 3
Figure 15. Short to V
CC
Figure 16. T
J
evolution in overload or short to GND
t
DSTK(on)
V
OUT
> V
OL
Resistive
Short to V
CC
Hard
Short to V
CC
Short to V
CC
I
OUT
V
CS_DIS
V
OUT
V
OL
t
DSTK(on)
T
TSD
T
R
T
J
evolution in
Overload or Short to GND
I
LimH
>
< I
LimL
T
J_START
T
HYST
Power Limitation
Self-limitation of fast thermal transients
INPUT
I
OUT
T
J
VNQ5E250AJ-E Electrical spec ifications
Doc ID 17360 Rev 3 21/37
2.5 Electrical characteristics curves
Figure 17. Off-state output current Figure 18. High-level input current
Figure 19. Input clamp voltage Figure 20. Input low-level voltage
Figure 21. Input high-level voltage Figure 22. Input hysteresis voltage
Iloff [nA]
0
50
100
150
200
250
300
-50 -25 0 25 50 75 100 125 150 175
Tc [°C]
Off State
Vcc= 13V
Vin=Vout= 0
Iih [uA]
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
-50 -25 0 25 50 75 100 125 150 175
Tc [°C]
Vin= 2.1V
Vicl [V]
5
5.2
5.4
5.6
5.8
6
6.2
6.4
6.6
6.8
7
-50 -25 0 25 50 75 100 125 150 175
Tc [°C ]
Iin= 1mA
Vil [V]
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
-50 -25 0 25 50 75 100 125 150 175
Tc [°C]
Vih [V]
0
0.5
1
1.5
2
2.5
3
3.5
4
-50 -25 0 25 50 75 100 125 150 175
Tc [°C]
Vihyst [V]
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
-50 -25 0 25 50 75 100 125 150 175
Tc [°C]
Electrical specifications VNQ5E250AJ-E
22/37 Doc ID 17360 Rev 3
Figure 23. On-state resistance vs T
case
Figure 24. On-state resistance vs V
CC
Figure 25. Undervoltage shutdown Figure 26. Turn-on voltage slope
Figure 27. I
LIMH
vs T
case
Figure 28. Turn-off voltage slope
Ron [mOhm]
0
250
500
750
1000
1250
1500
1750
2000
2250
2500
-50 -25 0 25 50 75 100 125 150 175
Tc [°C]
Iout= 0.5A
Vcc= 13V
Ron [mOhm]
0
50
100
150
200
250
300
350
400
450
500
0 5 10 15 20 25 30 35 40
Vcc [V]
T c= - 40°C
T c= 125°C
Tc= 125°C
Tc= 150°C
Tc= -40°C
T c= 25°C
Vusd [V]
0
2
4
6
8
10
12
14
16
-50 -25 0 25 50 75 100 125 150 175
Tc [°C]
(dVout/dt)On [V/ms]
0
500
1000
1500
2000
2500
3000
3500
4000
4500
5000
-50 -25 0 25 50 75 100 125 150 175
Tc [°C]
Vcc= 13V
Rl= 26Ω
Ilimh [A]
0
1
2
3
4
5
6
7
8
9
10
-50 -25 0 25 50 75 100 125 150 175
Tc [°C]
Vcc= 13V
(dVout/dt) Off [V/ms]
0
500
1000
1500
2000
2500
3000
3500
4000
4500
5000
-50 -25 0 25 50 75 100 125 150 175
Tc [°C]
Vcc= 13V
Rl= 26Ω
VNQ5E250AJ-E Electrical spec ifications
Doc ID 17360 Rev 3 23/37
Figure 29. CS_DIS high-level voltage Figure 30. CS_DIS clamp voltage
Figure 31. CS_DIS low-level voltage
Vcsdh [V]
0
0.5
1
1.5
2
2.5
3
3.5
4
-50 -25 0 25 50 75 100 125 150 175
Tc [°C]
Vcsdcl [V]
0
1
2
3
4
5
6
7
8
9
10
-50 -25 0 25 50 75 100 125 150 175
Tc [°C]
Iin= 1mA
Vcsdl [ V]
0
0.5
1
1.5
2
2.5
3
3.5
4
-50 -25 0 25 50 75 100 125 150 175
Tc [°C]
Application information VNQ5E250AJ-E
24/37 Doc ID 17360 Rev 3
3 Application information
Figure 32. Application schematic
Note: Channel 2, 3, 4 have the same internal circuit as channel 1.
3.1 GND protection network against reverse battery
This section provides two solutions for implementing a ground protection network against
reverse battery.
3.1.1 Solution 1: resistor in the ground line (R
GND
only)
This can be used with any type of load.
The following is an indication on how to dimension the R
GND
resistor.
1. R
GND
≤ 600mV / (I
S(on)max
).
2. R
GND
≥ (−V
CC
) / (-I
GND
)
where -I
GND
is the DC reverse ground pin current and can be found in the absolute
maximum rating section of the device datasheet.
Power Dissipat ion in R
GND
(when V
CC
<0: during reverse battery situations) is:
P
D
= (-V
CC
)
2
/R
GND
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where I
S(on)max
becomes the sum of the
maximum on-state currents of the different devices.
Please note that if the microprocessor ground is not shared by the device ground then the
R
GND
produces a shift (I
S(on)max
* R
GND
) in the input thresholds and the status output
values. This shift varies depending on how many devices are ON in the case of several high
side drivers sharing the same R
GND
.
V
CC
GND
OUTPUT
D
GND
R
GND
D
ld
Μ
CU
+5V
V
GND
CS_DIS
IINPUT
R
prot
R
prot
CURRENT SENSE
R
prot
R
SENSE
C
ext
VNQ5E250AJ-E Application information
Doc ID 17360 Rev 3 25/37
If the calculated power dissipation leads to a large resistor or several devices have to share
the same resistor then ST suggests to utilize Solution 2 (see below).
3.1.2 Solution 2: diode (D
GND
) in the ground line
A resistor (R
GND
=1kΩ) should be inserted in parallel to D
GND
if the device drives an
inductive load.
This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network produces a shift (≈600mV) in the input threshold
and in the status output values if the microprocessor ground is not common to the device
ground. This shift not varies if more than one HSD shares the same diode/resistor network.
3.2 Load dump protection
D
ld
is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the
V
CC
max DC rating. The same applies if the device is subject to transients on the V
CC
line
that are greater than the ones shown in the ISO 7637-2: 2004(E) table.
3.3 MCU I/Os protection
If a ground protection network is used and negative transients are present on the V
CC
line,
the control pins are pulled negative. ST suggests to insert a resistor (R
prot
) in li ne to prev ent
the microcontroller I/O pins to latch-up.
The value of these resistors is a compromise between the leakage current of microcontroller
and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of
microcontroller I/Os.
-V
CCpeak
/I
latchup
≤ R
prot
≤ (V
OHμC
-V
IH
-V
GND
) / I
IHmax
Calculation example:
For V
CCpeak
= - 100V and I
latchup
≥ 20mA; V
OHμC
≥ 4.5V
5kΩ ≤ R
prot
≤ 180kΩ.
Recommended values: R
prot
=10kΩ, C
EXT
=10nF
.
Application information VNQ5E250AJ-E
26/37 Doc ID 17360 Rev 3
3.4 Current sense and diagnostic
The current sense pin performs a double function (see Figure 33: Current sense and
diagnostic):
●
Current mirror of the load current in normal operation, deliveri ng a curre nt
proportional to the load one according to a known ratio K
X
.
The current I
SENSE
can be easily converted to a voltage V
SENSE
by means of an
external resistor R
SENSE
. Linearity between I
OUT
and V
SENSE
is ensured up to 5V
minimum (see parameter V
SENSE
in Table 9: Current sense (8 V < V
CC
<18V)). The
current sense accuracy depends on the output current (refer to current sense electrical
characteristics Table 9: Current sense (8 V < V
CC
<18V)).
●
Diagnostic flag in fault conditions, delivering a fixed voltage V
SENSEH
up to a
maximum current I
SENSEH
in case of the following fault conditions (refer to Table 11):
– Power limitation activation
– Overtemperature
– Short to V
CC
in off-state
– Open load in off-state with additional external components.
A logic level high on CS_DIS pin sets at the same time all the current sense pins of the
device in a high impedance state, thus disabling the current monitoring and diagnostic
detection. This feature allows multiplexing of the microcontroller analog inputs by sharing of
sense resistance and ADC line among different devices.
Figure 33. Current sense and diagnostic
Main MOSn
41V
OUTn
ILoff2
RSENSE
RPROT
To uC ADC
R
PU
V
PU
Pwr_Lim
VSENSE
PU_ CMD
Overtemperature
OL OFF
+
-
V
OL
CURRENT
SENSEn
IOUT
/K
X
ISENSEH
VBAT
VSENSEH
Load
INPUTn
V
CC
GND
CS_ DIS
VNQ5E250AJ-E Application information
Doc ID 17360 Rev 3 27/37
3.4. 1 Short to V
CC
and off-state open load detection
Short to V
CC
A short circuit between V
CC
and output is indicated by the relevant current sense pin set to
V
SENSEH
during the device off-state. Small or no current is delivered by the current sense
during the on-state depending on the nature of the short circuit.
Off-state open load with external circuitry
Detection of an open load in off mode requires an external pull-up resistor R
PU
conne cting
the output to a positive supply voltage V
PU
.
It is preferable V
PU
to be switched off during the module standby mode in order to avoid the
overall standby current consumption to increase in normal conditions, i.e. when load is
connected.
For proper open load detection in off-state, the external pull-up resistor must be selected
according to the following formula:
For the values of V
OLmin
,V
OLmax
and I
L(off2)
see Table 10: Open-load detection
(8 V < V
CC
<18V).
VV
RR
IRRVR
V
OL
PDPU
offLPDPUPUPD
ONupPull
OUT
4
max
)2(
_
=>
+
⋅⋅−⋅
=
−
Application information VNQ5E250AJ-E
28/37 Doc ID 17360 Rev 3
3.5 Maximum demagnetization energy (V
CC
=13.5V)
Figure 34. Maximum turn-off current versus inductance (for each channel)
Note: Values are generated with R
L
=0Ω
In case of repeti ti ve pulse s, T
jstart
(at beginning of each demagnetization) of every pulse
must not exceed the temperature specified above for curves A and B.
0.1
1
10
1 10 100 1000
L (mH)
I (A)
Demagnetization Demagnetization Demagnetization
t
VIN, IL
C: Tjstart = 125°C repetitive pulse
A: Tjstart = 150°C single pulse
B: Tjstart = 100°C repetitive pulse
A
B
C
VNQ5E250AJ-E Package and PCB thermal data
Doc ID 17360 Rev 3 29/37
4 Package and PCB thermal data
4.1 PowerSSO-16 thermal data
Figure 35. PowerSSO-16 PC board
1. Board finish thickness 1.6 mm +/- 10%, board double layer, board dimension 77 mm x 86 mm, board
material FR4, Cu thickness 0.070 mm (front and back side), thermal vias separation 1.2 mm, thermal via
diameter 0.3 mm +/- 0.08 mm, Cu thickness on vias 0.025 mm, footprint dimension 2.2 mm x 3.9 mm.
Figure 36.
R
thj-amb
vs PCB copper area in open box free air condition (one channel ON)
.
RTHjamb
30
40
50
60
70
80
90
0246810
RTHjamb
Package and PCB thermal data VNQ5E250AJ-E
30/37 Doc ID 17360 Rev 3
Figure 37.
PowerSSO-16 thermal impedance junction ambient single pulse (one channel on)
Equation 1: pulse calcula tion for mul a
1
10
100
0.0001 0.001 0.01 0.1 1 10 100 1000
Time (s)
ZTH (°C/W)
Cu=8 cm2
Cu=2 cm2
Cu=foot print
Z
THδ
R
TH
δZ
THtp
1δ–()+⋅=
where
δt
p
T⁄=
VNQ5E250AJ-E Package and PCB thermal data
Doc ID 17360 Rev 3 31/37
Figure 38. Thermal fitting model of a double channel HSD in PowerSSO-16
Note: The fitting model is a simplified thermal tool and is valid for transient evolutions where the
embedded protections (power limitation or thermal cycling during thermal shutdown) are not
triggered.
Table 15. Thermal parameters
Area/island (cm2) Footprint 2 8
R1 = R7 = R9 = R11 (°C/W) 2
R2 = R8 = R10 = R12 (°C/W) 2.5
R3 (°C/W) 5
R4 (°C/W) 16 6 6
R5 (°C/W) 30 20 10
R6 (°C/W) 26 20 18
C1 = C7 = C9 = C11 (W.s/°C) 0.0005
C2 = C8 = C10 = C12 (W.s/°C) 0.001
C3 (W.s/°C) 0.01
C4 (W.s/°C) 0.2 0.3 0.3
C5 (W.s/°C) 0.4 1 1
C6 (W.s/°C) 3 5 7
Package and packing information VNQ5E250AJ-E
32/37 Doc ID 17360 Rev 3
5 Package and packing information
5.1 ECOPACK
®
packages
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK
®
is an ST trademark.
5.2 PowerSSO-16 package information
Figure 39. PowerSSO-16 package dimensions
VNQ5E250AJ-E Package and packing information
Doc ID 17360 Rev 3 33/37
Note: 1 Dimensions D does not include mold flash protrusions or gate burrs.
Mold flash protrusions or gate burrs shall not exceed 0.15 mm in total (both side).
2 Drawings dimensions include single and matrix versions.
Table 16. PowerSSO-16 mechanical data
Symbol Millimeters
Min. Typ. Max.
A 1.25 1.72
A1 0.00 0.10
A2 1.10 1.62
B 0.18 0.36
C 0.19 0.25
D 4.80 5.00
E 3.80 4.00
e0.50
H 5.80 6.20
h 0.25 0.50
L 0.40 1.27
k0d 8d
X 1.90 2.50
Y 3.60 4.20
ddd 0.10
Package and packing information VNQ5E250AJ-E
34/37 Doc ID 17360 Rev 3
5.3 Packing information
Figure 40. PowerSSO-16 tube shipment (no suffix)
Figure 41. PowerSSO-16 tape and reel shipment (suffix “TR”)
All dimensions are in mm.
Base Q.ty 100
Bulk Q.ty 2000
Tube length (± 0.5) 532
A1.85
B6.75
C (± 0.1) 0.6
A
C
B
Base Q.ty 2500
Bulk Q.ty 2500
A (max) 330
B (min) 1.5
C (± 0.2) 13
F20.2
G (+ 2 / -0) 12.4
N (min) 60
T (max) 18.4
REEL DIMENSIONS
TAPE DIMENSIONS
According to Electronic Ind ustr ies Asso ciation
(EIA) Standard 481 rev. A, Feb. 1986
All dimensions are in mm.
Tape width W 12
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 8
Hole Diameter D (± 0.05) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.1) 5.5
Compartment Depth K (max) 4.5
Hole Spacing P1 (± 0.1) 2
Top
cover
tape
End
Start
No componentsNo components Components
500mm min
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
VNQ5E250AJ-E Order codes
Doc ID 17360 Rev 3 35/37
6 Order codes
Table 17. Device summary
Package Order codes
Part number (tube) Part number (tape & reel)
PowerSSO-16 VNQ5E250AJ-E VNQ5E250AJTR-E
Revision history VNQ5E250AJ-E
36/37 Doc ID 17360 Rev 3
7 Revision history
Table 18. Document revision history
Date Revision Changes
19-Apr-2010 1 Initial release.
19-Nov-2010 2
Table 9: Current sense (8 V < VCC <18V):
–t
DSENSE2H: updated maximun value
Table 4: Thermal data:
– Added Rthj-case row
19-Sep-20 13 3 Updated Discla im er.
VNQ5E250AJ-E
Doc ID 17360 Rev 3 37/37
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