Important notice
Dear Customer,
On 7 February 2017 the former NXP Standard Product business became a new company with the
tradename Nexperia. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS
semiconductors with its focus on the automotive, industrial, computing, consumer and wearable
application markets
In data sheets and application notes which still contain NXP or Philips Semiconductors references, use
the references to Nexperia, as shown below.
Instead of http://www.nxp.com, http://www.philips.com/ or http://www.semiconductors.philips.com/,
use http://www.nexperia.com
Instead of sales.addresses@www.nxp.com or sales.addresses@www.semiconductors.philips.com, use
salesaddresses@nexperia.com (email)
Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on
the version, as shown below:
- © NXP N.V. (year). All rights reserved or © Koninklijke Philips Electronics N.V. (year). All rights
reserved
Should be replaced with:
- © Nexperia B.V. (year). All rights reserved.
If you have any questions related to the data sheet, please contact our nearest sales office via e-mail
or telephone (details via salesaddresses@nexperia.com). Thank you for your cooperation and
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Kind regards,
Team Nexperia
1. Product profile
1.1 General description
PNP/PNP matched double transistors in small Surface-Mounted Device (SMD) plastic
packages. The transistors in the SOT666 and SOT363 (SC-88) packages are fully isolated
internally.
1.2 Features
nCurrent gain matching
nBase-emitter voltage matching
nCommon emitter configuration for SOT353 types
nApplication-optimized pinout
1.3 Applications
nCurrent mirror
nDifferential amplifier
1.4 Quick reference data
PMP5201V; PMP5201G;
PMP5201Y
PNP/PNP matched double transistors
Rev. 03 — 28 August 2009 Product data sheet
Table 1. Product overview
Type number Package PNP/PNP hFE1/hFE2
0.95 complement NPN/NPN
complement
NXP JEITA
PMP5201V SOT666 - PMP5501V PMP4201V
PMP5201G SOT353 SC-88A PMP5501G PMP4201G
PMP5201Y SOT363 SC-88 PMP5501Y PMP4201Y
Table 2. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
Per transistor
VCEO collector-emitter voltage open base - - −45 V
ICcollector current - - −100 mA
hFE DC current gain VCE =−5V;
IC=−2mA 200 290 450
PMP5201V_G_Y_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 28 August 2009 2 of 14
NXP Semiconductors PMP5201V; PMP5201G; PMP5201Y
PNP/PNP matched double transistors
[1] The smaller of the two values is taken as the numerator.
[2] The smaller of the two values is subtracted from the larger value.
2. Pinning information
3. Ordering information
Per device
hFE1/hFE2 hFE matching VCE =−5V;
IC=−2mA [1] 0.98 1 -
VBE1−VBE2 VBE matching VCE =−5V;
IC=−2mA [2] --2mV
Table 2. Quick reference data
…continued
Symbol Parameter Conditions Min Typ Max Unit
Table 3. Pinning
Pin Description Simplified outline Symbol
SOT666; SOT363
1 base TR1
2 base TR2
3 collector TR2
4 emitter TR2
5 emitter TR1
6 collector TR1
SOT353
1 base TR1
2 emitter TR1, TR2
3 base TR2
4 collector TR2
5 collector TR1
001aab555
6 45
1 32
006aaa550
321
456
TR1
TR2
132
45
006aaa551
54
123
TR1 TR2
Table 4. Ordering information
Type number Package
Name Description Version
PMP5201V - plastic surface-mounted package; 6 leads SOT666
PMP5201G SC-88A plastic surface-mounted package; 5 leads SOT353
PMP5201Y SC-88 plastic surface-mounted package; 6 leads SOT363
PMP5201V_G_Y_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 28 August 2009 3 of 14
NXP Semiconductors PMP5201V; PMP5201G; PMP5201Y
PNP/PNP matched double transistors
4. Marking
[1] * = -: made in Hong Kong
* = p: made in Hong Kong
* = t: made in Malaysia
* = W: made in China
5. Limiting values
[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
[2] Reflow soldering is the only recommended soldering method.
Table 5. Marking codes
Type number Marking code[1]
PMP5201V EC
PMP5201G R5*
PMP5201Y S9*
Table 6. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
Per transistor
VCBO collector-base voltage open emitter - −50 V
VCEO collector-emitter voltage open base - −45 V
VEBO emitter-base voltage open collector - −5V
ICcollector current - −100 mA
ICM peak collector current single pulse;
tp≤1ms -−200 mA
Ptot total power dissipation Tamb ≤25 °C
SOT666 [1][2] - 200 mW
SOT353 [1] - 200 mW
SOT363 [1] - 200 mW
Per device
Ptot total power dissipation Tamb ≤25 °C
SOT666 [1][2] - 300 mW
SOT353 [1] - 300 mW
SOT363 [1] - 300 mW
Tjjunction temperature - 150 °C
Tamb ambient temperature −65 +150 °C
Tstg storage temperature −65 +150 °C
PMP5201V_G_Y_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 28 August 2009 4 of 14
NXP Semiconductors PMP5201V; PMP5201G; PMP5201Y
PNP/PNP matched double transistors
6. Thermal characteristics
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Reflow soldering is the only recommended soldering method.
7. Characteristics
Table 7. Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
Per transistor
Rth(j-a) thermal resistance from
junction to ambient in free air
SOT666 [1][2] - - 625 K/W
SOT353 [1] - - 625 K/W
SOT363 [1] - - 625 K/W
Per device
Rth(j-a) thermal resistance from
junction to ambient in free air
SOT666 [1][2] - - 416 K/W
SOT353 [1] - - 416 K/W
SOT363 [1] - - 416 K/W
Table 8. Characteristics
T
amb
=25
°
C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Per transistor
ICBO collector-base cut-off
current VCB =−30 V;
IE=0A --−15 nA
VCB =−30 V;
IE=0A;
Tj= 150 °C
--−5µA
IEBO emitter-base cut-off
current VEB =−5V;
IC=0A --−100 nA
hFE DC current gain VCE =−5V;
IC=−10 µA- 250 -
VCE =−5V;
IC=−2mA 200 290 450
VCEsat collector-emitter
saturation voltage IC=−10 mA;
IB=−0.5 mA -−50 −200 mV
IC=−100 mA;
IB=−5mA -−200 −400 mV
VBEsat base-emittersaturation
voltage IC=−10 mA;
IB=−0.5 mA [1] -−760 - mV
IC=−100 mA;
IB=−5mA [1] -−920 - mV
PMP5201V_G_Y_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 28 August 2009 5 of 14
NXP Semiconductors PMP5201V; PMP5201G; PMP5201Y
PNP/PNP matched double transistors
[1] VBEsat decreases by about 1.7 mV/K with increasing temperature.
[2] VBE decreases by about 2 mV/K with increasing temperature.
[3] The smaller of the two values is taken as the numerator.
[4] The smaller of the two values is subtracted from the larger value.
VBE base-emitter voltage VCE =−5V;
IC=−2mA [2] −600 −650 −700 mV
VCE =−5V;
IC=−10 mA [2] --−760 mV
Cccollector capacitance VCB =−10 V;
IE=i
e=0A;
f=1MHz
- - 2.2 pF
Ceemitter capacitance VEB =−0.5 V;
IC=i
c=0A;
f=1MHz
-10-pF
fTtransition frequency VCE =−5V;
IC=−10 mA;
f = 100 MHz
100 175 - MHz
NF noise figure VCE =−5V;
IC=−0.2 mA;
RS=2kΩ;
f = 10 Hz to
15.7 kHz
- 1.6 - dB
VCE =−5V;
IC=−0.2 mA;
RS=2kΩ;
f = 1 kHz;
B = 200 Hz
- 3.1 - dB
Per device
hFE1/hFE2 hFE matching VCE =−5V;
IC=−2mA [3] 0.98 1 -
VBE1−VBE2 VBE matching VCE =−5V;
IC=−2mA [4] --2mV
Table 8. Characteristics
…continued
T
amb
=25
°
C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
PMP5201V_G_Y_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 28 August 2009 6 of 14
NXP Semiconductors PMP5201V; PMP5201G; PMP5201Y
PNP/PNP matched double transistors
Tamb =25°CV
CE =−5V
(1) Tamb = 100 °C
(2) Tamb =25°C
(3) Tamb =−55 °C
Fig 1. Collector current as a function of
collector-emitter voltage; typical values Fig 2. DC current gain as a function of collector
current; typical values
IC/IB=20
(1) Tamb =−55 °C
(2) Tamb =25°C
(3) Tamb = 100 °C
IC/IB=20
(1) Tamb = 100 °C
(2) Tamb =25°C
(3) Tamb =−55 °C
Fig 3. Base-emitter saturation voltage as a function
of collector current; typical values Fig 4. Collector-emitter saturation voltage as a
function of collector current; typical values
006aaa540
VCE (V)
0−10−8−4−6−2
−0.08
−0.12
−0.04
−0.16
−0.20
IC
(A)
0
−0.25
IB (mA) = −2.5
−0.5
−0.75
−1.0
−1.25
−1.5
−1.75
−2.0
−2.25
006aaa541
200
400
600
hFE
0
IC (mA)
−10−2−103
−102
−10−1−10−1
(1)
(2)
(3)
006aaa542
IC (mA)
−10−1−103
−102
−1−10
−0.5
−0.9
−1.3
−0.3
−0.7
−1.1
VBEsat
(V)
−0.1
(1)
(2)
(3)
006aaa543
−1
−10−1
−10
VCEsat
(V)
−10−2
IC (mA)
−10−1−103
−102
−1−10
(1)
(2)
(3)
PMP5201V_G_Y_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 28 August 2009 7 of 14
NXP Semiconductors PMP5201V; PMP5201G; PMP5201Y
PNP/PNP matched double transistors
VCE =−5 V; Tamb =25°CV
CE =−5 V; Tamb =25°C
Fig 5. Base-emitter voltage as a function of collector
current; typical values Fig 6. Transition frequency as a function of collector
current; typical values
f = 1 MHz; Tamb =25°C f = 1 MHz; Tamb =25°C
Fig 7. Collector capacitance as a function of
collector-base voltage; typical values Fig 8. Emitter capacitance as a function of
emitter-base voltage; typical values
006aaa544
−0.6
−0.8
−1
VBE
(V)
−0.4
IC (mA)
−10−1−103
−102
−1−10 IC (mA)
−1−102
−10
006aaa545
102
103
fT
(MHz)
10
VCB (V)
0−10−8−4−6−2
006aaa546
4
2
6
8
Cc
(pF)
0
006aaa547
VEB (V)
0−6−4−2
9
11
7
13
15
Ce
(pF)
5
PMP5201V_G_Y_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 28 August 2009 8 of 14
NXP Semiconductors PMP5201V; PMP5201G; PMP5201Y
PNP/PNP matched double transistors
8. Application information
9. Package outline
Fig 9. Current mirror Fig 10. Differential amplifier
006aaa524
VCC
lout
R1
TR2TR1
006aaa526
IN2IN1 TR2TR1
OUT2
V−
V+
OUT1
Fig 11. Package outline SOT666 Fig 12. Package outline SOT353 (SC-88A)
Fig 13. Package outline SOT363 (SC-88)
Dimensions in mm 04-11-08
1.7
1.5
1.7
1.5
1.3
1.1
1
0.18
0.08
0.27
0.17
0.5
pin 1 index
123
456
0.6
0.5
0.3
0.1
04-11-16Dimensions in mm
0.25
0.10
0.3
0.2
1.3
0.65
2.2
2.0 1.35
1.15
2.2
1.8 1.1
0.8
0.45
0.15
132
45
06-03-16Dimensions in mm
0.25
0.10
0.3
0.2
pin 1
index
1.3
0.65
2.2
2.0 1.35
1.15
2.2
1.8 1.1
0.8
0.45
0.15
132
465
PMP5201V_G_Y_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 28 August 2009 9 of 14
NXP Semiconductors PMP5201V; PMP5201G; PMP5201Y
PNP/PNP matched double transistors
10. Packing information
[1] For further information and the availability of packing methods, see Section 14.
[2] T1: normal taping
[3] T2: reverse taping
11. Soldering
Table 9. Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.
[1]
Type number Package Description Packing quantity
3000 4000 8000 10000
PMP5201V SOT666 2 mm pitch, 8 mm tape and reel - - -315 -
4 mm pitch, 8 mm tape and reel - -115 - -
PMP5201G SOT353 4 mm pitch, 8 mm tape and reel -115 - - -135
PMP5201Y SOT363 4 mm pitch, 8 mm tape and reel; T1 [2] -115 - - -135
4 mm pitch, 8 mm tape and reel; T2 [3] -125 - - -165
Reflow soldering is the only recommended soldering method.
Fig 14. Reflow soldering footprint SOT666
solder lands
placement area
occupied area
solder paste
sot666_fr
2.75
2.45
2.1
1.6
0.4
(6×)
0.55
(2×)
0.25
(2×)
0.6
(2×)
0.65
(2×)
0.3
(2×)
0.325
(4×)
0.45
(4×)
0.5
(4×)
0.375
(4×)
1.72
1.7
1.0750.538
Dimensions in mm
PMP5201V_G_Y_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 28 August 2009 10 of 14
NXP Semiconductors PMP5201V; PMP5201G; PMP5201Y
PNP/PNP matched double transistors
Dimensions in mm
Fig 15. Reflow soldering footprint SOT353 (SC-88A)
Dimensions in mm
Fig 16. Wave soldering footprint SOT353 (SC-88A)
msa366
1.20
2.40
0.50
(4×)
0.40 0.90 2.10
0.50
(4×)
0.60
(1×)
2.35
2.65
solder lands
solder resist
occupied area
solder paste
sot353_fw
1.3 1.3
4.5
1
1
4.9
1.5
1.5
2.5
2.25
0.85
0.85
1.225 1.225
solder lands
solder resist
occupied area
preferred transport
direction during soldering
Dimensions in mm
PMP5201V_G_Y_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 28 August 2009 11 of 14
NXP Semiconductors PMP5201V; PMP5201G; PMP5201Y
PNP/PNP matched double transistors
Fig 17. Reflow soldering footprint SOT363 (SC-88)
Fig 18. Wave soldering footprint SOT363 (SC-88)
solder lands
solder resist
occupied area
solder paste
sot363_fr
2.65
2.35 0.4 (2×)
0.6
(2×)
0.5
(4×)
0.5
(4×)
0.6
(4×)
0.6
(4×)
1.5
1.8
Dimensions in mm
sot363_fw
solder lands
solder resist
occupied area
preferred transport
direction during soldering
5.3
1.3 1.3
1.5
0.3
1.5
4.5
2.45
2.5
Dimensions in mm
PMP5201V_G_Y_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 28 August 2009 12 of 14
NXP Semiconductors PMP5201V; PMP5201G; PMP5201Y
PNP/PNP matched double transistors
12. Revision history
Table 10. Revision history
Document ID Release date Data sheet status Change notice Supersedes
PMP5201V_G_Y_3 20090828 Product data sheet - PMP5201V_G_Y_2
Modifications: •This data sheet was changed to reflect the new company name NXP Semiconductors,
including new legal definitions and disclaimers. No changes were made to the technical
content.
•Figure 14 “Reflow soldering footprint SOT666”: updated
•Figure 16 “Wave soldering footprint SOT353 (SC-88A)”: updated
•Figure 17 “Reflow soldering footprint SOT363 (SC-88)”: updated
•Figure 18 “Wave soldering footprint SOT363 (SC-88)”: updated
PMP5201V_G_Y_2 20060914 Product data sheet - PMP5201G_Y_1
PMP5201G_Y_1 20060214 Product data sheet - -
PMP5201V_G_Y_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 28 August 2009 13 of 14
NXP Semiconductors PMP5201V; PMP5201G; PMP5201Y
PNP/PNP matched double transistors
13. Legal information
13.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
13.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
13.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
13.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
14. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
NXP Semiconductors PMP5201V; PMP5201G; PMP5201Y
PNP/PNP matched double transistors
© NXP B.V. 2009. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 28 August 2009
Document identifier: PMP5201V_G_Y_3
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
15. Contents
1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 General description. . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.4 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
6 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4
7 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 4
8 Application information. . . . . . . . . . . . . . . . . . . 8
9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8
10 Packing information. . . . . . . . . . . . . . . . . . . . . . 9
11 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
12 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 12
13 Legal information. . . . . . . . . . . . . . . . . . . . . . . 13
13.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13
13.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
13.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 13
13.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 13
14 Contact information. . . . . . . . . . . . . . . . . . . . . 13
15 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
