© Semiconductor Components Industries, LLC, 2018
June, 2018 − Rev. 4 1Publication Order Number:
FQPF11N40C/D
FQP11N40C, FQPF11N40C
QFET) MOSFET, N-Channel
400 V, 10.5 A, 530 mW
Description
This N−Channel enhancement mode power MOSFET is produced
using ON Semiconductor proprietary planar stripe and DMOS
technology. This advanced MOSFET technology has been especially
tailored to reduce on−state resistance, and to provide superior
switching performance and high avalanche energy strength. These
devices are suitable for switched mode power supplies, active power
factor correction (PFC), and electronic lamp ballasts.
Features
10.5 A, 400 V, RDS(on) = 530 mW (Max.) @ VGS = 10 V, ID = 5.25 A
Low Gate Charge (Typ. 28 nC)
Low Crss (Typ. 85 pF)
100% Avalanche Tested
These Devices are Pb−Free and are RoHS Compliant
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G
S
D
See detailed ordering, marking and shipping information on
page 2 of this data sheet.
ORDERING INFORMATION
TO−220−3LD
CASE 340AT
GDS
TO−220F−3SG
CASE 221AT
GDS
FQP11N40C, FQPF11N40C
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2
ORDERING INFORMATION
Device Device Marking Package Shipping
FQP11N40C FQP11N40C TO−220
(Pb−Free) 1,000 Units / Tube
FQPF11N40C FQPF11N40C TO−220 Fullpack, TO−220F−3SG
(Pb−Free) 1,000 Units / Tube
MOSFET MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Symbol Parameter FQP11N40C FQPF11N40C Unit
VDSS Drain to Source Voltage 400 V
IDDrain Current −Continuous (TC = 25°C)
−Continuous (TC = 100°C) 10.5 10.5 * A
6.6 6.6 * A
IDM Drain Current − Pulsed (Note 1) 42 42 * A
VGSS Gate to Source Voltage ± 30 V
EAS Single Pulsed Avalanche Energy (Note 2) 360 mJ
IAR Avalanche Current (Note 1) 11 A
EAR Repetitive Avalanche Energy (Note 1) 13.5 mJ
dv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/ns
PDPower Dissipation (TC = 25°C)
− Derate above 25°C135 44 W
1.07 0.35 W/°C
TJ, TSTG Operating and Storage Temperature Range −55 to 150 °C
TLMaximum Lead Temperature for Soldering Purpose, 1/8” from Case for
5 Seconds 300 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be af fected.
*Drain current limited by maximum junction temperature
1. Repetitive Rating : Pulse width limited by maximum junction temperature.
2. L = 5.7 mH, IAS = 10.5 A, VDD = 50 V, RG = 25 W, starting TJ = 25°C.
3. ISD 10.5 A, di/dt 200 A/ms, VDD BVDSS, starting TJ = 25°C.
THERMAL CHARACTERISTICS
Symbol Parameter FQP11N40C FQPF11N40C Unit
RqJC Thermal Resistance, Junction to Case, Max 0.93 2.86 °C/W
RqJA Thermal Resistance, Junction to Ambient, Max 62.5 62.5 °C/W
FQP11N40C, FQPF11N40C
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3
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted)
Symbol Parameter Test Conditions Min Typ Max Unit
Off Characteristics
BVDSS Drain−Source Breakdown Voltage VGS = 0 V, ID = 250 mA400 V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature Coefficient ID = 250 mA, Referenced to 25°C0.54 V/°C
IDSS Zero Gate Voltage Drain Current VDS = 400 V, VGS = 0 V 1mA
VDS = 320 V, TC = 125°C10 mA
IGSSF Gate−Body Leakage Current, Forward VGS = 30 V, VDS = 0 V 100 nA
IGSSR Gate−Body Leakage Current, Reverse VGS = −30 V, VDS = 0 V −100 nA
On Characteristics
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 mA2.0 4.0 V
rDS(on) Static Drain−Source On−Resistance VGS = 10 V, ID = 5.25 A 0.43 0.53 W
gFS Forward Transconductance VDS = 40 V, ID = 5.25 A 7.1 s
Dynamic Characteristics
Ciss Input Capacitance VDS = 25 V, VGS = 0 V, f = 1 MHz 840 1090 pF
Coss Output Capacitance 250 325 pF
Crss Reverse Transfer Capacitance 85 110 pF
Switching Characteristics
td(on) Turn−On Delay Time VDD = 200 V, ID = 10.5 A, RG = 25 W
(Note 4)
14 40 ns
trTurn−On Rise Time 89 190 ns
td(off) Turn−Off Delay Time 81 170 ns
tfTurn−Off Fall Time 81 170 ns
QgTotal Gate Charge VDS = 320 V, ID = 10.5 A, RG = 25 W
(Note 4) 28 35 nC
Qgs Gate−Source Charge 4 nC
Qgd Gate−Drain Charge 15 nC
Drain−Source Diode Characteristics and Maximum Ratings
ISMaximum Continuous Drain−Source Diode
Forward Current 10.5 A
ISM Maximum Pulsed Drain−Source Diode
Forward Current 42 A
VSD Drain−Source Diode Forward Voltage VGS = 0 V, IS = 10.5 A 1.4 V
trr Reverse Recovery Time VGS = 0 V, IS = 10.5 A,
dIF/dt = 100 A/ms
290 ns
Qrr Reverse Recovery Charge 2.4 mC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Essentially independent of operating temperature.
FQP11N40C, FQPF11N40C
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4
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 1. On−Region Characteristics
100101
10−1
100
101
V
GS
Top : 15.0 V
10.0 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
Notes :
1. 250ms Pulse Test
2. TC = 25_C
ID, Drain Current [A]
VDS, Drain−Source Voltage [V]
Figure 2. Transfer Characteristics
150_C
25_C−55_C
Notes :
1. VDS = 40V
2. 250ms Pulse Test
ID, Drain Current [A]
VGS, Gate−Source Voltage [V]
Figure 3. On−Resistance Variation vs Drain Current
and Gate Voltage
0 5 10 15 20 25 30 35 40
0.5
1.0
1.5
2.0
VGS = 20 V
VGS = 10 V
Note : T
J = 25_C
RDS(ON) [],
Drain−Source On−Resistance
ID, Drain Current [A]
W
Figure 4. Body Diode Forward Voltage Variation vs.
Source Current and Temperature
0.2 0.4 0.6 0.8 1.0 1.2 1.4
10−1
100
101
150_C
Notes :
1. VGS = 0V
2. 250ms Pulse Test
25_C
IDR, Reverse Drain Current [A]
VSD, Source−Drain voltage [V]
Figure 5. Capacitance Characteristics
10−1 100101
0
200
400
600
800
1000
1200
1400
1600
1800
2000 Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
Notes ;
1. VGS = 0 V
2. f = 1 MHz
Crss
Coss
Ciss
Capacitance [pF]
VDS, Drain−Source Voltage [V ]
Figure 6. Gate Charge Characteristics
051015202530
0
2
4
6
8
10
12
VDS = 250 V
VDS = 100 V
VDS = 400 V
Note : ID
= 10.5 A
VGS, Gate−Source Voltage [V]
QG, Total Gate Charge [nC]
FQP11N40C, FQPF11N40C
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5
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 7. Breakdown Voltage Variation vs.
Temperature
−100 50 0 50 100 150 200
0.8
0.9
1.0
1.1
1.2
Notes :
1. VGS = 0 V
2. I
BVDSS, (Normalized)
Drain−Source Breakdown Voltage
TJ, Junction Temperature [_C]
D= 250 mA
Figure 8. On−Resistance Variation vs. Temperature
−100 50 0 50 100 150 200
0.0
0.5
1.0
1.5
2.0
2.5
3.0
Notes :
1. VGS = 10 V
2. ID = 5.25 A
RDS(ON) , (Normalized)
Drain−Source On−Resistance
TJ, Junction Temperature [_C]
Figure 9. Maximum Safe Operating Area of
FQP11N40C
100101102103
10−1
100
101
102
100 ms
DC
10 ms
1 ms
Operation in This Area
is Limited by RDS(on)
Notes :
1. TC = 25_C
2. TJ = 150_C
3. Single Pulse
ID, Drain Current [A]
VDS, Drain−Source Voltage [V]
10 ms
100 ms
Figure 10. Maximum Safe Operating Area of
FQPF11N40C
100101102103
10−1
100
101
102
100 ms
DC
10 ms
1 ms
Operation in This Area
is Limited by RDS(on)
Notes :
1. TC = 25
2. TJ = 15_C
3. Single Pulse
ID, Drain Current [A]
VDS, Drain−Source Voltage [V]
10 ms
100 ms
_C
Figure 11. Maximum Drain Current
25 50 75 100 125 150
0
2
4
6
8
10
12
ID, Drain Current [A]
TC, Case Tem perature [°C]
FQP11N40C, FQPF11N40C
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6
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 12. Transient Thermal Response Curve of FQP11N40C
10 −5 10 −4 10 −3 10 −2 10 −1 10 010 1
10 −2
10 −1
10 0
single pulse
D=0.5
0.02
0.2
0.05
0.1
0.01
ZJC(t), Thermal Response
t1, Square W ave Pulse Duration [sec]
t1
PDM
t2
ZqJC(t), Thermal Response [oC/W]
Notes:
1. ZqJC(t) = 0.93°C/W Max.
2. Duty Factor, D = t1/t2
3. TJM − TC = PDM * ZqJC(t)
Figure 13. Transient Thermal Response Curve of FQPF11N40C
10 −5 10 −4 10 −3 10 −2 10 −1 10 010 1
10 −2
10 −1
10 0
single pulse
D=0.5
0.02
0.2
0.05
0.1
0.01
ZJC
(t), Thermal Response
t1, Square W ave Pulse Duration [sec]
t1
PDM
t2
ZqJC(t), Thermal Response [oC/W]
Notes:
1. ZqJC(t) = 2.86°C/W Max.
2. Duty Factor, D = t1/t2
3. TJM − TC = PDM * ZqJC(t)
FQP11N40C, FQPF11N40C
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7
Figure 14. Gate Charge Test Circuit & Waveform
Charge
VGS
10V Qg
Qgs Qgd
3mA
VGS
DUT
VDS
300nF
50KΩ
200nF
12V
Same Type
as DUT
Charge
VGS
10V Qg
Qgs Qgd
3mA
VGS
DUT
VDS
300nF
50KΩ
200nF
12V
Same Type
as DUT
IG = const.
Figure 15. Resistive Switching Test Circuit & Waveforms
VGS
VDS
10%
90%
td(on) tr
ton toff
td(off) tf
VDD
10V
VDS RL
DUT
RG
VGS
VGS
VDS
10%
90%
td(on) tr
ton toff
td(off) tf
VDD
10V
VDS RL
DUT
RG
VGS
VGS
Figure 16. Unclamped Inductive Switching Test Circuit & Waveforms
EAS =LI
AS2
2
1BVDSS −VDD
BVDSS
VDD
VDS
BVDSS
tp
VDD
IAS
VDS (t)
ID(t)
Time
10V DUT
RG
L
ID
tp
EAS AS2
2
1
EAS =AS2
2
1
2
1BVDSS −VDD
BVDSS
VDD
VDS
BVDSS
tp
VDD
IAS
VDS (t)
ID(t)
Time
10V DUT
RG
LL
ID
ID
tp
VGS
V
FQP11N40C, FQPF11N40C
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Figure 17. Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
VDS
+
_
Driver
RGSame Type
as DUT
VGS Sdv/dtcontrolled by R G
SISD controlled by pulse period
VDD
L
ISD
10V
VGS
( Driver )
ISD
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recoverydv/dt
di/dt
D = Gate Pulse Width
Gate Pulse Period
−−−−−−−−−−−−−−−−−−−−−−−−−−
DUT
VDS
+
_
Driver
RGSame Type
as DUT
VGS Sdv/dtcontrolled by R G
SISD controlled by pulse period
VDD
LL
ISD
10V
VGS
( Driver )
ISD
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recoverydv/dt
di/dt
D = Gate Pulse Width
Gate Pulse Period
−−−−−−−−−−−−−−−−−−−−−−−−−−
D = Gate Pulse Width
Gate Pulse Period
−−−−−−−−−−−−−−−−−−−−−−−−−−
All other brand names and product names appearing in this document are registered trademarks or trademarks of their respective holders.
TO220 Fullpack, 3Lead / TO220F3SG
CASE 221AT
ISSUE A
DATE 12 NOV 2013
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
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© Semiconductor Components Industries, LLC, 2002
October, 2002 Rev. 0
Case Outline Number:
XXX
DOCUMENT NUMBER:
STATUS:
NEW STANDARD:
DESCRIPTION:
98AON67439E
ON SEMICONDUCTOR STANDARD
TO220 FULLPACK, 3LEAD / TO220F3SG
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accessed directly from the Document Repository. Printed
versions are uncontrolled except when stamped
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ISSUE REVISION DATE
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SEMICONDUCTOR. REQ. BY D. TRUHITTE.
29 FEB 2012
ACORRECTED PACKAGE NAME FROM TO220F3FG TO TO220F3SG. REQ. BY
T. SHIBUYA.
12 NOV 2013
© Semiconductor Components Industries, LLC, 2013
November, 2013 Rev. A
Case Outline Number:
221AT
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MECHANICAL CASE OUTLINE
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© Semiconductor Components Industries, LLC, 2002
October, 2002 − Rev. 0 Case Outline Number:
XXX
DOCUMENT NUMBER:
STATUS:
NEW STANDARD:
DESCRIPTION:
98AON13818G
ON SEMICONDUCTOR STANDARD
TO−220−3LD
Electronic versions are uncontrolled except when
accessed directly from the Document Repository. Printed
versions are uncontrolled except when stamped
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