ACS756 Fully Integrated, Hall Effect-Based Linear Current Sensor IC with 3 kVRMS Voltage Isolation and a Low-Resistance Current Conductor Features and Benefits Description Industry-leading noise performance through proprietary amplifier and filter design techniques Total output error 0.8% at TA = 25C Small package size, with easy mounting capability Monolithic Hall IC for high reliability Ultra-low power loss: 130 internal conductor resistance 3 kVRMS minimum isolation voltage from pins 1-3 to pins 4-5 3.0 to 5.0 V, single supply operation 3 s output rise time in response to step input current 20 or 40 mV/A output sensitivity Output voltage proportional to AC or DC currents Factory-trimmed for accuracy Extremely stable output offset voltage Nearly zero magnetic hysteresis The Allegro ACS756 family of current sensor ICs provides economical and precise solutions for AC or DC current sensing in industrial, automotive, commercial, and communications systems. The device package allows for easy implementation by the customer. Typical applications include motor control, load detection and management, power supplies, and overcurrent fault protection. The device consists of a precision, low-offset linear Hall circuit with a copper conduction path located near the die. Applied current flowing through this copper conduction path generates a magnetic field which the Hall IC converts into a proportional voltage. Device accuracy is optimized through the close proximity of the magnetic signal to the Hall transducer. A precise, proportional voltage is provided by the low-offset, chopper-stabilized BiCMOS Hall IC, which is programmed for accuracy at the factory. TUV America Certificate Number: U8V 09 05 54214 021 The output of the device has a positive slope (>VCC / 2) when an increasing current flows through the primary copper conduction path (from terminal 4 to terminal 5), which is the path used for current sampling. The internal resistance of this conductive path is 130 typical, providing low power loss. Package: 5 pin package (suffix PFF) The thickness of the copper conductor allows survival of the device at up to 5x overcurrent conditions. The terminals of the 1 Continued on the next page... Additional leadforms available for qualifying volumes Typical Application +5 V 4 VCC IP+ ACS756 IP GND 5 1 CBYP 0.1 F 2 CF IP- VIOUT 3 RF VOUT Application 1. The ACS756 outputs an analog signal, VOUT , that varies linearly with the uni- or bi-directional AC or DC primary sampled current, IP , within the range specified. CF is for optimal noise management, with values that depend on the application. ACS756-DS, Rev. 6 Fully Integrated, Hall Effect-Based Linear Current Sensor IC with 3 kVRMS Voltage Isolation and a Low-Resistance Current Conductor ACS756 Description (continued) conductive path are electrically isolated from the signal leads (pins 1 through 3). This allows the ACS756 family of sensor ICs to be used in applications requiring electrical isolation without the use of opto-isolators or other costly isolation techniques. The device is fully calibrated prior to shipment from the factory. The ACS75x family is lead (Pb) free. All leads are plated with 100% matte tin, and there is no Pb inside the package. The heavy gauge leadframe is made of oxygen-free copper. Selection Guide Part Number1 TOP (C) Primary Sampled Current , IP (A) ACS756SCA-050B-PFF-T -20 to 85 50 ACS756SCA-100B-PFF-T -20 to 85 100 ACS756KCA-050B-PFF-T -40 to 125 50 1Additional Packing2 34 per tube leadform options available for qualified volumes for additional packing options. 2Contact Allegro Absolute Maximum Ratings Characteristic Symbol Notes Rating Units Forward Supply Voltage VCC 8 V Reverse Supply Voltage VRCC -0.5 V Forward Output Voltage VIOUT 28 V Reverse Output Voltage VRIOUT -0.5 V Working Voltage for Reinforced Isolation VWORKING-R Voltage applied between pins 1-3 and 4-5; tested at 3000 VAC for 1 minute according to UL standard 60950-1 353 VDC / Vpk Working Voltage for Basic Isolation VWORKING-B Voltage applied between pins 1-3 and 4-5; tested at 3000 VAC for 1 minute according to UL standard 60950-1 500 VDC / Vpk Output Source Current IOUT(Source) VIOUT to GND 3 mA IOUT(Sink) VCC to VIOUT 1 mA Range K -40 to 125 C Range S -20 to 85 C TJ(max) 165 C Tstg -65 to 165 C Output Sink Current Nominal Operating Ambient Temperature Maximum Junction Storage Temperature TOP Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 2 Fully Integrated, Hall Effect-Based Linear Current Sensor IC with 3 kVRMS Voltage Isolation and a Low-Resistance Current Conductor ACS756 Functional Block Diagram +5 V VCC IP+ Filter Dynamic Offset Cancellation To all subcircuits Amp Gain Out Temperature Coefficient VIOUT 0.1 F Offset Trim Control GND IP- Pin-out Diagram IP+ IP- 4 5 3 VIOUT 2 GND 1 VCC Terminal List Table Number Name 1 VCC Device power supply terminal Description 2 GND Signal ground terminal 3 VIOUT 4 IP+ Terminal for current being sampled 5 IP- Terminal for current being sampled Analog output signal Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 3 ACS756 Fully Integrated, Hall Effect-Based Linear Current Sensor IC with 3 kVRMS Voltage Isolation and a Low-Resistance Current Conductor COMMON OPERATING CHARACTERISTICS1 over full range of TOP, and VCC = 5 V, unless otherwise specified Characteristic Supply Voltage2 Symbol Test Conditions Typ. Max. Units 3 5.0 5.5 V Supply Current ICC VCC = 5.0 V, output open - 10 14 mA Power On Time tPO TA = 25C - 35 - s IP = three-quarter scale of IP+, TA = 25C, COUT = 0.47 nF - 3 - s - 120 - kHz 4.7 - - k Rise Time Internal Bandwidth3 VCC Min. tr BWi -3 dB; IP is 10 A peak-to-peak; 100 pF from VIOUT to GND Output Load Resistance RLOAD(MIN) VIOUT to GND Output Load Capacitance CLOAD(MAX) VIOUT to GND - - 10 nF TA = 25C - 130 - Primary Conductor Resistance Symmetry Bidirectional 0 A Output Magnetic Offset Error RPRIMARY ESYM VOUT(QBI) IERROM Over half-scale of Ip 98.5 100 101.5 % IP = 0 A, TA = 25C - VCC/2 - V IP = 0 A, after excursion of 100 A - 0.23 - A Ratiometry VRAT VCC = 4.5 to 5.5 V - 100 - % Propagation Time tPROP TA = 25C, COUT = 100 pF, - 1 - s 1Device is factory-trimmed at 5 V, for optimal accuracy. are programmed for maximum accuracy at 5.0 V VCC levels. The device contains ratiometry circuits that accurately alter the 0 A Output Voltage and Sensitivity level of the device in proportion to the applied VCC level. However, as a result of minor nonlinearities in the ratiometry circuit additional output error will result when VCC varies from the 5 V VCC level. Customers that plan to operate the device from a 3.3 V regulated supply should contact their local Allegro sales representative regarding expected device accuracy levels under these bias conditions. 3Guaranteed by design. 2Devices Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 4 Fully Integrated, Hall Effect-Based Linear Current Sensor IC with 3 kVRMS Voltage Isolation and a Low-Resistance Current Conductor ACS756 X050 PERFORMANCE CHARACTERISTICS over Range K1: Characteristic Primary Sampled Current Sensitivity Noise2 Nonlinearity Electrical Offset Voltage3 Total Output Error4 Symbol TOP = -40C to 125C, VCC = 5 V, unless otherwise specified Test Conditions IP SensTA SensTOP Half scale of IP applied for 5 ms, TA = 25C Half scale of IP applied for 5 ms Min. Typ. Max. -50 - 50 Units A - 40 - mV/A 37.2 - 42.8 mV/A - 10 - mV % VNOISE TA= 25C, 10 nF on VIOUT pin to GND ELIN(HT) Up to full scale of IP , IP applied for 5 ms, TOP = 25C to 125C -1 - 1 ELIN(LT) Up to full scale of IP , IP applied for 5 ms, TOP = -40C to 25C - 1.8 - 1.8 % VOE(TA) IP = 0 A, TA = 25C - 2 - mV VOE(TOP)HT IP = 0 A, TOP = 25C to 125C -30 - 30 mV VOE(TOP)LT IP = 0 A, TOP = -40C to 25C -60 - 60 mV ETOT(HT) Over full scale of IP , IP applied for 5 ms, TOP = 25C to 125C -7.5 - 7.5 % ETOT(LT) Over full scale of IP , IP applied for 5 ms, TOP = -40C to 25C -7.5 - 7.5 % 1Device may be operated at higher primary current levels, IP, and ambient temperatures, TOP, provided that the Maximum Junction Temperature, TJ(max), is not exceeded. 26 noise voltage. 3V OE(TOP) drift is referred to ideal VOE = 2.5 V at 0 A. 4Percentage of I , with I = 25 A. Output filtered. P P X050 PERFORMANCE CHARACTERISTICS over Range S1: Characteristic Primary Sampled Current Sensitivity Noise2 Nonlinearity Electrical Offset Voltage3 Total Output Error4 Symbol TOP = -20C to 85C, VCC = 5 V, unless otherwise specified Test Conditions IP SensTA SensTOP Half scale of IP applied for 5 ms, TA = 25C Half scale of IP applied for 5 ms Min. Typ. Max. -50 - 50 Units A - 40 - mV/A 38.3 - 41.7 mV/A - 10 - mV VNOISE TA= 25C, 10 nF on VIOUT pin to GND ELIN(HT) Up to full scale of IP , IP applied for 5 ms, TOP = 25C to 85C -1 - 1 % ELIN(LT) Up to full scale of IP , IP applied for 5 ms, TOP = -20C to 25C -1 - 1 % VOE(TA) IP = 0 A, TA = 25C - 2 - mV VOE(TOP)HT IP = 0 A, TOP = 25C to 85C -30 - 30 mV VOE(TOP)LT IP = 0 A, TOP = -20C to 25C -30 - 30 mV ETOT(HT) Over full scale of IP , IP applied for 5 ms, TOP = 25C to 85C -5 - 5 % ETOT(LT) Over full scale of IP , IP applied for 5 ms, TOP = -20C to 25C -5 - 5 % 1Device may be operated at higher primary current levels, I , and ambient temperatures, T , provided that the Maximum Junction Temperature, P OP TJ(max), is not exceeded. 26 noise voltage. 3V OE(TOP) drift is referred to ideal VOE = 2.5 V at 0 A. 4Percentage of I , with I = 25 A. Output filtered. P P Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 5 Fully Integrated, Hall Effect-Based Linear Current Sensor IC with 3 kVRMS Voltage Isolation and a Low-Resistance Current Conductor ACS756 X100 PERFORMANCE CHARACTERISTICS over Range S1: Characteristic Primary Sampled Current Sensitivity Noise2 Nonlinearity Electrical Offset Voltage3 Total Output Error4 Symbol TOP = -20C to 85C, VCC = 5 V, unless otherwise specified Test Conditions IP SensTA SensTOP Half scale of IP applied for 5 ms, TA = 25C Half scale of IP applied for 5 ms Min. Typ. Max. -100 - 100 Units A - 20 - mV/A 18.2 - 21.8 mV/A - 6 - mV % VNOISE TA= 25C, 10 nF on VIOUT pin to GND ELIN(HT) Up to full scale of IP , IP applied for 5 ms, TOP = 25C to 85C - 1.75 - 1.75 ELIN(LT) Up to full scale of IP , IP applied for 5 ms, TOP = -20C to 25C -1 - 1 % VOE(TA) IP = 0 A, TA = 25C - 2 - mV VOE(TOP)HT IP = 0 A, TOP = 25C to 85C -30 - 30 mV VOE(TOP)LT IP = 0 A, TOP = -20C to 25C -30 - 30 mV ETOT(HT) Over full scale of IP , IP applied for 5 ms, TOP = 25C to 85C -8 - 8 % ETOT(LT) Over full scale of IP , IP applied for 5 ms, TOP = -20C to 25C -7 - 7 % 1Device may be operated at higher primary current levels, I , and ambient temperatures, T , provided that the Maximum Junction Temperature, P OP TJ(max), is not exceeded. 26 noise voltage. 3V OE(TOP) drift is referred to ideal VOE = 2.5 V at 0 A. 4Percentage of I , with I = 25 A. Output filtered. P P Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 6 ACS756 Fully Integrated, Hall Effect-Based Linear Current Sensor IC with 3 kVRMS Voltage Isolation and a Low-Resistance Current Conductor Definitions of Accuracy Characteristics Sensitivity (Sens). The change in device output in response to a 1 A change through the primary conductor. The sensitivity is the product of the magnetic circuit sensitivity (G / A) and the linear IC amplifier gain (mV/G). The linear IC amplifier gain is programmed at the factory to optimize the sensitivity (mV/A) for the half-scale current of the device. Noise (VNOISE). The noise floor is derived from the thermal and shot noise observed in Hall elements. Dividing the noise (mV) by the sensitivity (mV/A) provides the smallest current that the device is able to resolve. Nonlinearity (ELIN). The degree to which the voltage output from the IC varies in direct proportion to the primary current through its half-scale amplitude. Nonlinearity in the output can be attributed to the saturation of the flux concentrator approaching the half-scale current. The following equation is used to derive the linearity: { [ 100 1- gain x % sat ( VIOUT_half-scale amperes -VIOUT(Q) ) 2 (VIOUT_quarter-scale amperes - VIOUT(Q) ) [{ where gain = the gain variation as a function of temperature changes from 25C, % sat = the percentage of saturation of the flux concentrator, which becomes significant as the current being sampled approaches half-scale IP , and VIOUT_half-scale amperes = the output voltage (V) when the sampled current approximates half-scale IP . Symmetry (ESYM). The degree to which the absolute voltage output from the IC varies in proportion to either a positive or negative half-scale primary current. The following equation is used to derive symmetry: 100 VIOUT_+ half-scale amperes - VIOUT(Q) VIOUT(Q) - VIOUT_-half-scale amperes Ratiometry. The device features a ratiometric output. This means that the quiescent voltage output, VIOUTQ, and the magnetic sensitivity, Sens, are proportional to the supply voltage, VCC. The ratiometric change (%) in the quiescent voltage output is defined as: $VIOUTQ($V) = VIOUTQ(VCC) VIOUTQ(5V) VCC 5V s % and the ratiometric change (%) in sensitivity is defined as: $Sens($V = Sens(VCC VCC Sens(V s % 5V Quiescent output voltage (VIOUT(Q)). The output of the device when the primary current is zero. For a unipolar supply voltage, it nominally remains at VCC 2. Thus, VCC = 5 V translates into VIOUT(Q) = 2.5 V. Variation in VOUT(Q) can be attributed to the resolution of the Allegro linear IC quiescent voltage trim, magnetic hysteresis, and thermal drift. Electrical offset voltage (VOE). The deviation of the device output from its ideal quiescent value of VCC 2 due to nonmagnetic causes. Magnetic offset error (IERROM). The magnetic offset is due to the residual magnetism (remnant field) of the core material. The magnetic offset error is highest when the magnetic circuit has been saturated, usually when the device has been subjected to a full-scale or high-current overload condition. The magnetic offset is largely dependent on the material used as a flux concentrator. The larger magnetic offsets are observed at the lower operating temperatures. Total Output Error (ETOT). The maximum deviation of the actual output from its ideal value, also referred to as accuracy, illustrated graphically in the output voltage versus current chart on the following page. ETOT is divided into four areas: 0 A at 25C. Accuracy at the zero current flow at 25C, without the effects of temperature. 0 A over temperature. Accuracy at the zero current flow including temperature effects. Half-scale current at 25C. Accuracy at the the half-scale current at 25C, without the effects of temperature. Half-scale current over temperature. Accuracy at the halfscale current flow including temperature effects. Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 7 Fully Integrated, Hall Effect-Based Linear Current Sensor IC with 3 kVRMS Voltage Isolation and a Low-Resistance Current Conductor ACS756 Definitions of Dynamic Response Characteristics Power-On Time (tPO). When the supply is ramped to its operating voltage, the device requires a finite time to power its internal components before responding to an input magnetic field. Power-On Time, tPO , is defined as the time it takes for the output voltage to settle within 10% of its steady state value under an applied magnetic field, after the power supply has reached its minimum specified operating voltage, VCC(min), as shown in the chart at right. Rise time (tr). The time interval between a) when the device reaches 10% of its full scale value, and b) when it reaches 90% of its full scale value. The rise time to a step response is used to derive the bandwidth of the device, in which (-3 dB) = 0.35 / tr. Both tr and tRESPONSE are detrimentally affected by eddy current losses observed in the conductive IC ground plane. I (%) Primary Current 90 Output Voltage versus Sampled Current Total Output Error at 0 A and at Half-Scale Current Transducer Output 10 0 Rise Time, tr t Increasing VIOUT(V) Accuracy Over $Temp erature Accuracy 25C Only Propagation delay (tPROP). The time required for the device output to reflect a change in the primary current signal. Propagation delay is attributed to inductive loading within the linear IC package, as well as in the inductive loop formed by the primary conductor geometry. Propagation delay can be considered as a fixed time offset and may be compensated. Average VIOUT Accuracy Over $Temp erature Accuracy 25C Only IP(min) -IP (A) +IP (A) Half Scale I (%) IP(max) Primary Current 0A 90 Transducer Output 0 Propagation Time, tPROP t Accuracy 25C Only Accuracy Over $Temp erature Decreasing VIOUT(V) Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 8 ACS756 Fully Integrated, Hall Effect-Based Linear Current Sensor IC with 3 kVRMS Voltage Isolation and a Low-Resistance Current Conductor Chopper Stabilization Technique This technique is made possible through the use of a BiCMOS process that allows the use of low-offset and low-noise amplifiers in combination with high-density logic integration and sample and hold circuits. Regulator Clock/Logic Hall Element Amp Sample and Hold Chopper Stabilization is an innovative circuit technique that is used to minimize the offset voltage of a Hall element and an associated on-chip amplifier. Allegro patented a Chopper Stabilization technique that nearly eliminates Hall IC output drift induced by temperature or package stress effects. This offset reduction technique is based on a signal modulation-demodulation process. Modulation is used to separate the undesired DC offset signal from the magnetically induced signal in the frequency domain. Then, using a low-pass filter, the modulated DC offset is suppressed while the magnetically induced signal passes through the filter. As a result of this chopper stabilization approach, the output voltage from the Hall IC is desensitized to the effects of temperature and mechanical stress. This technique produces devices that have an extremely stable Electrical Offset Voltage, are immune to thermal stress, and have precise recoverability after temperature cycling. Low-Pass Filter Concept of Chopper Stabilization Technique Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 9 Fully Integrated, Hall Effect-Based Linear Current Sensor IC with 3 kVRMS Voltage Isolation and a Low-Resistance Current Conductor ACS756 Package CA, 5-pin package, leadform PFF 0.5 R1 R3 0.5 B 14.00.2 3.00.2 5 4 4 R2 1.500.10 4.00.2 21.4 3 12 A 3.50.2 0.8 17.50.2 1.5 13.000.10 1.91 B Branded Face 4.400.10 PCB Layout Reference View 2.90.2 NNNNNNN TTT - AAA 55 1 2 +0.060 0.381 -0.030 3 10.000.10 3.50.2 LLLLLLL YYWW 1 7.000.10 C Standard Branding Reference View N = Device part number T = Temperature code A = Amperage range L = Lot number Y = Last two digits of year of manufacture W = Week of manufacture = Supplier emblem 0.510.10 1.90.2 A Dambar removal intrusion B Perimeter through-holes recommended C Branding scale and appearance at supplier discretion For Reference Only; not for tooling use (reference DWG-9111, DWG-9110) Dimensions in millimeters Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 10 Fully Integrated, Hall Effect-Based Linear Current Sensor IC with 3 kVRMS Voltage Isolation and a Low-Resistance Current Conductor ACS756 Revision History Revision Revision Date Rev. 6 March 25, 2011 Description of Revision Augment VCC specification Copyright (c)2006-2011, Allegro MicroSystems, Inc. The products described herein are protected by U.S. patents: 6,781,359; and 7,265,531. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro's products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the failure of that life support device or system, or to affect the safety or effectiveness of that device or system. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use. For the latest version of this document, visit our website: www.allegromicro.com Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 11