TECHNICAL DATA SHEET
6 Lake Street, Lawrence, MA 01841 Gort Road Business Park, Ennis, Co. Clare, Ireland
1-800-446-1158 / (978) 620-2600 / Fax: ( 978) 689-0803 Tel: +353 (0) 65 6840044 Fax: +353 (0) 65 6822298
Website: http://www.microsemi.com
NPN LOW POWER SILICON TRANSISTOR
Qualified per MIL-PRF-19500/368
T4-LDS-0022 Rev. 3 (110088) Page 1 of 4
DEVICES LEVELS
2N3439 * 2N3440 JAN
2N3439L * 2N3440L JANTX
2N3439UA * 2N3440UA JANTXV
* Also Qualified for JANS level. * JANS
ABSOLUTE MAXIMUM RATI NG S (TC = +25°C unless otherwise noted)
Parameters / Test Conditions Symbol 2N3439 2N3440 Unit
Collector-Emitter Voltage VCEO 350 250 Vdc
Collector-Base Voltage VCBO 450 300 Vdc
Emitter-Base Voltage VEBO 7.0 Vdc
Collector Current IC 1.0 Adc
Total Power Dissipation
UA
@ TA = +25°C (1)
@ TC = +25°C (2)
@ TSP = +25°C (3)
PT
0.8
5.0
2.0
W
Operating & Storage Temperature Range Top , Tstg -65 to +200 °C
NOTES:
1) Derate linearly @ 4.57mW/°C for TA > +25°C
2) Derate linearly @ 28.5mW/°C for TC > +25°C
3) Derate linearly @ 14mW/°C for TSP > +25°C
ELECTRICAL CHARACTERISTICS (TA = +25°C, unless otherwise noted)
Parameters / Test Conditions
Symbol Min. Max. Unit
OFF CHARACTERTICS
Collector-Emitter Breakdown Voltage
V(BR)CEO
350
250
Vdc
IC = 10mAdc
RBB1 = 470Ω;VBB1 = 6V
L = 25mH (min); f = 30 – 60Hz
2N3439 / L / UA
2N3440 / L / UA
Collector-Emitter Cutoff Current
ICEO
2.0
2.0 µAdc
VCE = 300Vdc
VCE = 200Vdc 2N3439 / L / UA
2N3440 / L / UA
Emitter-Base Cutoff Current
VEB = 7.0Vdc IEBO 10 µAdc
Collector-Emitter Cutoff Current
ICEX
5.0
5.0
µAdc
VCE = 450Vdc, VBE = -1.5Vdc
VCE = 300Vdc, VBE = -1.5Vdc
2N3439 / L / UA
2N3440 / L / UA
Collector-Base Cutoff Current
ICBO
2.0
2.0
5.0
5.0
µAdc
VCB = 360Vdc
VCB = 250Vdc
VCB = 450Vdc
VCB = 300Vdc
2N3439 / L / UA
2N3440 / L / UA
2N3439 / L / UA
2N3440 / L / UA
TO-5
2N3439L, 2N3440L
TO-39 (TO-205AD)
2N3439, 2N3 440
UA
2N3439UA, 2N3440UA
TECHNICAL DATA SHEET
6 Lake Street, Lawrence, MA 01841 Gort Road Business Park, Ennis, Co. Clare, Ireland
1-800-446-1158 / (978) 620-2600 / Fax: ( 978) 689-0803 Tel: +353 (0) 65 6840044 Fax: +353 (0) 65 6822298
Website: http://www.microsemi.com
T4-LDS-0022 Rev. 3 (110088) Page 2 of 4
ELECTRICAL CHARACTERISTICS (TA = +25°C, unless otherwise noted) (CONT.)
Parameters / Test Conditions Symbol Min. Max. Unit
ON CHARACTERISTICS (3)
Forward-Current Transfer Ratio
IC = 20mAdc, VCE = 10Vdc
IC = 2.0mAdc, VCE = 10Vdc
IC = 0.2mAdc, VCE = 10Vdc
hFE
40
30
10
160
Collector-Emitter Saturation Voltage
IC = 50mAdc, IB = 4.0mAdc VCE(sat) 0.5 Vdc
Base-Emitter Saturation Voltage
IC = 50mAdc, IB = 4.0mAdc VBE(sat) 1.3 Vdc
DYNAMIC CHARACTERISTICS
Parameters / Test Conditions Symbol Min. Max. Unit
Magnitude of Common Emitter Small-Signal Short-Circuit
Forward Current Transfer Ratio
IC = 10mAdc, VCE = 10Vdc, f = 5.0MHz |hfe| 3.0 15
Forward Current Transfer Ratio
IC = 5.0mAdc, VCE = 10V, f = 1.0kHz hfe 25
Output Capacitance
VCB = 10Vdc, IE = 0, 100kHz f 1.0MHz Cobo 10 pF
Input Capacitance
VCB = 5.0Vdc, IE = 0, 100kHz f 1.0MHz Cibo 75 pF
SWITCHING CHARACTERISTICS
Parameters / Test Conditions Symbol Min. Max. Unit
Turn-On Time
VCC = 200Vdc; IC = 20mAdc, IB1 = 2.0mAdc ton
1.0 µs
Turn-Off Time
VCC = 200Vdc; IC = 20mAdc, IB1 = -IB2 = 2.0mAdc toff
10 µs
SAFE OPERATING AREA
DC Tests
TC = +25°C, 1 Cycle, t = 1.0s
Test 1
VCE = 5.0Vdc, IC = 1.0Adc Both Types
Test 2
VCE = 350Vdc, IC = 14mAdc 2N3439 / L / UA
Test 3
VCE = 250Vdc, IC = 20mAdc 2N3440 / L / UA
(3) Pulse Test: Pulse Width = 300µs, Duty Cycle 2.0%
TECHNICAL DATA SHEET
6 Lake Street, Lawrence, MA 01841 Gort Road Business Park, Ennis, Co. Clare, Ireland
1-800-446-1158 / (978) 620-2600 / Fax: ( 978) 689-0803 Tel: +353 (0) 65 6840044 Fax: +353 (0) 65 6822298
Website: http://www.microsemi.com
T4-LDS-0022 Rev. 3 (110088) Page 3 of 4
PACKAGE DIMENSIONS
NOTES:
1. Dimensions are in inches.
2. Millimeters are given for general information only.
3. Beyond r (radius) maximum, TW shall be held for a minimum length of .011 (0.28 mm).
4. Dimension TL measured from maximum HD.
5. Body contour optional within zone defined by HD, CD, and Q.
6. CD shall not vary more than .010 inch (0.25 mm) in zone P. This zone is controlled for automatic handling.
7. Leads at gauge plane .054 +.001 -.000 inch (1.37 +0.03 -0.00 mm) below seating plane shall be within .007 inch (0.18
mm) radius of true position (TP) at maximum material condition (MMC) relative to tab at MMC. The device may be
measured by direct methods or by gauging procedure.
8. Dimension LU applies between L1 and L2. Dimension LD applies between L2 and LL minimum. Diameter is
uncontrolled in and beyond LL minimum.
9. All three leads.
10. The collector shall be internally connected to the case.
11. Dimension r (radius) applies to both inside corners of tab.
12. In accordance with ASME Y14.5M, diameters are equivalent to Φx symbology.
13. Lead 1 = emitter, lead 2 = base, lead 3 = collector.
14. For transistor types 2N3439L and 2N3440L (T0-5), dimension LL = 1.5 inches (38.10 mm) min. and 1.75 inches (44.45
mm) max. For transistor types 2N3439 and 2N3440 (T0-39), dimension LL = .5 inch (12.70 mm) min. and .750 inch
(19.05 mm) max.
FIGURE 1. Physical dimensions (similar to TO-5 and TO-39).
Dimensions
Symbol Inches Millimeters Note
Min Max Min Max
CD .305 .335 7.75 8.51 6
CH .240 .260 6.10 6.60
HD .335 .370 8.51 9.40
LC .200 TP 5.08 TP 7
LD .016 .019 0.41 0.48 8,9
LL See note 14
LU .016 .019 0.41 0.48 8,9
L1 .050 1.27 8,9
L2 .250 6.35 8,9
P .100 2.54 7
Q .030 0.76 5
TL .029 .045 0.74 1.14 3,4
TW .028 .034 0.71 0.86 3
r .010 0.25 10
α 45° TP 45° TP 7
TECHNICAL DATA SHEET
6 Lake Street, Lawrence, MA 01841 Gort Road Business Park, Ennis, Co. Clare, Ireland
1-800-446-1158 / (978) 620-2600 / Fax: ( 978) 689-0803 Tel: +353 (0) 65 6840044 Fax: +353 (0) 65 6822298
Website: http://www.microsemi.com
T4-LDS-0022 Rev. 3 (110088) Page 4 of 4
PACKAGE DIMENSIONS
NOTES:
1. Dimensions are in inches.
2. Millimeters are given for general information only.
3. Dimension "CH" controls the overall package thickness.
When a window lid is used, dimension "CH" must increase
by a minimum of .010 inch (0.254 mm) and a maximum of
.040 inch (1.020 mm).
4. The corner shape (square, notch, radius, etc.) may vary at the
manufacturer's option, from that shown on the drawing.
5. Dimensions " LW2" minimum and "L3" minimum and the
appropriate castellation length define an unobstructed three-
dimensional space traversing all of the ceramic layers in
which a castellation was designed. (Castellations are
required on bottom two layers, optional on top ceramic
layer.) Dimension " LW2" maximum and "L3" maximum
define the maximum width and depth of the castellation at
any point on its surface. Measurement of these dimensions
may be made prior to solder dipping.
6. The coplanarity deviation of all terminal contact points, as defined by the device seating plane, shall not exceed .006 inch
(0.15mm) for solder dipped leadless chip carriers.
7. In accordance with ASME Y14.5M, diameters are equivalent to φx symbology.
FIGURE 2. Physical dimensions, surface mount (2N3439UA, 2N3440UA) version.
Dimensions
Symbol Inches Millimeters Note
Min Max Min Max
BL .215 .225 5.46 5.71
BL2 .225 5.71
BW .145 .155 3.68 3.93
BW2 .155 3.93
CH .061 .075 1.55 1.90 3
L3 .003 .007 0.08 0.18 5
LH .029 .042 0.74 1.07
LL1 .032 .048 0.81 1.22
LL2 .072 .088 1.83 2.23
LS .045 .055 1.14 1.39
LW .022 .028 0.56 0.71
LW2 .006 .022 0.15 0.56 5
Pin no. 1 2 3 4
Transistor Collector Emitter Base N/C