NCP5425DEMO1/D NCP5425 Demonstration Board Note Single Input to Single Output Two-Phase Buck Regulator 5.0 V to 0.8 V/30 A http://onsemi.com DEMONSTRATION NOTE All of these features are provided on a 4.0 by 4.0 two-layer circuit board with an actual circuit area of 2.5 by 2.3. The NCP5425 demonstration board contains all the circuitry required for a two-phase Buck regulator. The IC provides undervoltage lockout, soft start, built-in adaptive FET non-overlap, a mode to interrupt switching to provide low noise, and cycle-by-cycle overcurrent protection. Features * Dual Synchronous Buck Topology * Programmable Input Current Ratio between Phases * Cycle-by-Cycle Overcurrent Protection * Undervoltage Lockout * Low Noise Disable Mode allows Separate Input Power Rationing * Out-of-Phase Synchronization between Channels Figure 1. Semiconductor Components Industries, LLC, 2004 January, 2004 - Rev. 0 1 Publication Order Number: NCP5425DEMO1/D NCP5425DEMO1/D Figure 2. NCP5425 Demo Board MAXIMUM RATINGS Pin Name VMAX VMIN ISOURCE ISINK 5.0 VIN 6.3 V -0.3 V N/A N/A 5.0 V RTN 0.3 V -0.3 V N/A N/A VOUT 2.0 V -0.3 V 40 A N/A VOUT RTN 0.3 V -0.3 V N/A 40 A TERMINAL DESCRIPTION Terminal Name 5.0 V 5.0 V RTN VOUT VOUT RTN LNDM Description Input Power Source 5.0 V Input Power Source Return 0.8 V/30 A Output 0.8 V Output Return Low Noise Disable Mode http://onsemi.com 2 C3 0 523 R5 R3 R19 Open D3 C4 C19 10 F/ 16 V SWN1 R6 Open R26 n/a C30 Q3 NTD60N02R C1 C12 n/a R4 10 K C23 0.1 F R20 11 K 1800 F/6.3 V (2X) L2 1.0 H/ 1m 1500 F/16 V (2X) C2 C26 C29 Open R22 7.5 K IS-1 IS+1 GATE L1 GATE H1 C27 n/a C10 1.0 F 10 COMP1 9 Vfb1 8 7 2 1 C8 0.22 F Q4 NTD110N02RT4 5V U1 NCP5425 10 F/16 V VOUT RTN 0.22 F VREF2 COMP2 Vfb2 Rosc IS+2 IS-2 GATE L2 17 12 11 13 14 15 D4 1 2 C28 Normally Shorted JP1 R12 30.1 K C32 n/a Q1 NTD60N02R D1 BAV99LT1 Q2 19 NTD110N02RT4 0 20 R23 C16 C11 1.0 F GATE H2 0.8 V @ 30 A 16 C5 n/a MBRM120ET3 R11 0 MODE n/a C13 0.047 F D2 MMBF2201NT1 Q5 R27 n/a C31 n/a SWN2 C22 10 F/ 16 V MBRM120ET3 5 Vin GND 3 18 Vcc 4 BST NC 5 NC 6 3 10 F/16 V http://onsemi.com 10 F/16 V Figure 3. NCP5425 Single Output Demonstration Board 10 F/16 V R16 10 K C9 523 R15 R8 C6 C14 0.1 F C20 n/a 0.8 V Return 0.8 V Sense R1 10 K LN Disable Mode (0 V) L1 1.0 H/1 m 1500 F/16 V (2X) C18 n/a 1800 F/6.3 V (2X) C7 C17 R17 11 K Open Vin RTN NCP5425DEMO1/D NCP5425DEMO1/D OPERATION GUIDELINES * To power the demo board, an adjustable high current * * * * DC power supply is required. To fully examine the capabilities of this board, select a 5.0 V supply capable of 10 A continuous output current. The VIN and LGND terminals are located on the top of the board. The positive and negative terminals of the 5.0 V power supply should be connected to 5.0 VIN and 5.0 RTN respectively. The demo board will start up once the voltage applied to the VIN pin reaches 4.2 V. The VOUT 0.8 V and VOUT RTN terminals are located on the bottom of the board. If using mechanical pressure connectors, keep in mind that the 0.8 V output can source up to 30 A. The demo board will go into cycle-to-cycle overcurrent protection when the current reaches approximately 42 A at room temperature and * approximately 40 A when at maximum operating temperature. To set different current limits levels, the values of R3 and R15 must be changed. Please refer to the data sheet for details. The NCP5425 has a Low Noise Disable Mode. This feature allows the user to temporarily disable both output drivers (<100 A) thereby reducing radiated and conducted EMI in noise-sensitive applications. To evaluate this feature, Jp1 must be removed, and 3.3 V applied to the L.N. Mode pin to restore normal operation. With those modifications, the user may disable the clock by bringing the L.N. Mode pin to 0 V. This disables both gate drivers, leaving the switch node floating, and discharges the internal ramp. If this feature is not required, leave Jp1 in place. DESIGN GUIDELINES Please see the NCP5425 data sheet for guidelines on using and designing with the NCP5425. http://onsemi.com 4 NCP5425DEMO1/D ELECTRICAL CHARACTERISTICS (0C Tambient 50C, 4.5 V Vin 5.5 V, fSW = 300 kHz, unless otherwise specified.) Characteristic Test Condition Min Typ Max Unit Output Voltage 0.5 A < I(VOUT) < 30 A Line Regulation 5.0 V 4.5 V VIN (5.0 V) 5.5 V 0.788 0.8 0.812 V - 0.05 - - Load Regulation 0.5 A < I(VOUT1) < 30 A - 0.16 - % Ripple and Noise 0.5 A < I(VOUT1) < 10 A, 20 MHz Scope Bandwidth - 25 - mV(p-p) VOUT Transient Regulation 25 A Load Step, 20 MHz Scope Bandwidth - 60 - mV 30 A Load Step, 20 MHz Scope Bandwidth. Measure the time when output exceeds DC limit. - 15 - s I(VOUT) = 15 A, see graph on page 8 for efficiency overload current. - 86 - % - 39 42 44 A Start Threshold - 3.8 4.2 4.6 V Stop Threshold - 3.6 4.0 4.4 V Load = 25 A - 80 - % Free Running 224 300 376 kHz Transient Recovery Time Efficiency Over-Current Threshold VIN GENERAL Efficiency Switching Frequency http://onsemi.com 5 NCP5425DEMO1/D TYPICAL OPERATING CHARACTERISTICS Figure 4. Normal Operation with No Load Figure 5. Normal Operation with 30 A Load Figure 6. GATEL1-GATEH1 Transition Showing Rise, Fall and Non-Overlap Times with No Load Figure 7. GATEL1-GATEH1 Transition Showing Rise, Fall and Non-Overlap with 30 A Load Figure 8. GATEH1-GATEL1 Transition Showing Rise, Fall and Non-Overlap Times with No Load Figure 9. GATEH1-GATEL1 Transition Showing Rise, Fall and Non-Overlap Times with 30 A Load http://onsemi.com 6 NCP5425DEMO1/D TYPICAL OPERATING CHARACTERISTICS Figure 10. GATEL2-GATEH2 Transition Showing Rise, Fall and Non-Overlap Times with No Load Figure 11. GATEL2-GATEH2 Transition Showing Rise, Fall and Non-Overlap Times with 30 A Load Figure 12. GATEH2-GATEL2 Transition Showing Rise, Fall and Non-Overlap Times with No Load Figure 13. GATEH2-GATEL2 Transition Showing Rise, Fall and Non-Overlap Times with 30 A Load Figure 14. Dynamic Load Step from 0 to 25 A, Showing IOUT and VOUT Figure 15. Turn-on of Dynamic Load Step from 0 to 25 A http://onsemi.com 7 NCP5425DEMO1/D Efficiency NCP5425 Single In to Single Output 90 Efficiency (%) 85 80 75 70 65 60 0.00 5.00 10.00 15.00 20.00 25.00 30.00 Load Currents (A) Figure 16. Turn-off of Dynamic Load Step from 25 to 0 A Figure 17. Graph Shows the Efficiency of the Total Application Current Sharing Ch. 1 Load Ch. 2 Ch. 1 0 Phase Current(A) 20 Ch. 2 35 A Top FET 27 27 81 85 C Bottom FET 28 28 74 78 C Inductor 27 27 55 55 C Input Cap. 26 26 52 52 C Output Cap. 26 27 43 43 C IC 34 N/A 65 N/A C 15 10 5 0 -5 0 10 20 30 40 Load(A) Ph1(A) Ph2(A) Figure 18. Component Temperatures Measured in Still Air, and Ambient Temperature at 23C Figure 19. Master (Ph1) and Slave (Ph2) Phase Current Over Output Load Figure 20. The NCP5425 in Low Noise Disable Mode for 100 s. Showing SWN1, SWN2, VOUT ripple and disable signal (both Controllers are disabled). Figure 21. Startup showing VOUT, Comp1 and 2. VOUT and Comp2 start to rise when Comp1 reaches approximately 0.3 V (internal offset). http://onsemi.com 8 NCP5425DEMO1/D Top Layer Bottom Layer Silk Layer Figure 22. PCB Layout http://onsemi.com 9 NCP5425DEMO1/D Table 1. Bill of Material Part Type Designator Footprint Description MFG Part Number Manufacturer 0.01 F/25 V (Not Used) C30,31 805 Ceramic Capacitor VJ0805Y103KXXAT00 Vishay 0.047 F C13 805 Ceramic Capacitor VJ0805Y473KXXAT00 Vishay 0.1 F C14,23 805 Ceramic Capacitor VJ0805Y104KXXAT00 Vishay 0.22 F C16 1206 Ceramic Capacitor VJ1206Y224KXXAT00 Vishay 0.22 F C8 805 Ceramic Capacitor VJ0805Y224KXXAT00 Vishay 1.0 F C10,11 805 Ceramic Capacitor C2012X5RIC105 TDK 10 F/16 V C19,22,26,28 1206 Ceramic Capacitor C3225X7R1C106MT TDK 10 F/16 V (Not Used) C,27,32 1206 Ceramic Capacitor C3225X7R1C106MT TDK 1800 F/6.3 V (2X) (Both Outputs) C3,4,7,9 TH-F Through Hole Cap 6.3MBZ1800M (10X16) Rubycon 1800 F/6.3 V (Not Used) C12,20 TH-F Through Hole Cap 6.3MBZ1800M (10X16) Rubycon 1500 F/16 V (2X) 12 V (Both Inputs) C1,2,6,17 TH-F Through Hole Cap 16MBZ1500M (10X20) Rubycon 1500 F/16 V (Not Used) C5,18 TH-F Through Hole Cap 16MBZ1500M (10X20) Rubycon Open (Not Used) C29 805 Ceramic Capacitor - Vishay 0 R5,11,23 805 Resistor CRCW080500R0 Vishay 10 (Not Used) R26,27 805 Resistor CRCW080510R0F Vishay 523 R3,15 805 Resistor CRCW0805523RF Vishay 7.5 K R22 805 Resistor CRCW08057K50F Vishay 10 K R1,4,16 805 Resistor CRCW080510K0F Vishay 11 K R17,20 805 Resistor CRCW080511K0F Vishay 20 K (Not Used) R6 805 Resistor CRCW080520K0F Vishay 30.1 K R12 805 Resistor CRCW080530K1F Vishay Open (Not Used) R8,19 805 Resistor - Vishay 1.0 H/1.0 m L1 & 2 Inductor SER-1590 SER1590-102MX Coilcraft BAV99LT1 D1 SOT-23 Dual Diode BAV99LT1 ON Semiconductor MMBZ5240BLT1 (Not Used) D4 SOT-23 Zener Diode MMBZ5240BLT1 ON Semiconductor MBRM120ET3 D2,3 PowerMite Schottky Diode MBRM120ET3 ON Semiconductor NCP5425 U1 TSSOP-20 Dual Synchronous PWM NCP5425 ON Semiconductor NTD60N02R Q1,Q3 D-Pak N Ch MOSFET NTD60N02R ON Semiconductor NTD110N02R Q2,Q4 D-Pak N Ch MOSFET NTD110N02R ON Semiconductor MMBF2201NT1 Q5 SOT-323 N Ch MOSFET MMBF2201NT1 ON Semiconductor http://onsemi.com 10 NCP5425DEMO1/D Notes http://onsemi.com 11 NCP5425DEMO1/D ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). 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