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LM10
SNOSBH4E MAY 1998REVISED OCTOBER 2015
LM10 Operational Amplifier and Voltage Reference
The circuit is recommended for portable equipment
1 Features and is completely specified for operation from a
1 Input Offset Voltage: 2 mV (Maximum) single power cell. In contrast, high output-drive
Input Offset Current: 0.7 nA (Maximum) capability, both voltage and current, along with
thermal overload protection, suggest it in demanding
Input Bias Current: 20 nA (Maximum) general-purpose applications.
Reference Regulation: 0.1% (Maximum) The device is capable of operating in a floating mode,
Offset Voltage Drift: 2 μV/°C independent of fixed supplies. It can function as a
Reference Drift: 0.002%/°C remote comparator, signal conditioner, SCR controller
or transmitter for analog signals, delivering the
2 Applications processed signal on the same line used to supply
power. It is also suited for operation in a wide range
Remote Amplifiers of voltage and current regulator applications, from low
Battery-Level Indicators voltages to several hundred volts, providing greater
Thermocouple Transmitters precision than existing ICs.
Voltage and Current regulators This series is available in the three standard
temperature ranges, with the commercial part having
3 Description relaxed limits. In addition, a low-voltage specification
The LM10 series are monolithic linear ICs consisting (suffix L) is available in the limited temperature
of a precision reference, an adjustable reference ranges at a cost savings.
buffer and an independent, high-quality operational
amplifier. Device Information(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
The unit can operate from a total supply voltage as
low as 1.1 V or as high as 40 V, drawing only 270 μA. SOIC (14) 8.992 mm × 7.498 mm
A complementary output stage swings within 15 mV LM10 SDIP (8) 8.255 mm × 8.255 mm
of the supply terminals or will deliver ±20-mA output PDIP (8) 9.81 mm × 6.35 mm
current with ±0.4-V saturation. Reference output can (1) For all available packages, see the orderable addendum at
be as low as 200 mV. the end of the data sheet.
Operational Amplifier Schematic
(Pin numbers are for 8-pin packages)
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LM10
SNOSBH4E MAY 1998REVISED OCTOBER 2015
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Table of Contents
7.4 Device Functional Modes........................................ 17
1 Features.................................................................. 18 Application and Implementation ........................ 18
2 Applications ........................................................... 18.1 Application Information............................................ 18
3 Description............................................................. 18.2 Typical Application ................................................. 18
4 Revision History..................................................... 28.3 System Examples ................................................... 19
5 Pin Configuration and Functions......................... 39 Power Supply Recommendations...................... 27
6 Specifications......................................................... 410 Layout................................................................... 27
6.1 Absolute Maximum Ratings ...................................... 410.1 Layout Guidelines ................................................. 27
6.2 Recommended Operating Conditions....................... 410.2 Layout Example .................................................... 27
6.3 Thermal Information.................................................. 411 Device and Documentation Support................. 28
6.4 Electrical Characteristics LM10/LM10B .................... 511.1 Device Support .................................................... 28
6.5 Electrical Characteristics, LM10C............................. 611.2 Documentation Support ........................................ 28
6.6 Electrical Characteristics, LM10BL ........................... 811.3 Community Resources.......................................... 28
6.7 Electrical Characteristics, LM10CL........................... 911.4 Trademarks........................................................... 29
6.8 Typical Characteristics............................................ 11 11.5 Electrostatic Discharge Caution............................ 29
7 Detailed Description............................................ 17 11.6 Glossary................................................................ 29
7.1 Overview................................................................. 17 12 Mechanical, Packaging, and Orderable
7.2 Functional Block Diagram....................................... 17 Information ........................................................... 29
7.3 Feature Description................................................. 17
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision D (March 2013) to Revision E Page
Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional
Modes,Application and Implementation section, Power Supply Recommendations section, Layout section, Device
and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1
Changes from Revision C (March 2013) to Revision D Page
Changed layout of National Data Sheet to TI format ........................................................................................................... 26
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5 Pin Configuration and Functions
NEV Package P Package
8-Pin SDIP 8-Pin PDIP
Top View Top View
Pin Functions 8-Pin SDIP or PDIP
PIN I/O DESCRIPTION
NAME NO.
Balance 5 I Used for offset nulling
Op Amp Input (+) 3 I Noninverting input of operational amplifier
Op Amp Input (–) 2 I Inverting input of operational amplifier
Op Amp Output 6 O Output terminal of operational amplifier
Reference Feedback 8 I Feedback terminal of reference
Reference Output 1 O Output terminal of reference
V+ 7 I Positive supply voltage
V– 4 I Negative supply voltage
NPA Package
14-Pin SOIC
Top View
Pin Functions 14-Pin SOIC
PIN I/O DESCRIPTION
NAME NO.
Balance 9 I Used for offset nulling
NC 1, 2, 7, 8, 14, 13 No connection
Op Amp Input (–) 4 I Inverting input of operational amplifier
Op Amp Input (+) 5 I Noninverting input of operational amplifier
Op Amp Output 10 O Output terminal of operational amplifier
Reference Feedback 12 I Feedback terminal of reference
Reference Output 3 O Output terminal of reference
V+ 11 I Positive supply voltage
V– 6 I Negative supply voltage
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6 Specifications
6.1 Absolute Maximum Ratings
See (1)(2)(3)
MIN MAX UNIT
LM10/LM10B/LM10C 45 V
Total supply voltage LM10BL/LM10CL 7 V
LM10/LM10B/LM10C ±40 V
Differential input voltage(4) LM10BL/LM10CL ±7 V
Power dissipation(5) Internally limited
Output short-circuit duration(6) Continuous
TO Soldering (10 seconds) 300 °C
Soldering (10 seconds) 260 °C
Lead temperature DIP Vapor phase (60 seconds) 215 °C
Infrared (15 seconds) 220 °C
LM10 150 °C
Maximum junction LM10B 100 °C
temperature LM10C 85 °C
Storage temperature, Tstg 55 150 °C
(1) Refer to RETS10X for LM10H military specifications.
(2) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(3) If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.
(4) The Input voltage can exceed the supply voltages provided that the voltage from the input to any other terminal does not exceed the
maximum differential input voltage and excess dissipation is accounted for when VIN < V.
(5) The maximum, operating-junction temperature is 150°C for the LM10, 100°C for the LM10B(L) and 85°C for the LM10C(L). At elevated
temperatures, devices must be derated based on package thermal resistance.
(6) Internal thermal limiting prevents excessive heating that could result in sudden failure, but the IC can be subjected to accelerated stress
with a shorted output and worst-case conditions.
6.2 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT
VSSupply input voltage range (V–) (V+) 1.2 40 V
VCM Common-mode voltage (V–) (V+) 0.85 V
VREF Reference voltage 0.2 V
IREF Reference current 0 1 mA
6.3 Thermal Information LM10
THERMAL METRIC(1) NEV (SDIP) NPA (SOIC) P (PDIP) UNIT
8 PINS 14 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 150 90 87 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 45 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
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6.4 Electrical Characteristics LM10/LM10B
TJ=25°C unless otherwise specified(1)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
TJ=25°C 0.3 2 mV
Input offset voltage TMIN TJTMAX (see (1)) 3 mV
TJ=25°C 0.25 0.7 nA
Input offset current(2) TMIN TJTMAX (see (1)) 1.5 nA
TJ=25°C 10 20 nA
Input bias current TMIN TJTMAX (see (1)) 30 nA
TJ=25°C 250 500 kΩ
Input resistance TMIN TJTMAX (see (1)) 150 kΩ
VS= ±20 V, IOUT = 0 120 400 V/mV
VOUT = ±19.95 V, TMIN TJTMAX (see (1)) 80 V/mV
VS= ±20 V, VOUT = ±19.4 V 50 130 V/mV
IOUT = ±20 mA, TMIN TJTMAX (see (1)) 20 V/mV
Large signal voltage IOUT = ±15 mA, TMIN TJTMAX (see (1)) 20 V/mV
gain VS= ±0.6 V, IOUT = ±2 mA 1.5 3 V/mV
VS= ±0.65 V, IOUT = ±2 mA, TMIN TJTMAX (see (1)) 1.5 3 V/mV
VOUT = ±0.4 V, TMIN TJTMAX (see (1)) 0.5 V/mV
VOUT = ±0.3 V, VCM =0.4 V, TMIN TJTMAX (see (1)) 0.5 V/mV
1.2 V VOUT 40 V, RL= 1.1 kΩ14 33 V/mV
1.3 V VOUT 40 V, RL= 1.1 kΩ, TMIN TJTMAX (see (1)) 14 33 V/mV
Shunt gain(3) 0.1 mA IOUT 5 mA, TMIN TJTMAX (see (1)) 6 V/mV
1.5 V V+40 V, RL= 250 Ω8 25 V/mV
0.1 mA IOUT 20 mA, TMIN TJTMAX (see (1)) 4 V/mV
20 V VCM 19.15 V 93 102 dB
Common-mode 20 V VCM 19 V, TMIN TJTMAX (see (1)) 93 102 dB
rejection VS= ±20 V, TMIN TJTMAX (see (1)) 87 dB
0.2 V V 39 V 90 96 dB
V+= 1 V, TMIN TJTMAX (see (1)) 84 dB
V+= 1.1 V, TMIN TJTMAX (see (1)) 84 dB
Supply-voltage
rejection 1 V V+39.8 V 96 106 dB
1.1 V V+39.8 V, TMIN TJTMAX (see (1)) 96 106 dB
V=0.2 V, TMIN TJTMAX (see (1)) 90 dB
Offset voltage drift 2 μV/°C
Offset current drift 2 pA/°C
Bias current drift TC< 100°C 60 pA/°C
1.2 V VS40 V 0.001 0.003 %/V
Line regulation 1.3 V VS40 V, TMIN TJTMAX (see (1)) 0.001 0.003 %/V
0IREF 1 mA, VREF = 200 mV, TMIN TJTMAX (see (1)) 0.006 %/V
0IREF 1 mA 0.01% 0.1%
Load regulation V+VREF 1 V, TMIN TJTMAX (see (1)) 0.15%
V+VREF 1.1 V, TMIN TJTMAX (see (1)) 0.15%
(1) These specifications apply for VVCM V+0.85 V, 1 V (TMIN TJTMAX), 1.2 V, 1.3 V (TMIN TJTMAX) < VSVMAX, VREF = 0.2 V
and 0 IREF 1 mA, unless otherwise specified: VMAX = 40 V for the standard part and 6.5 V for the low voltage part. The full-
temperature-range operation is 55°C to 125°C for the LM10, 25°C to 85°C for the LM10B(L) and 0°C to 70°C for the LM10C(L). The
specifications do not include the effects of thermal gradients (τ120 ms), die heating (τ20.2 s) or package heating. Gradient effects
are small and tend to offset the electrical error (see curves).
(2) For TJ> 90°C, IOS may exceed 1.5 nA for VCM = V. With TJ= 125°C and VVCM V+ 0.1 V, IOS 5 nA.
(3) This defines operation in floating applications such as the bootstrapped regulator or two-wire transmitter. Output is connected to the V+
terminal of the IC and input common mode is referred to V(see System Examples). Effect of larger output-voltage swings with higher
load resistance can be accounted for by adding the positive-supply rejection error.
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Electrical Characteristics LM10/LM10B (continued)
TJ=25°C unless otherwise specified(1)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
TJ=25°C 50 75 V/mV
Amplifier gain 0.2 V VREF 35 V TMIN TJTMAX (see (1)) 23 V/mV
TJ=25°C 195 200 205 mV
Feedback sense
voltage TMIN TJTMAX (see (1)) 194 206 mV
TJ=25°C 20 50 nA
Feedback current TMIN TJTMAX (see (1)) 65 nA
Reference drift 0.002 %/°C
TJ=25°C 270 400 μA
Supply current TMIN TJTMAX (see (1)) 500 μA
TJ=25°C 15
1.2 V VS40 V μA
TMIN TJTMAX (see (1)) 75
Supply current change TJ=25°C 15
1.3 V VS40 V μA
TMIN TJTMAX (see (1)) 75
6.5 Electrical Characteristics, LM10C
TJ=25°C unless otherwise specified(1)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
TJ=25°C 0.5 4 mV
Input offset voltage TMIN TJTMAX (see (1)) 5 mV
TJ=25°C 0.4 2 nA
Input offset current(2) TMIN TJTMAX (see (1)) 3 nA
TJ=25°C 12 30 nA
Input bias current TMIN TJTMAX (see (1)) 40 nA
TJ=25°C 150 400 kΩ
Input resistance TMIN TJTMAX (see (1)) 115 kΩ
VS= ±20 V, IOUT = 0 80 400 V/mV
VOUT = ±19.95 V, TMIN TJTMAX (see (1)) 50 V/mV
VS= ±20 V, VOUT = ±19.4 V 25 130 V/mV
IOUT = ±20 mA, TMIN TJTMAX (see (1)) 15 V/mV
Large signal voltage gain IOUT = ±15 mA, TMIN TJTMAX (see (1)) 15 V/mV
VS= ±0.6 V, IOUT = ±2 mA 1 3 V/mV
VS= 0.65 V, IOUT = ±2 mA, TMIN TJTMAX (see (1)) 1 3 V/mV
VOUT = ±0.4 V, TMIN TJTMAX (see (1)) 0.75 V/mV
VOUT = ±0.3 V, VCM =0.4 V, TMIN TJTMAX (see (1)) 0.75 V/mV
1.2 V VOUT 40 V, RL= 1.1 kΩ10 33 V/mV
1.3 V VOUT 40 V, RL= 1.1 kΩ, TMIN TJTMAX (see (1)) 10 33 V/mV
Shunt gain(3) 0.1 mA IOUT 5 mA, TMIN TJTMAX (see (1)) 6 V/mV
1.5 V V+40 V, RL= 250 Ω6 25 V/mV
0.1 mA IOUT 20 mA, TMIN TJTMAX (see (1)) 4 V/mV
(1) These specifications apply for VVCM V+0.85 V, 1 V (TMIN TJTMAX), 1.2 V, 1.3 V (TMIN TJTMAX) < VSVMAX, VREF = 0.2 V
and 0 IREF 1 mA, unless otherwise specified: VMAX = 40 V for the standard part and 6.5 V for the low voltage part. The full-
temperature-range operation is 55°C to 125°C for the LM10, 25°C to 85°C for the LM10B(L) and 0°C to 70°C for the LM10C(L). The
specifications do not include the effects of thermal gradients (τ120 ms), die heating (τ20.2 s) or package heating. Gradient effects
are small and tend to offset the electrical error (see curves).
(2) For TJ> 90°C, IOS may exceed 1.5 nA for VCM = V. With TJ= 125°C and VVCM V+ 0.1 V, IOS 5 nA.
(3) This defines operation in floating applications such as the bootstrapped regulator or two-wire transmitter. Output is connected to the V+
terminal of the IC and input common mode is referred to V(see System Examples). Effect of larger output-voltage swings with higher
load resistance can be accounted for by adding the positive-supply rejection error.
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Electrical Characteristics, LM10C (continued)
TJ=25°C unless otherwise specified(1)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
20 V VCM 19.15 V 90 102 dB
Common-mode rejection 20 V VCM 19 V 90 102 dB
VS= ±20 V, TMIN TJTMAX (see (1)) 87 dB
0.2 V V 39 V 87 96 dB
V+= 1 V, TMIN TJTMAX (see (1)) 84 dB
V+= 1.1 V, TMIN TJTMAX (see (1)) 84 dB
Supply-voltage rejection 1 V V+39.8 V 93 106 dB
1.1 V V+39.8 V, TMIN TJTMAX (see (1)) 93 106 dB
V=0.2 V, TMIN TJTMAX (see (1)) 90 dB
Offset voltage drift 5 μV/°C
Offset current drift 5 pA/°C
Bias current drift TC< 100°C 90 pA/°C
1.2 V VS40 V 0.001 0.008 %/V
Line regulation 1.3 V VS40 V, TMIN TJTMAX (see (1)) 0.001 0.008 %/V
0IREF 1 mA, VREF = 200 mV, TMIN TJTMAX (see (1)) 0.01 %/V
0IREF 1 mA 0.01% 0.15%
Load regulation V+VREF 1 V, TMIN TJTMAX (see (1)) 0.2%
V+VREF1.1 V, TMIN TJTMAX (see (1)) 0.2%
TJ=25°C 25 70 V/mV
Amplifier gain 0.2 V VREF 35 V TMIN TJTMAX (see (1)) 15 V/mV
TJ=25°C 190 200 210 mV
Feedback sense voltage TMIN TJTMAX (see (1)) 189 211 mV
TJ=25°C 22 75 nA
Feedback current TMIN TJTMAX (see (1)) 90 nA
Reference drift 0.003 %/°C
TJ=25°C 300 500 μA
Supply current TMIN TJTMAX (see (1)) 570 μA
TJ=25°C 15
1.2 V VS40 V μA
TMIN TJTMAX (see (1)) 75
Supply current change TJ=25°C 15
1.3 V VS40 V μA
TMIN TJTMAX (see (1)) 75
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6.6 Electrical Characteristics, LM10BL
TJ=25°C unless otherwise specified.(1)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
TJ=25°C 0.3 2 mV
Input offset voltage TMIN TJTMAX (see (1)) 3 mV
TJ=25°C 0.1 0.7 nA
Input offset current(2) TMIN TJTMAX (see (1)) 1.5 nA
TJ=25°C 10 20 nA
Input bias current TMIN TJTMAX (see (1)) 30 nA
TJ=25°C 250 500 kΩ
Input resistance TMIN TJTMAX (see (1)) 150 kΩ
VS= ±3.25 V, IOUT = 0 60 300 V/mV
VOUT = ±3.2 V, TMIN TJTMAX (see (1)) 40 V/mV
VS= ±3.25 V, IOUT = 10 mA 10 25 V/mV
VOUT = ±2.75 V, TMIN TJTMAX (see (1)) 4 V/mV
Large signal voltage gain VS= ±0.6 V, IOUT = ±2 mA 1.5 3 V/mV
VS= 0.65 V, IOUT = ±2 mA, TMIN TJTMAX (see (1)) 1.5 3 V/mV
VOUT = ±0.4 V, VCM =0.4 V, TMIN TJTMAX (see (1)) 0.5 V/mV
VOUT = ±0.3 V, VCM =0.4 V, TMIN TJTMAX (see (1)) 0.5 V/mV
1.5 V V+6.5 V, RL= 500 Ω8 30 V/mV
Shunt gain(3) 0.1 mA IOUT 10 mA, TMIN TJTMAX (see (1)) 4 V/mV
3.25 V VCM 2.4 V 89 102 dB
Common-mode rejection 3.25 V VCM 2.25 V, TMIN TJTMAX (see (1))
VS= ±3.25 V, TMIN TJTMAX (see (1)) 83 dB
0.2 V V 5.4 V 86 96 dB
V+= 1 V, TMIN TJTMAX (see (1)) 80 dB
V+= 1.2 V, TMIN TJTMAX (see (1)) 80 dB
Supply-voltage rejection 1 V V+6.3 V 94 106 dB
1.1 V V+6.3 V, TMIN TJTMAX (see (1)) 94 106 dB
V=0.2 V, TMIN TJTMAX (see (1)) 88 dB
Offset voltage drift 2 μV/°C
Offset current drift 2 pA/°C
Bias current drift 60 pA/°C
1.2 V VS6.5 V 0.001 0.01 %/V
Line regulation 1.3 V VS6.5 V, TMIN TJTMAX (see (1)) 0.001 0.01 %/V
0IREF 0.5 mA, VREF = 200 mV, TMIN TJTMAX (see (1)) 0.02 %/V
0IREF 0.5 mA 0.01% 0.1%
Load regulation V+VREF 1 V, TMIN TJTMAX (see (1)) 0.15%
V+VREF 1.1 V, TMIN TJTMAX (see (1)) 0.15%
TJ=25°C 30 70 V/mV
Amplifier gain 0.2 V VREF 5.5 V TMIN TJTMAX (see (1)) 20 V/mV
TJ=25°C 195 200 205 mV
Feedback sense voltage TMIN TJTMAX (see (1)) 194 206 mV
(1) These specifications apply for VVCM V+0.85 V, 1 V (TMIN TJTMAX), 1.2 V, 1.3 V (TMIN TJTMAX) < VSVMAX, VREF = 0.2 V
and 0 IREF 1 mA, unless otherwise specified: VMAX = 40 V for the standard part and 6.5 V for the low voltage part. The full-
temperature-range operation is 55°C to 125°C for the LM10, 25°C to 85°C for the LM10B(L) and 0°C to 70°C for the LM10C(L). The
specifications do not include the effects of thermal gradients (τ120 ms), die heating (τ20.2 s) or package heating. Gradient effects
are small and tend to offset the electrical error (see curves).
(2) For TJ> 90°C, IOS may exceed 1.5 nA for VCM = V. With TJ=125°C and VVCM V+ 0.1 V, IOS 5 nA.
(3) This defines operation in floating applications such as the bootstrapped regulator or two-wire transmitter. Output is connected to the V+
terminal of the IC and input common mode is referred to V(see System Examples). Effect of larger output-voltage swings with higher
load resistance can be accounted for by adding the positive-supply rejection error.
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Electrical Characteristics, LM10BL (continued)
TJ=25°C unless otherwise specified.(1)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
TJ=25°C 20 50 nA
Feedback current TMIN TJTMAX (see (1)) 65 nA
Reference drift 0.002 %/°C
TJ=25°C 260 400 μA
Supply current TMIN TJTMAX (see (1)) 500 μA
6.7 Electrical Characteristics, LM10CL
TJ=25°C unless otherwise specified.(1)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
TJ=25°C 0.5 4 mV
Input offset voltage TMIN TJTMAX (see (1)) 5 mV
TJ=25°C 0.2 2 nA
Input offset current(2) TMIN TJTMAX (see (1)) 3 nA
TJ=25°C 12 30 nA
Input bias current TMIN TJTMAX (see (1)) 40 nA
TJ=25°C 150 400 kΩ
Input resistance TMIN TJTMAX (see (1)) 115 kΩ
VS= ±3.25 V, IOUT = 0 40 300 V/mV
VOUT = ±3.2 V, TMIN TJTMAX (see (1)) 25 V/mV
VS= ±3.25 V, IOUT = 10 mA 5 25 V/mV
VOUT = ±2.75 V, TMIN TJTMAX (see (1)) 3 V/mV
Large signal voltage gain VS= ±0.6 V, IOUT = ±2 mA 1 3 V/mV
VS= 0.65 V, IOUT = ±2 mA, TMIN TJTMAX (see (1)) 1 3 V/mV
VOUT = ±0.4 V, VCM =0.4 V, TMIN TJTMAX (see (1)) 0.75 V/mV
VOUT = ±0.3 V, VCM =0.4 V, TMIN TJTMAX (see (1)) 0.75 V/mV
1.5 V V+6.5 V, RL= 500 Ω6 30 V/mV
Shunt gain(3) 0.1 mA IOUT 10 mA, TMIN TJTMAX (see (1)) 4 V/mV
3.25 V VCM 2.4 V 80 102 dB
Common-mode rejection 3.25 V VCM 2.25 V, TMIN TJTMAX (see (1)) 80 102 dB
VS= ±3.25 V, TMIN TJTMAX (see (1)) 74 dB
0.2 V V 5.4 V 80 96 dB
V+= 1 V, TMIN TJTMAX (see (1)) 74 dB
V+= 1.2 V, TMIN TJTMAX (see (1)) 74 dB
Supply-voltage rejection 1VV+6.3 V 80 106 dB
1.1 V V+6.3 V, TMIN TJTMAX (see (1)) 80 106 dB
V= 0.2 V, TMIN TJTMAX (see (1)) 74 dB
Offset voltage drift 5 μV/°C
Offset current drift 5 pA/°C
Bias current drift 90 pA/°C
(1) These specifications apply for VVCM V+0.85 V, 1 V (TMIN TJTMAX), 1.2 V, 1.3 V (TMIN TJTMAX) < VSVMAX, VREF = 0.2 V
and 0 IREF 1 mA, unless otherwise specified: VMAX = 40 V for the standard part and 6.5 V for the low voltage part. The full-
temperature-range operation is 55°C to 125°C for the LM10, 25°C to 85°C for the LM10B(L) and 0°C to 70°C for the LM10C(L). The
specifications do not include the effects of thermal gradients (τ120 ms), die heating (τ20.2 s) or package heating. Gradient effects
are small and tend to offset the electrical error (see curves).
(2) For TJ> 90°C, IOS may exceed 1.5 nA for VCM = V. With TJ= 125°C and VVCM V+ 0.1 V, IOS 5 nA.
(3) This defines operation in floating applications such as the bootstrapped regulator or two-wire transmitter. Output is connected to the V+
terminal of the IC and input common mode is referred to V(see System Examples). Effect of larger output-voltage swings with higher
load resistance can be accounted for by adding the positive-supply rejection error.
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Electrical Characteristics, LM10CL (continued)
TJ=25°C unless otherwise specified.(1)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
1.2 V VS6.5 V 0.001 0.02 %/V
Line regulation 1.3 V VS6.5 V, TMIN TJTMAX (see (1)) 0.001 0.02 %/V
0IREF 0.5 mA, VREF = 200 mV, TMIN TJTMAX (see (1)) 0.03 %/V
0IREF 0.5 mA 0.01% 0.15%
Load regulation V+VREF 1 V, TMIN TJTMAX (see (1)) 0.2%
V+VREF 1.1 V, TMIN TJTMAX (see (1)) 0.2%
TJ=25°C 20 70 V/mV
Amplifier gain 0.2 V VREF 5.5 V TMIN TJTMAX (see (1)) 15 V/mV
TJ=25°C 190 200 210 mV
Feedback sense voltage TMIN TJTMAX (see (1)) 189 211 mV
TJ=25°C 22 75 nA
Feedback current TMIN TJTMAX (see (1)) 90 nA
Reference drift 0.003 %/°C
TJ=25°C 280 500 μA
Supply current TMIN TJTMAX (see (1)) 570 μA
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6.8 Typical Characteristics
6.8.1 Typical Characteristics (Op Amp)
Figure 2. Common-Mode Limits
Figure 1. Input Current
Figure 3. Output Voltage Drift Figure 4. Input Noise Voltage
Figure 6. Transconductance
Figure 5. DC Voltage Gain
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Typical Characteristics (Op Amp) (continued)
Figure 8. Output Saturation Characteristics
Figure 7. Output Saturation Characteristics
Figure 10. Minimum Supply Voltage
Figure 9. Output Saturation Characteristics
Figure 11. Minimum Supply Voltage Figure 12. Minimum Supply Voltage
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