IRFR2905ZPbF
IRFU2905ZPbF
HEXFET® Power MOSFET
VDSS = 55V
RDS(on) = 14.5m
ID = 42A
09/16/10
www.irf.com 1
This HEXFET® Power MOSFET utilizes the latest
processing techniques to achieve extremely low
on-resistance per silicon area. Additional features
of this design are a 175°C junction operating
temperature, fast switching speed and improved
repetitive avalanche rating. These features
combine to make this design an extremely efficient
and reliable device for use in a wide variety of
applications.
S
D
G
Description
l
Advanced Process Technology
l
Ultra Low On-Resistance
l
175°C Operating Temperature
l
Fast Switching
l
Repetitive Avalanche Allowed up to Tjmax
Features
D-Pak
IRFR2905ZPbF
I-Pak
IRFU2905ZPbF
HEXFET® is a registered trademark of International Rectifier.
Absolute Maximum Ratings
Parameter Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited)
ID @ TC = 10C Continuous Drain Current, VGS @ 10V A
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Package Limited)
IDM
P
u
l
se
d D
ra
i
n
C
urrent
c
PD @TC = 25°C Power Dissipation W
Linear Derating Factor W/°C
VGS Gate-to-Source Voltage V
EAS (Thermally limited)
Si
n
gl
e
P
u
l
se
A
va
l
anc
h
e
E
ner
gy
d
mJ
EAS (Tested )
Si
n
gl
e
P
u
l
se
A
va
l
anc
h
e
E
ner
gy T
este
d V
a
l
ue
h
IAR
A
va
l
anc
h
e
C
urrent
c
A
EAR
R
epet
i
t
i
ve
A
va
l
anc
h
e
E
ner
gy
g
mJ
TJ Operating Junction and
TSTG Storage Temperature Range °C
Soldering Temperature, for 10 seconds
Mounting Torque, 6-32 or M3 screw
Thermal Resistance
Parameter Typ. Max. Units
RθJC
J
unct
i
on-to-
C
ase
j
––– 1.38
RθJA
unct
on-to-
m
ent
mount
ij
––– 40 °C/W
RθJA
J
unct
i
on-to-
A
m
bi
ent
j
––– 110
82
55
See Fig.12a, 12b, 15, 16
110
0.72
± 20
Max.
59
42
240
42
-55 to + 175
300 (1.6mm from case )
10 lbf
y
in (1.1N
y
m)
l
Lead-Free
PD - 95943B
IRFR/U2905ZPbF
2www.irf.com
S
D
G
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units
V(BR)DSS Drain-to-Source Breakdown Voltage 55 ––– ––– V
V(BR)DSS
/
TJ Breakdown Voltage Temp. Coefficient ––– 0.053 ––– V/°C
RDS(on) Static Drain-to-Source On-Resistance –– 11.1 14.5 m
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V
gfs Forward Transconductance 20 ––– ––– S
IDSS Drain-to-Source Leakage Current ––– –– 20 µA
––– –– 250
IGSS Gate-to-Source Forward Leakage ––– ––– 200 nA
Gate-to-Source Reverse Leakage ––– –– -200
QgTotal Gate Charge ––– 29 44
Qgs Gate-to-Source Charge ––– 7.7 ––– nC
Qgd Gate-to-Drain ("Miller") Charge ––– 12 ––
RGGate Input Resistance ––– 1.3 ––– f = 1MHz, open drain
td(on) Turn-On Delay Time ––– 14 ––
trRise Time ––– 66 ––
td(off) Turn-Off Delay Time ––– 31 –– ns
tfFall Time ––– 35 ––
LDInternal Drain Inductance ––– 4.5 ––– Between lead,
nH 6mm (0.25in.)
LSInternal Source Inductance ––– 7.5 ––– from package
and center of die contact
Ciss Input Capacitance ––– 1380 ––
Coss Output Capacitance ––– 240 –––
Crss Reverse Transfer Capacitance ––– 120 ––– pF
Coss Output Capacitance ––– 820 –––
Coss Output Capacitance ––– 190 –––
Coss eff. Effective Output Capacitance ––– 300 ––
Source-Drain Ratin
g
s and Characteristics
Parameter Min. Typ. Max. Units
ISContinuous Source Current ––– ––– 36
(Body Diode) A
ISM Pulsed Source Current ––– ––– 240
(Body Diode)
c
VSD Diode Forward Voltage ––– ––– 1.3 V
trr Reverse Recovery Time ––– 23 35 ns
Qrr Reverse Recovery Charge ––– 16 24 nC
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
VGS = 0V, VDS = 44V, ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 44V
f
VGS = 10V
e
VDD = 28V
ID = 36A
RG = 15
TJ = 25°C, IS = 36A, VGS = 0V
e
TJ = 25°C, IF = 36A, VDD = 28V
di/dt = 100A/µs
e
Conditions
VGS = 0V, ID = 25A
Reference to 25°C, ID = 1mA
VGS = 10V, ID = 36A
e
VDS = VGS, ID = 250µA
VDS = 55V, VGS = 0V
VDS = 55V, VGS = 0V, TJ = 12C
MOSFET symbol
showing the
integral reverse
p-n junction diode.
VDS = 25V, ID = 36A
ID = 36A
VDS = 44V
Conditions
VGS = 10V
e
VGS = 0V
VDS = 25V
ƒ = 1.0MHz
VGS = 20V
VGS = -20V
IRFR/U2905ZPbF
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Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics Fig 4. Typical Forward Transconductance
Vs. Drain Current
0.1 110 100
VDS, Drain-to-Source Voltage (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
60µs PULSE WIDTH
Tj = 25°C
4.5V
VGS
TOP 15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
0 1 10 100
0.1 110 100
VDS, Drain-to-Source Voltage (V)
1
10
100
1000
ID, Drain-to-Source Current (A)
60µs PULSE WIDTH
Tj = 175°C
4.5V
VGS
TOP 15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
4.0 5.0 6.0 7.0 8.0 9.0 10.0
VGS, Gate-to-Source Voltage (V)
1.0
10.0
100.0
1000.0
ID, Drain-to-Source Current (Α)
VDS = 25V
60µs PULSE WIDTH
TJ = 25°C
TJ = 175°C
0 1020304050
ID, Drain-to-Source Current (A)
0
10
20
30
40
50
Gfs, Forward Transconductance (S)
TJ = 25°C
TJ = 175°C
VDS = 15V
380µs PULSE WIDTH
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Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
110 100
VDS, Drain-to-Source Voltage (V)
0
400
800
1200
1600
2000
2400
C, Capacitance (pF)
Coss
Crss
Ciss
VGS = 0V, f = 1 MHZ
Ciss = Cgs + Cgd, C ds SHORTED
Crss = Cgd
Coss = Cds + Cgd
0 1020304050
QG Total Gate Charge (nC)
0
4
8
12
16
20
VGS, Gate-to-Source Voltage (V)
VDS= 44V
VDS= 28V
VDS= 11V
ID= 36A
FOR TEST CIRCUIT
SEE FIGURE 13
0.2 0.6 1.0 1.4 1.8 2.2
VSD, Source-toDrain Voltage (V)
0.1
1.0
10.0
100.0
1000.0
ISD, Reverse Drain Current (A)
TJ = 25°C
TJ = 175°C
VGS = 0V
1 10 100 1000
VDS , Drain-toSource Voltage (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
Tc = 25°C
Tj = 175°C
Single Pulse
1msec
10msec
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100µsec
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Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current Vs.
Case Temperature
Fig 10. Normalized On-Resistance
Vs. Temperature
25 50 75 100 125 150 175
TC , Case Temperature (°C)
0
10
20
30
40
50
60
70
ID , Drain Current (A)
LIMITED BY PACKAGE
-60 -40 -20 020 40 60 80 100 120 140 160 180
TJ , Junction Temperature (°C)
0.5
1.0
1.5
2.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID = 36A
VGS = 10V
1E-006 1E-005 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)
0.001
0.01
0.1
1
10
Thermal Response ( Z thJC )
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE ) Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
Ri (°C/W) τi (sec)
0.3962 0.00012
0.5693 0.00045
0.4129 0.0015
τJ
τJ
τ1
τ1
τ2
τ2τ3
τ3
R1
R1R2
R2R3
R3
τ
τC
Ci i/Ri
Ci= τi/Ri
IRFR/U2905ZPbF
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Q
G
Q
GS
Q
GD
V
G
Charge
D.U.T. V
DS
I
D
I
G
3mA
V
GS
.3µF
50K
.2µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
10 V
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Fig 12a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
Fig 14. Threshold Voltage Vs. Temperature
R
G
I
AS
0.01
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
A
15V
20V
VGS
25 50 75 100 125 150 175
Starting TJ, Junction Temperature (°C)
0
40
80
120
160
200
240
EAS, Single Pulse Avalanche Energy (mJ)
I D
TOP 36A
8.6A
BOTTOM 4.8A
-75 -50 -25 025 50 75 100 125 150 175
TJ , Temperature ( °C )
2.0
2.5
3.0
3.5
4.0
4.5
VGS(th) Gate threshold Voltage (V)
ID = 250µA
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Fig 15. Typical Avalanche Current Vs.Pulsewidth
Fig 16. Maximum Avalanche Energy
Vs. Temperature
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
0.1
1
10
100
1000
Avalanche Current (A)
0.05
Duty Cycle = Single Pulse
0.10
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming Tj = 25°C due to
avalanche losses. Note: In no
case should Tj be allowed to
exceed Tjmax
0.01
25 50 75 100 125 150 175
Starting TJ , Junction Temperature (°C)
0
10
20
30
40
50
60
EAR , Avalanche Energy (mJ)
TOP Single Pulse
BOTTOM 1% Duty Cycle
ID = 36A
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Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
Circuit Layout Considerations
Low Stray Inductance
Ground Plane
Low Leakage Inductance
Current Transformer
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple 5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
VGS=10V
VDD
ISD
Driver Gate Drive
D.U.T. ISD Waveform
D.U.T. VDS Waveform
Inductor Curent
D = P. W .
Period
* VGS = 5V for Logic Level Devices
*
+
-
+
+
+
-
-
-
RGVDD
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
D.U.T
VDS
90%
10%
VGS
t
d(on)
t
r
t
d(off)
t
f
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
RG
D.U.T.
10V
+
-
VDD
Fig 18a. Switching Time Test Circuit
Fig 18b. Switching Time Waveforms
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D-Pak (TO-252AA) Part Marking Information
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
INTERNATIONAL
ASS EMBLED ON WW 16, 2001
IN THE ASSEMBLY LINE "A"
OR
Note: "P" in assembly line position
EXAMPLE:
LOT CODE 1234
THIS IS AN IRFR120
WI T H AS S E MB L Y
i ndicates "L ead- F ree"
PRODUCT (OPTIONAL)
P = DES IGNATE S LEAD-FREE
A = AS S E MB L Y S I T E COD E
PART NUMBER
WE E K 16
DAT E CODE
YEAR 1 = 2001
RECTIF IER
INTERNAT IONAL
LOGO
LOT CODE
AS S E MB L Y
3412
IRFR120
116A
LINE A
34
RECTIF IER
LOGO
IRFR120
12
ASSEMBLY
LOT CODE
YEAR 1 = 2001
DAT E CODE
PART NUMBER
WE E K 16
"P" in assembly line position indicates
"L ead-F r ee" qual ifi cati on to the cons umer -l evel
P = DES IGNATE S LEAD-FREE
PRODUCT QUALIFIED TO T HE
CONS U ME R L E VE L (OPT I ONAL )
Notes:
1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/
2. For the most current drawing please refer to IR website at http://www.irf.com/package/
IRFR/U2905ZPbF
10 www.irf.com
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA) Part Marking Information
78
LINE A
LOGO
INTERNATIONAL
RE CT IF IE R
OR
PRODUCT (OPT IONAL)
P = DESIGNATES LEAD-FREE
A = ASSEMBLY SITE CODE
IRFU 120
PART NUMBER
WEEK 19
DAT E CODE
YEAR 1 = 2001
RECTIFIER
INTERNATIONAL
LOGO
AS S E MB L Y
LOT CODE
IRFU 120
56
DAT E CODE
PART NUMBER
LOT CODE
AS S E MB L Y
56 78
YEAR 1 = 2001
WEEK 19
119A
indicates Lead-Free"
AS S E MB L E D ON WW 19 , 2 0 01
IN THE ASSEMBLY LINE "A"
Note: "P" in as s embly line pos ition
EXAMPLE:
WITH ASSEMBLY
THIS IS AN IRFU120
LOT CODE 5678
Notes:
1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/
2. For the most current drawing please refer to IR website at http://www.irf.com/package/
IRFR/U2905ZPbF
www.irf.com 11
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.09/2010
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
Limited by TJmax, starting TJ = 25°C, L = 0.08mH
RG = 25, IAS = 36A, VGS =10V. Part not
recommended for use above this value.
Pulse width 1.0ms; duty cycle 2%.
Notes:
Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS .
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
avalanche performance.
This value determined from sample failure population. 100%
tested to this value in production.
When mounted on 1" square PCB (FR-4 or G-10 Material) .
For recommended footprint and soldering techniques refer to
application note #AN-994
Rθ is measured at TJ approximately 90°C
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
16.3 ( .641 )
15.7 ( .619 )
8.1 ( .318 )
7.9 ( .312 )
12.1 ( .476 )
11.9 ( .469 ) FEED DIRECTION FEED DIRECTION
16.3 ( .641 )
15.7 ( .619 )
TRR TRL
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
16 mm
13 INCH