VNI4140K Quad high-side smart power solid-state relay Datasheet -production data Features Type Vdemag(1) RDS(on)(1) VNI4140K VCC-41 V 0.08 Iout(1) VCC 0.7 A 41 V 1. Per channel. Description Output current: 0.7 A per channel Shorted load protections Junction overtemperature protection Case overtemperature protection for thermal independence of the channels Thermal case shutdown restart not simultaneous for the various channels Protection against loss of ground Current limitation Undervoltage shutdown Open drain diagnostic outputs 3.3 V CMOS/TTL compatible inputs Fast demagnetization of inductive loads Conforms to IEC 61131-2 ESD according to IEC 61000-4-2 up to +/25 kV Figure 1. Block diagram March 2012 This is information on a product in full production. PowerSSO-24 The VNI4140K is a monolithic device made using STMicroelectronics VIPower technology, intended for driving four independent resistive or inductive loads with one side connected to ground. Active current limitation avoids dropping the system power supply in case of shorted load. Built-in thermal shutdown protects the chip from overtemperature and short-circuit. In overload condition, channel turns OFF and back ON automatically so as to maintain junction temperature between TTSD and TR. If this condition makes case temperature reach TCSD, overloaded channel is turned OFF and will restartonly when case temperature has decreased down to TCR. In case of more than one channel in overload, re-start of the overloaded channels will not be simultaneous, in order to avoid high peak current from the supply. Non overloaded channels continue to operate normally. The open drain diagnostics outputs indicates overtemperature conditions. Doc ID 14174 Rev 10 1/25 www.st.com 25 Contents VNI1440K Contents 1 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.1 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 Typical application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 6 Switching waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 7 Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 8 Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 8.1 VNI4140K thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 9 Reverse polarity protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 10 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 11 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 2/25 Doc ID 14174 Rev 10 VNI1440K 1 Pin connection Pin connection Figure 2. Pin connection (top view) OUT1 OUT1 OUT1 OUT2 OUT2 OUT2 OUT3 OUT3 OUT3 OUT4 OUT4 OUT4 VCC IN1 STAT1 IN2 STAT2 GND STAT3 IN3 STAT4 IN4 NC NC Table 1. Pin description Pin Name Description Tab TAB Exposed tab internally connected to Vcc 1 Vcc Supply voltage 2 IN1 Channel 1 input 3.3 V CMOS/TTL compatible 3 STAT1 Channel 1 status in open drain configuration 4 IN2 Channel 2 input 3.3 V CMOS/TTL compatible 5 STA2 Channel 2 status in open drain configuration 6 GND Device ground connection 7 STAT3 Channel 3 status in open drain configuration 8 IN3 Channel 3 input 3.3 V CMOS/TTL compatible 9 STAT4 Channel 4 status in open drain configuration 10 IN4 Channel 4 input 3.3 V CMOS/TTL compatible 11 NC 12 NC 13 OUT4 Channel 4 power stage output, internally protected 14 OUT4 Channel 4 power stage output, internally protected 15 OUT4 Channel 4 power stage output, internally protected 16 OUT3 Channel 3 power stage output, internally protected 17 OUT3 Channel 3 power stage output, internally protected Doc ID 14174 Rev 10 3/25 Pin connection Table 1. 4/25 VNI1440K Pin description (continued) Pin Name Description 18 OUT3 Channel 3 power stage output, internally protected 19 OUT2 Channel 2 power stage output, internally protected 20 OUT2 Channel 2 power stage output, internally protected 21 OUT2 Channel 2 power stage output, internally protected 22 OUT1 Channel 1 power stage output, internally protected 23 OUT1 Channel 1 power stage output, internally protected 24 OUT1 Channel 1 power stage output, internally protected Doc ID 14174 Rev 10 VNI1440K 2 Maximum ratings Maximum ratings Table 2. Absolute maximum rating Symbol Value Unit 41 V VCC Power supply voltage -VCC Reverse supply voltage -0.3 V IGND DC ground reverse current -250 mA IOUT Output current (continuos) Internally limited A -5 A IR Reverse output current (per channel) IIN Input current (per channel) 10 mA VIN Input voltage +VCC V VSTAT Status pin voltage +VCC V ISTAT Status pin current 10 mA VESD Electrostatic discharge (R = 1.5 k; C = 100 pF) 2000 V EAS Single pulse avalanche energy per channel not simultaneously 300 mJ PTOT Power dissipation at Tc = 25 C Internally limited W TJ Junction operating temperature Internally limited C -55 to 150 C Value Unit TSTG 2.1 Parameter Storage temperature Thermal data Table 3. Thermal data Symbol Parameter Rth(JC) Thermal resistance junction-case (1) Max 2 C/W Rth(JA) Thermal resistance junction-ambient Max see Figure 11 C/W 1. Per channel Doc ID 14174 Rev 10 5/25 Electrical characteristics 3 VNI1440K Electrical characteristics 10.5 V < VCC < 36 V; -25 C < TJ < 125 C; unless otherwise specified Table 4. Symbol Power section Max Unit 36 V 0.080 0.140 52 V 4 A mA Output current at turn- VCC = VSTAT = VIN = off VGND = 24 V, VOUT = 0 V 1 mA VOUT(OFF) Off state output voltage VIN = 0 V and IOUT = 0 A 1 V IOUT(OFF) Off state output current VIN = VOUT = 0 V 5 A Charge pump frequency Channel in ON state (1) Vcc RDS(on) Parameter Test condition Supply voltage ILGND FCP Typ 10.5 IOUT = 0.5 A at TJ = 25 C IOUT = 0.5 A On-state resistance Vclamp IS Min Is = 20 mA 41 250 2.4 All channel in OFF state ON state with VIN = 5 V (TJ = 125 C) Supply current 45 0 1450 kHz 1. To cover EN55022 class A and class B normative. VCC = 24 V; -25 C < TJ < 125 C, RL = 48 , input rise time < 0.1 s Table 5. Switching Symbol Min Typ Max Unit Turn on delay - 20 - s Rise time - 10 - s td(OFF) Turn off - 30 - s tf Fall time - 8 - s dV/dt(ON) Turn on voltage slope - 3 - V/s dV/dt(off) Turn off voltage slope - 4 - V/s td(ON) tr 6/25 Parameter Doc ID 14174 Rev 10 VNI1440K Electrical characteristics Table 6. Logical input Symbol Parameter VIL Input low level voltage VIH Input high level voltage VI(HYST) IIN Table 7. Symbol Test condition Min Typ Unit 0.8 V 2.20 Input hysteresis voltage V 0.15 Input current V VIN = 15 V 10 VIN = 36 V 210 Protection and diagnostic Parameter Test condition Min Typ vSTAT Status voltage output low VUSD Undervoltage protection 7 VUSDHYS Undervoltage hysteresis 0.4 0.5 0.7 1 ISTAT = 1.6 mA DC short-circuit current VCC = 24 V; RLOAD < 10 m IPEAK Maximum DC output current Dynamic load Hyst ILIM Max Max Unit 0.6 V 10.5 V V 1.7 A 1.3 A Tracking limits 0.2 A ILSTAT Status leakage current VCC = VSTAT = 36 V 30 TTSD Junction shutdown temperature 150 Junction reset temperature 135 TR 170 190 C THIST Junction thermal hysteresis 7 15 TCSD Case shutdown temperature 125 130 TCR Case reset temperature TCHYST Case thermal hysteresis Vdemag Output voltage at turn-OFF C 135 110 IOUT = 0.5 A; LLOAD >= 1 mH Doc ID 14174 Rev 10 C C C 7 15 VCC41 VCC45 C VCC52 V 7/25 Electrical characteristics Figure 3. 8/25 VNI1440K Current and voltage conventions Doc ID 14174 Rev 10 VNI1440K 4 Truth table Truth table Table 8. 5 Truth table Condition INPUTn OUTPUTn STATUSn Normal operation L H L H H H Overtemperature L H L L H L Undervoltage L H L L X X Shorted load (Current limitation) L H L X H H Typical application circuit Figure 4. Typical application circuit Doc ID 14174 Rev 10 9/25 Typical application circuit Figure 5. VNI1440K Thermal behavior Vin(i) = H OUT(i) On STAT(i) Off (H) 1) NO YES Tj(i) > Ttsd OUT(i) Off STAT(i) On (L) YES 4) YES NO Tc > Tcsd NO Tc > Tcr 2) NO YES Tj(i) > Tjr 3) 10/25 Doc ID 14174 Rev 10 VNI1440K 6 Switching waveforms Switching waveforms Figure 6. Switching waveforms Doc ID 14174 Rev 10 11/25 Pin functions 7 12/25 VNI1440K Pin functions Figure 7. Input circuit Figure 8. Status circuit Doc ID 14174 Rev 10 VNI1440K Pin functions Figure 9. Charge pump switching frequency (typical) vs temperature Freq_CP 2000 CP_frequency (KHz) 1800 1600 Freq_CP 1400 1200 1000 800 -50 0 50 100 150 200 temperature("C) Doc ID 14174 Rev 10 13/25 Package and PC board thermal data VNI1440K 8 Package and PC board thermal data 8.1 VNI4140K thermal data Figure 10. VNI4140K PC board Note: Layout condition of Rth and Zth measurements (PCB: Double layer, Thermal Vias, FR4 area = 77 mm x 86 mm, PCB thickness=1.6 mm, Cu thickness = 70 mm (front and back side), Copper areas: from minimum pad lay-out to 8 cm2). Figure 11. RthJA vs PCB copper area in open box free air condition (one channel ON) 14/25 Doc ID 14174 Rev 10 VNI1440K Package and PC board thermal data Figure 12. VNI4140K thermal impedance junction ambient single pulse (one channel on) Doc ID 14174 Rev 10 15/25 Reverse polarity protection 9 VNI1440K Reverse polarity protection This schematic can be used with any type of load. The following is an indication on how to dimension the RGND resistor. RGND = (-VCC) / (-IGND) where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet. Power dissipation in RGND (when VCC < 0: during reverse polarity situations) is: PD = (-VCC)2/RGND Note: In normal condition (no reverse polarity) due to the diode there will be a voltage drop between GND of the device and GND of the system. Figure 13. Reverse polarity protection + Vcc Inputi Outputi Statusi GND Load RGND 16/25 Doc ID 14174 Rev 10 Diode VNI1440K 10 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK(R) packages, depending on their level of environmental compliance. ECOPACK(R) specifications, grade definitions and product status are available at: www.st.com. ECOPACK(R) is an ST trademark. Doc ID 14174 Rev 10 17/25 Package mechanical data Table 9. VNI1440K PowerSSO-24 mechanical data mm Symbol Min. Max. A 2.15 2.47 A2 2.15 2.40 a1 0 0.075 b 0.33 0.51 c 0.23 0.32 D 10.10 10.50 E 7.4 7.6 e 0.8 e3 8.8 G 0.1 G1 0.06 H 10.1 h L 10.5 0.4 0.55 N 0.85 10deg X 4.1 4.7 Y 6.5 7.1 Figure 14. PowerSSO-24 package dimensions 18/25 Typ. Doc ID 14174 Rev 10 VNI1440K Package mechanical data Figure 15. PowerSSO-24 tube shipment (no suffix) Table 10. Note: PowerSSO-24 tube shipment Base quantity 49 Bulk quantity 1225 Tube length ( 0.5) 532 A 3.5 B 13.8 C ( 0.1) 0.6 All dimensions are in mm. Doc ID 14174 Rev 10 19/25 Package mechanical data VNI1440K Figure 16. PowerSSO-24 reel shipment (suffix "TR") Table 11. 20/25 PowerSSO-24 reel dimensions Base quantity 1000 Bulk quantity 1000 A (max) 330 B (min) 1.5 C ( 0.2) 13 F 20.2 G (2 0) 24.4 N (min) 100 T (max) 30.4 Doc ID 14174 Rev 10 VNI1440K Package mechanical data Figure 17. PowerSSO-24TM tape dimensions Table 12. Note: PowerSSO-24TM tape dimensions Tape width W 24 Tape hole spacing P0 ( 0.1) 4 Component spacing P 12 Hole diameter D ( 0.05) 1.55 Hole diameter D1 (min) 1.5 Hole position F ( 0.1) 11.5 Compartment depth K (max) 2.85 Hole spacing P1 ( 0.1) 2 According to electronic industries association (EIA) Standard 481 rev. A, Feb 1986 Doc ID 14174 Rev 10 21/25 Package mechanical data VNI1440K Figure 18. VN14140k suggested footprint 2 n Note: 3OLDER -ASK /PENING STMicroelectronics is not responsible for any PCB related issues. The footprint shown in the above figure is a suggestion which might not be in line to the customer PCB supplier design rules. All dimensions are in mm. 22/25 Doc ID 14174 Rev 10 VNI1440K 11 Order codes Order codes Table 13. Order codes Order codes Package Packaging VNI4140K PowerSSO-24 Tube VNI4140KTR PowerSSO-24 Tape and reel Doc ID 14174 Rev 10 23/25 Revision history 12 VNI1440K Revision history Table 14. 24/25 Document revision history Date Revision Changes 16-Nov-2007 1 Initial release 26-Nov-2007 2 Updated electrical parameters values 08-Jul-2008 3 Inserted: Figure 4 on page 9 and Section 9: Reverse polarity protection on page 16 08-Apr-2008 4 Added ILGND parameter in Table 4 on page 6 27-Aug-2009 5 Updated Section 9: Reverse polarity protection 09-Dec-2009 6 Added Section 10: Conformity to IEC 61000-4-2 ESD immunity test 15-Apr-2010 7 Updated Table 5 on page 6 06-Feb-2012 8 Inserted feature: Conformity to IEC 61000-4-2 ESD immunity test in cover page. Removed chapter: Conformity to IEC 61000-4-2 ESD immunity test. 05-Mar-2012 9 Suggested footprint inserted. In Table 4. parameter ILGND has been added. 19-Mar-2012 10 Minor text changes. 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