DS26LS32AC, DS26LS32C, DS26LS32M, DS26LS33M
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SNLS352C –MAY 1999–REVISED FEBRUARY 2013
DS26LS32AC/DS26LS32C/DS26LS32M/DS26LS33M Quad Differential Line Receivers
Check for Samples: DS26LS32AC,DS26LS32C,DS26LS32M,DS26LS33M
1FEATURES DESCRIPTION
The DS26LS32 and DS26LS32A are quad differential
2• High Differential or Common-Mode Input line receivers designed to meet the RS-422, RS-423
Voltage Ranges of ±7V on the DS26LS32 and and Federal Standards 1020 and 1030 for balanced
DS26LS32A and ±15V on the DS26LS33 and unbalanced digital data transmission.
• ±0.2V Sensitivity Over the Input Voltage Range The DS26LS32 and DS26LS32A have an input
on the DS26LS32 and DS26LS32A, ±0.5V sensitivity of 200 mV over the input voltage range of
Sensitivity on the DS26LS33 ±7V and the DS26LS33 has an input sensitivity of
• DS26LS32 and DS26LS32A Meet All 500 mV over the input voltage range of ±15V.
Requirements of RS-422 and RS-423 The DS26LS32A differs in function from the popular
• 6k Minimum Input Impedance DS26LS32 and DS26LS33 in that input pull-up and
• 100 mV Input Hysteresis on the DS26LS32 and pull-down resistors are included which prevent output
DS26LS32A, 200 mV on the DS26LS33 oscillation on unused channels.
• Operation From a Single 5V Supply Each version provides an enable and disable function
common to all four receivers and features TRI-STATE
• TRI-STATE Outputs, with Choice of outputs with 8 mA sink capability. Constructed using
Complementary Output Enables for Receiving low power Schottky processing, these devices are
Directly onto a Data Bus available over the full military and commercial
operating temperature ranges.
Logic Diagram
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 1999–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
DS26LS32AC, DS26LS32C, DS26LS32M, DS26LS33M
SNLS352C –MAY 1999–REVISED FEBRUARY 2013
www.ti.com
Connection Diagram
For Complete Military Product Specifications, refer to the appropriate SMD or MDS.
Figure 1. Dual-In-Line Package (Top View)
D Package or NFG0016E Package
Figure 2. 20-Lead Ceramic Leadless Chip Carrier
Truth Table (1)
ENABLE ENABLE Input Output
0 1 X Hi-Z
See note below.(2) VID ≥VTH (Max) 1
VID ≤VTH (Min) 0
(1) Hi-Z = TRI-STATE
(2) Note: Input conditions may be any combination not defined for ENABLE and ENABLE .
2Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated
Product Folder Links: DS26LS32AC DS26LS32C DS26LS32M DS26LS33M
DS26LS32AC, DS26LS32C, DS26LS32M, DS26LS33M
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SNLS352C –MAY 1999–REVISED FEBRUARY 2013
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings(1)(2)
Supply Voltage 7V
Common-Mode Range ±25V
Differential Input Voltage ±25V
Enable Voltage 7V
Output Sink Current 50 mA
Maximum Power Dissipation (3) at 25°C
Cavity Package 1433 mW
Molded DIP Package 1362 mW
SOIC Package(4) DS26LS32 1002 mW
DS26LS32A 1051 mW
Storage Temperature Range −65°C to +165°C
Lead Temperature (Soldering, 4 seconds) 260°C
(1) “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to
imply that the device should be operated at these limits. The table of “Electrical Characteristics” provides conditions for actual device
operation.
(2) If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.
(3) Derate cavity package 9.6 mW/°C above 25°C; derate molded DIP package 10.9 mW/°C above 25°C.
(4) Derate SOIC Package 8.01 mW/°C for DS26LS32 8.41 mW/°C for DS26LS32A
Operating Conditions Min Max Units
Supply Voltage, (VCC)
DS26LS32M, DS26LS33M (MIL) 4.5 5.5 V
DS26LS32C, DS26LS32AC (COML) 4.75 5.25 V
Temperature, (TA)
DS26LS32M, DS26LS33M (MIL) −55 +125 °C
DS26LS32C, DS26LS32AC (COML) 0 +70 °C
Electrical Characteristics (1) (2) (3)
over the operating temperature range unless otherwise specified
Symbol Parameter Conditions Min Typ Max Units
VTH Differential Input Voltage VOUT = VOH or DS26LS32, DS26LS32A, −7V ≤VCM ≤+7V −0.2 ±0.07 0.2 V
VOL DS26LS33, DS26LS33A, −15V ≤VCM +15V −0.5 ±0.14 0.5 V
RIN Input Resistance −15V ≤VCM ≤+15V (One Input AC GND) 6.0 8.5 kΩ
IIN Input Current (Under V IN = 15V, Other Input −15V ≤VIN ≤+15V 2.3 mA
Test) VIN =−15V, Other Input −15V ≤VIN ≤+15V −2.8 mA
VOH Output High Voltage VCC = MIN, ΔVIN = 1V, Commercial 2.7 4.2 V
VENABLE = 0.8V, IOH =−440 μA Military 2.5 4.2 V
VOL Output Low Voltage VCC = Min, ΔVIN =−1V, IOL = 4 mA 0.4 V
VENABLE = 0.8V IOL = 8 mA 0.45 V
VIL Enable Low Voltage 0.8 V
VIH Enable High Voltage 2.0 V
VIEnable Clamp Voltage VCC = Min, IIN =−18 mA −1.5 V
(1) All currents into device pins are shown as positive, all currents out of device pins are shown as negative, all voltages are referenced to
ground, unless otherwise specified. All values shown as max or min are so classified on absolute value basis.
(2) All typical values are VCC = 5V, TA= 25°C.
(3) Only one output at a time should be shorted.
Copyright © 1999–2013, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Links: DS26LS32AC DS26LS32C DS26LS32M DS26LS33M
DS26LS32AC, DS26LS32C, DS26LS32M, DS26LS33M
SNLS352C –MAY 1999–REVISED FEBRUARY 2013
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Electrical Characteristics (1) (2) (3) (continued)
over the operating temperature range unless otherwise specified
Symbol Parameter Conditions Min Typ Max Units
IOOFF-State (High V CC = Max VO= 2.4V 20 μA
Impedance) Output VO= 0.4V −20 μA
Current
IIL Enable Low Current VIN = 0.4V −0.36 mA
IIH Enable High Current VIN = 2.7V 20 μA
ISC Output Short-Circuit V O= 0V, VCC = Max, ΔVIN = 1V −15 −85 mA
Current
ICC Power Supply Current VCC = Max, All VIN = GND, DS26LS32, DS26LS32A 52 70 mA
Outputs Disabled DS26LS33, DS26LS33A 57 80 mA
IIInput High Current VIN = 5.5V 100 μA
VHYST Input Hysteresis TA= 25°C, VCC = 5V, DS26LS32, DS26S32A 100 mV
VCM = 0V DS26LS33, DS26LS33A 200 mV
Switching Characteristics
VCC = 5V, TA= 25°C DS26LS32/DS26LS33 DS26LS32A/DS26LS33A
Symbol Parameter Conditions Units
Min Typ Max Min Typ Max
tPLH Input to Output CL= 15 pF 17 25 23 35 ns
tPHL 17 25 23 35 ns
tLZ ENABLE to Output CL= 5 pF 20 30 15 30 ns
tHZ 15 22 20 25 ns
tZL ENABLE to Output CL= 15 pF 15 22 14 22 ns
tZH 15 22 15 22 ns
AC TEST CIRCUIT AND SWITCHING TIME WAVEFORMS
Figure 3. Load Test Circuit for TRI-STATE Outputs
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Product Folder Links: DS26LS32AC DS26LS32C DS26LS32M DS26LS33M
DS26LS32AC, DS26LS32C, DS26LS32M, DS26LS33M
www.ti.com
SNLS352C –MAY 1999–REVISED FEBRUARY 2013
Diagram shown for ENABLE low.
Pulse generator for all pulses: Rate = 1.0 MHz; ZO= 50Ω; tr≤6 ns; tf≤6.0 ns.
Figure 4. Propagation Delay
S1 and S2 of load circuit are closed except where shown.
Pulse generator for all pulses: Rate = 1.0 MHz; ZO= 50Ω; tr≤6 ns; tf≤6.0 ns.
Figure 5. Enable and Disable Times
TYPICAL APPLICATIONS
Figure 6. Two-Wire Balanced Interface—RS-422
Figure 7. Single Wire with Driver Ground Reference—RS-423
Copyright © 1999–2013, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Links: DS26LS32AC DS26LS32C DS26LS32M DS26LS33M
DS26LS32AC, DS26LS32C, DS26LS32M, DS26LS33M
SNLS352C –MAY 1999–REVISED FEBRUARY 2013
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REVISION HISTORY
Changes from Revision B (February 2013) to Revision C Page
• Changed layout of National Data Sheet to TI format ............................................................................................................ 5
6Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated
Product Folder Links: DS26LS32AC DS26LS32C DS26LS32M DS26LS33M
PACKAGE OPTION ADDENDUM
www.ti.com 23-Aug-2017
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
DS26LS32ACM/NOPB LIFEBUY SOIC D 16 48 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 DS26LS32
ACM
DS26LS32ACMX/NOPB LIFEBUY SOIC D 16 2500 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 DS26LS32
ACM
DS26LS32CM/NOPB LIFEBUY SOIC D 16 48 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 DS26LS32CM
DS26LS32CMX/NOPB LIFEBUY SOIC D 16 2500 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 DS26LS32CM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
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provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
PACKAGE OPTION ADDENDUM
www.ti.com 23-Aug-2017
Addendum-Page 2
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
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