CLC5602 Dual, High Output, Video Amplifier General Description The National CLC5602 has a new output stage that delivers high output drive current (130mA), but consumes minimal quiescent supply current (1.5mA/ch) from a single 5V supply. Its current feedback architecture, fabricated in an advanced complementary bipolar process, maintains consistent performance over a wide range of gains and signal levels, and has a linear phase response up to one half of the -3dB frequency. The CLC5602 offers a 0.1dB gain flatness to 22MHz and differential gain and phase errors of 0.06 and 0.02%. These features are ideal for professional and consumer video applications. The CLC5602 offers superior dynamic performance with a 135MHz small-signal bandwidth, 300V/s slew rate and a 5.7ns rise/fall times (2VSTEP). The combination of low quiescent power, high output current drive, and high speed performance make the CLC5602 well suited for many battery powered personal communication/computing systems. The ability to drive low impedance, highly capacitive loads, makes the CLC5602 ideal for single ended cable applications. It also drives low impedance loads with minimum distortion. The CLC5602 will drive a 100 load with only -86/-85dBc second/third harmonic distortion (AV = +2, VOUT = 2VPP, f = 1MHz). With a 25 load, and the same conditions, it produces only -86/-72dBc second/third harmonic distortion. The CLC5602 can also be used for driving differential-input step-up transformers for applications such as Asynchronous Digital Subscriber Lines (ADSL) or High-Bit-Rate Digital Subscriber Lines (HDSL). When driving the input of high resolution A/D converters, the CLC5602 provides excellent -87/-95dBc second/third harmonic distortion (AV =+ 2, VOUT =2 VPP, f =1 MHz, RL = 1k) and fast settling time. n n n n n n n n 0.06%, 0.02 differential gain, phase 1.5mA/ch supply current 135MHz bandwidth (Av =+2) -87/-95dBc HD2/HD3 (1MHz) 15ns settling to 0.05% 300V/s slew rate Stable for capacitive loads up to 1000pf Single 5V or 5V supplies Applications n n n n n n n n Video line driver ADSL/HDSL driver Coaxial cable driver UTP differential line driver Transformer/coil driver High capacitive load driver Portable/battery powered applications Differential A/D driver Maximum Output Voltage vs. RL DS015000-1 Features n 130mA output current Connection Diagram DS015000-3 Pinout DIP & SOIC (c) 2001 National Semiconductor Corporation DS015000 www.national.com CLC5602 Dual, High Output, Video Amplifier January 2001 CLC5602 Typical Application DS015000-2 Recommended Inverting Gain Configuration Ordering Information Package Temperature Range Industrial Part Number Package Marking NSC Drawing 8-pin plastic DIP -40C to +85C CLC5602IN CLC5602IN N08E 8-pin plastic SOIC -40C to +85C CLC5602IM CLC5602IM M08A CLC5602IMX CLC5602IM www.national.com 2 Lead Temperature (soldering 10 sec) ESD (human body model) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage (VCC-VEE) Output Current (Note 4) Common-Mode Input Voltage Maximum Junction Temperature Storage Temperature Range +300C 1000V Operating Ratings +14V 140mA VEE to VCC +150C -65C to +150C Thermal Resistance Package MDIP SOIC (JC) 65C/W 50C/W (JA) 130C/W 145C/W +5V Electrical Characteristics (AV = +2, Rf = 750, RL = 100, VS = +5V(Note 5), VCM = VEE + (VS/2), RL tied to VCM; unless specified Symbol Parameter Ambient Temperature Conditions CLC5602IN/IM Typ Min/Max Ratings (Note 2) Units +25C +25C 0 to 70C -40 to 85C VO = 0.5VPP 100 85 75 70 MHz VO = 2.0VPP 65 60 55 50 MHz -0.1dB Bandwidth VO = 0.5VPP 22 20 17 15 MHz Gain Peaking 0 0.5 0.9 1.0 dB 0.1 0.3 0.4 0.5 dB Linear Phase Deviation < 200MHz, VO = 0.5VPP < 30MHz, VO = 0.5VPP < 30MHz, VO = 0.5VPP 0.3 0.5 0.6 0.6 deg Differential Gain NTSC, RL = 150 to -1V 0.04 - - - % Differential Phase NTSC, RL = 150 to -1V 0.09 - - - deg Rise and Fall Time 2V Step 6.1 8.5 9.2 10.0 ns Settling Time to 0.05% 1V Step 25 35 50 80 ns Overshoot 2V Step 10 20 22 22 % Slew Rate 2V Step 220 190 165 150 V/s 2VPP,1MHz -77 -74 -71 -71 dBc dBc Frequency Domain Response -3dB Bandwidth Gain Rolloff Time Domain Response Distortion And Noise Response 2nd Harmonic Distortion 2VPP, 1MHz; RL = 1K -80 -77 -75 -70 2VPP, 5MHz -63 -59 -57 -57 dBc 2VPP,1MHz -85 -81 -78 -78 dBc 2VPP,1MHz; RL =1K -82 -79 -76 -76 dBc 2VPP, 5MHz -62 -57 -54 -54 dBc Voltage (eni) > 1MHz 3.4 4.4 4.9 4.9 nV/ Non-Inverting Current (ibn) > 1MHz 6.3 8.2 9.0 9.0 pA/ Inverting Current (ibi) > 1MHz 8.7 11.3 12.4 12.4 pA/ 10MHz, 1VPP -72 - - - 3rd Harmonic Distortion Equivalent Input Noise Crosstalk (Input Referred) dB Static, DC Performance Input Offset Voltage (Note 3) Average Drift Input Bias Current (Non-Inverting) (Note 3) Average Drift Input Bias Current (Inverting) (Note 3) Average Drift 3 1 4 5 6 mV 7 - 15 15 V/C 5 12 15 16 A 25 - 60 60 nA/C 3 10 12 13 A 10 - 20 20 nA/C www.national.com CLC5602 Absolute Maximum Ratings (Note 1) CLC5602 +5V Electrical Characteristics (Continued) (AV = +2, Rf = 750, RL = 100, VS = +5V(Note 5), VCM = VEE + (VS/2), RL tied to VCM; unless specified Symbol Parameter Conditions Typ Min/Max Ratings (Note 2) Units Static, DC Performance Power Supply Rejection Ratio DC 48 Common Mode Rejection Ratio DC RL = 49 47 45 45 dB 1.5 1.7 1.8 1.8 mA Input Resistance (Non-Inverting) 0.46 0.36 0.32 0.32 M Input Capacitance (Non-Inverting) 1.8 2.75 2.75 2.75 pF Input Voltage Range, High 4.2 4.1 4.1 4.0 V Input Voltage Range, Low 0.8 0.9 0.9 1.0 V Supply Current Per Channel (Note 3) 45 43 43 dB Miscellaneous Performance Output Voltage Range, High RL = 100 4.0 3.9 3.9 3.8 V Output Voltage Fange, Low RL = 100 1.0 1.1 1.1 1.2 V Output Voltage Range, High RL = 4.1 4.0 4.0 3.9 V Output Voltage Range, Low RL = 0.9 1.0 1.0 1.1 V 100 80 65 40 mA 55 90 90 120 m Output Current (Note 4) Output Resistance, Closed Loop DC 5V Electrical Characteristics (AV = +2, Rf = 750, RL = 100, VCC = 5V, unless specified. Symbol Parameter Ambient Temperature Conditions CLC5602IN/IM Typ Min/Max Ratings (Note 2) Units +25C +25C 0 to 70C -40 to 85C VO =1.0VPP 135 115 105 100 MHz VO =4.0VPP 48 45 42 40 MHz -0.1dB Bandwidth VO =1.0VPP 20 18 15 12 MHz Gain Peaking 0 0.5 0.9 1.0 dB 0.1 0.3 0.4 0.5 dB Linear Phase Deviation < 200MHz, VO =1.0VPP < 30MHz, VO =1.0VPP < 30MHz, VO = 1.0VPP 0.15 0.3 0.4 0.4 deg Differential Gain NTSC, RL = 150 0.06 0.18 - - % Differential Phase NTSC, RL = 150 0.02 0.04 - - deg Rise and Fall Time 2V Step 5.7 6.2 6.8 7.3 ns Settling Time to 0.05% 2V Step 15 25 40 60 ns Overshoot 2V Step 18 20 22 22 % Slew Rate 2V Step 300 225 190 175 V/s 2VPP, 1MHz -86 -82 -79 -79 dBc Frequency Domain Response -3dB Bandwidth Gain Rolloff Time Domain Response Distortion And Noise Response 2nd Harmonic Distortion 3rd Harmonic Distortion 2VPP, 1MHz; RL =1K -87 -83 -80 -80 dBc 2VPP, 5MHz -70 -64 -61 -60 dBc 2VPP, 1MHz -85 -81 -78 -78 dBc 2VPP,1MHz; RL = 1K -95 -90 -87 -87 dBc 2VPP, 5MHz -66 -64 -61 -60 dBc Equivalent Input Noise www.national.com 4 CLC5602 5V Electrical Characteristics (Continued) (AV = +2, Rf = 750, RL = 100, VCC = 5V, unless specified. Symbol Parameter Conditions Typ Min/Max Ratings (Note 2) Units Distortion And Noise Response Voltage (eni) > 1MHz 3.4 4.4 4.9 4.9 nV/ Non-Inverting Current (ibn) > 1MHz 6.3 8.2 9.0 9.0 pA/ Inverting Current (iin) > 1MHz 8.7 11.3 12.4 12.4 pA/ 10MHz, 1VPP -72 - - - dB 2 6 7 8 mV Crosstalk (Input Referred) Static, DC Performance Input Offset Voltage Average Drift Input Bias Current (Non-Inverting) Average Drift Input Bias Current (Inverting) Average Drift 8 - - - V/C 5 12 16 17 A nA/C 40 - - - 8 24 28 28 A 20 - 45 45 nA/C dB Power Supply Rejection Ratio DC 48 45 43 43 Common Mode Rejection Ratio DC 51 49 47 47 dB Supply Current (Per Channel) RL = 1.6 1.9 2.0 2.0 mA Miscellaneous Performance Input Resistance (Non-Inverting) 0.59 0.47 0.43 0.43 M Input Capacitance (Non-Inverting) 1.45 2.15 2.15 2.15 pF Common Mode Input Range 4.2 3.8 4.0 4.1 3.6 3.8 4.1 3.6 3.8 4.0 3.5 3.7 V 130 100 80 50 mA 40 70 70 90 m Output Voltage Range RL = 100 Output Voltage Range RL = Output Current Output Resistance, Closed Loop DC V V Note 1: "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The table of "Electrical Characteristics" specifies conditions of device operation. Note 2: Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are determined from tested parameters. Note 3: AJ-level: spec. is 100% tested at +25C. Note 4: The short circuit current can exceed the maximum safe output current Note 5: VS = VCC - VEE 5 www.national.com (AV = +2, Rf = 750, RL = 100, VS = +5V1, VCM = VEE + (VS/2), RL tied to VCM, unless specified) Normalized Magnitude (1dB/div) Av = +2 Rf = 649 Av = +1 Rf = 1.0k Phase 0 -90 -180 Av = +5 Rf = 301 -270 Av = +10 Rf = 200 -360 -450 1M 10M 100M Vo = 0.5Vpp Av = -1 Rf = 649 Gain Av = -2 Rf = 649 Phase 180 135 90 Av = -5 Rf = 649 45 Av = -10 Rf = 500 0 -45 1M 10M Frequency (Hz) 100M Frequency (Hz) DS015000-4 Frequency Response vs. RL DS015000-5 Frequency Response vs. VO RL = 1k RL = 100 Gain Phase 0 -90 RL = 25 Vo = 0.1Vpp Magnitude (1dB/div) Phase (deg) Vo = 0.5Vpp Magnitude (1dB/div) Phase (deg) Phase (deg) Vo = 0.5Vpp Gain Normalized Magnitude (1dB/div) Inverting Frequency Response Non-Inverting Frequency Response -180 -270 Vo = 1Vpp Vo = 2Vpp -360 -450 1M 10M 1M 100M 10M 100M Frequency (Hz) Frequency (Hz) DS015000-7 DS015000-6 Gain Flatness & Linear Phase Open Loop Transimpedance Gain Z(s) 225 0.5 0.4 Phase 0 Magnitude (dB) 0.1 Phase (deg) 0.2 Gain Phase 120 0.3 -0.1 180 Gain 100 135 80 90 60 45 Phase (deg) Magnitude (0.05dB/div) CLC5602 Typical Performance Characteristics -0.2 -0.3 0 10 20 40 1k 30 Frequency (MHz) 100k 1M 10M 0 100M Frequency (Hz) DS015000-8 www.national.com 10k DS015000-9 6 (AV = +2, Rf = 750, RL = 100, VS = +5V1, VCM = VEE + (VS/2), RL tied to VCM, unless specified) (Continued) PSRR & CMRR Equivalent Input Noise 12.5 3.6 Noise Voltage (nV/Hz) PSRR 50 CMRR 40 30 20 10 3.5 Inverting Current 8.7pA/Hz 3.4 7.5 Non-Inverting Current 7pA/Hz Voltage 3.35nV/Hz 3.3 5 Noise Current (pA/Hz) PSRR & CMRR (dB) 60 10 3.2 0 2.5 10k 1k 10k 100k 1M 100k 100M 10M 1M 10M Frequency (Hz) Frequency (Hz) DS015000-11 DS015000-10 2nd & 3rd Harmonic Distortion 2nd & 3rd Harmonic Distortion, RL =25 -30 -20 Vo = 2Vpp 3rd, 10MHz -30 -50 Distortion (dBc) Distortion (dBc) -40 3rd RL = 1k -60 2nd RL = 1k -70 3rd RL = 100 -80 2nd RL = 100 -90 -40 -50 2nd, 10MHz -60 3rd, 1MHz -70 -80 2nd, 1MHz -100 -90 1M 10M 0 Frequency (Hz) 0.5 1 1.5 2 DS015000-12 DS015000-13 2nd & 3rd Harmonic Distortion, RL =100 2nd & 3rd Harmonic Distortion, RL =1k -40 -50 3rd, 10MHz 3rd, 10MHz -50 -60 Distortion (dBc) Distortion (dBc) 2.5 Output Amplitude (Vpp) -60 -70 2nd, 10MHz -80 3rd, 1MHz -90 2nd, 1MHz 2nd, 10MHz -70 -80 2nd, 1MHz -90 3rd, 1MHz -100 -100 0 0.5 1 1.5 2 0 2.5 0.5 1 1.5 2 2.5 Output Amplitude (Vpp) Output Amplitude (Vpp) DS015000-14 DS015000-15 7 www.national.com CLC5602 Typical Performance Characteristics (AV = +2, Rf = 750, RL = 100, VS = +5V1, VCM = VEE + (VS/2), RL tied to VCM, unless specified) (Continued) Large & Small Signal Pulse Response Closed Loop Output Resistance 100 VCC = 5V Output Resistance () Output Voltage (0.5V/div) Large Signal Small Signal 10 1 0.1 0.01 Time (10ns/div) 10k 100k DS015000-16 1M 10M 100M Frequency (Hz) DS015000-17 Frequency Response VIO 1.0 2 IBI 0.5 0 1 0 -0.5 -1 IBN -1.0 -2 -1.5 -3 -60 -20 20 60 100 IBI, IBN (A) Offset Voltage VIO (mV) 3 Vo = 1.0Vpp Av = +2 Rf = 649 Gain Phase Av = +1 Rf = 1.0k 0 -45 -90 Av = +5 Rf = 301 -135 Av = +10 Rf = 200 -180 -225 1M 140 Phase (deg) -1.5 Normalized Magnitude (1dB/div) IBI, IBN, VIO vs. Temperature 10M 100M Frequency (Hz) Temperature (C) DS015000-19 DS015000-18 Inverting Frequency Response Frequency Response vs. RL Av = -2 Rf = 649 Gain Phase Av = -1 Rf = 649 Vo = 1.0Vpp Magnitude (1dB/div) Vo = 1.0Vpp 180 135 90 Av = -5 Rf = 649 45 Av = -10 Rf = 500 RL = 1k Gain RL = 100 Phase 0 -90 -180 RL = 25 -270 -360 0 -450 -45 1M 10M 1M 100M 10M 100M Frequency (Hz) Frequency (Hz) DS015000-20 www.national.com Phase (deg) Phase (deg) Normalized Magnitude (1dB/div) CLC5602 Typical Performance Characteristics DS015000-21 8 (AV = +2, Rf = 750, RL = 100, VS = +5V1, VCM = VEE + (VS/2), RL tied to VCM, unless specified) (Continued) Frequency Response vs. VO Gain Flatness & Linear Phase 0.4 Magnitude (0.1dB/div) Magnitude (1dB/div) Vo = 5Vpp Vo = 1Vpp Vo = 0.1Vpp Vo = 2Vpp 0.3 Gain 0.2 0.1 Phase 0 -0.1 1M 10M 100M 0 Frequency (Hz) 5 10 15 20 30 Frequency (MHz) DS015000-22 DS015000-23 Small Signal Pulse Response Large Signal Pulse Response Av = +2 Av = +2 Amplitude (0.5V/div) Amplitude (200mV/div) 25 Av = -2 Av = -2 Time (10ns/div) Time (20ns/div) DS015000-24 DS015000-25 Differential Gain and Phase 2nd & 3rd Harmonic Distortion vs. Frequency 0 0 Gain Neg Sync -0.04 -0.04 -0.08 -0.08 Phase Neg Sync Phase Pos Sync -0.12 -0.12 Phase (deg) Gain (%) Gain Pos Sync -0.16 -0.16 -0.2 -0.2 1 2 3 4 Number of 150 Loads DS015000-26 DS015000-27 9 www.national.com CLC5602 Typical Performance Characteristics (AV = +2, Rf = 750, RL = 100, VS = +5V1, VCM = VEE + (VS/2), RL tied to VCM, unless specified) (Continued) 2nd & 3rd Harmonic Distortion, RL =25 2nd & 3rd Harmonic Distortion, RL =100 -40 -30 -50 3rd, 10MHz Distortion (dBc) Distortion (dBc) -40 -50 -60 2nd, 10MHz -70 3rd, 1MHz -80 3rd, 10MHz -60 2nd, 10MHz -70 -80 3rd, 1MHz -90 2nd, 1MHz -100 -90 2nd, 1MHz -110 -100 0 1 2 3 0 4 0.5 1 1.5 2 2.5 Output Amplitude (Vpp) Output Amplitude (Vpp) DS015000-28 DS015000-29 2nd & 3rd Harmonic Distortion, RL =1k Short Term Settling Time 0.2 -50 3rd, 10MHz 0.15 Vo (% Output Step) Distortion (dBc) -60 2nd, 10MHz -70 -80 2nd, 1MHz -90 3rd, 1MHz -100 0.1 0.05 0 -0.05 -0.1 -0.15 -0.2 -110 0 1 2 3 4 1 5 10 100 1000 10000 Time (ns) Output Amplitude (Vpp) DS015000-30 DS015000-31 Long Term Settling Time IBI, IBN, Vos vs. Temperature 0.2 1.4 0.1 0.05 0 -0.05 -0.1 -0.15 -0.2 1.3 2 IBI 1.2 1 1.1 0 VOS 1 - 1 IBN 0.9 -2 0.8 1 10 100 1m 10m 100m -3 -60 Time (s) -20 20 60 100 140 Temperature (C) DS015000-32 www.national.com 3 IBI, IBN (A) Offset Voltage VOS(mV) 0.15 Vo (% Output Step) CLC5602 Typical Performance Characteristics DS015000-33 10 CLC5602 Typical Performance Characteristics (AV = +2, Rf = 750, RL = 100, VS = +5V1, VCM = VEE + (VS/2), RL tied to VCM, unless specified) (Continued) Input Referred Crosstalk Channel Matching -20 Vo = 1Vpp Magnitude (dB) Magnitude (0.5dB/div) -30 Channel 2 Channel 1 -40 -50 -60 -70 -80 -90 1M 10M 100M 10M 1M Frequency (Hz) 100M Frequency (Hz) DS015000-34 DS015000-35 Pulse Crosstalk Active Channel Amplitude (0.2V/div) Inactive Output Channel Inactive Channel Amplitude (20mV/div) Active Output Channel Time (10ns/div) DS015000-36 Application Division The CLC5602 is a current feedback amplifier fabricated in an advanced complementary bipolar process. The CLC5602 operates from a single 5V supply or dual 5V supplies. Operating from a single supply, the CLC5602 has the following features: * Provides 100mA of output current while consuming 7.5mW of power * * Offers low -80/-82dB 2nd and 3rd harmonic distortion Current feedback operation can be described using a simple equation. The voltage gain for a non-inverting or inverting current feedback amplifier is approximately by Equation 1. Vo = Vin Provides BW60MHz and 1MHz distortion < -65dBc at VO = 2.0VPP (1) where: * AV is the closed loop DC voltage gain * Rf is the feedback resistor * Z(j) is the CLC5602's open loop transimpedance gain * Z(j)/Rf is the loop gain The denominator of Equation 1 is approximately equal to 1 at low frequencies. Near the -3dB corner frequency, the interaction between Rf and Z(j) dominates the circuit performance. The value of the feedback resistor has a large affect on the circuits performance. Increasing Rf has the following affects: * Decreases loop gain * Decreases bandwidth * Reduces gain peaking The CLC5602 performance is further enhanced in 5V supply applications as indicated in the 5V Electrical Characteristics table and 5V Typical Performance plots. Current Feedback Amplifiers Some of the key features of current feedback technology are: * * * * * Av Rf 1+ Z(j ) Independence of AC bandwidth and voltage gain Inherently stable at unity gain Adjustable frequency response with feedback resistor High slew rate Fast settling 11 www.national.com CLC5602 Application Division shifting the input signal at the source. The resistive voltage divider biases the non-inverting input to VCC / 2 = 2.5V (For VCC = +5V). (Continued) * Lowers pulse response overshoot * Affects frequency response phase linearity Refer to the Feedback Resistor Selection section for more details on selecting a feedback resistor value. CLC5602 Design Information Single Supply Operation (VCC =+5V, VEE =GND) The specifications given in the +5V Electrical Characteristics table for single supply operation are measured with a common mode voltage (Vcm) of 2.5V. Vcm is the voltage around which the inputs are applied and the output voltages are specified. Operating from a single +5V supply, the Common Mode Input Range (CMIR) of the CLC5602 is typically +0.8V to +4.2V. The typical output range with RL=100 is +1.0V to +4.0V. For single supply DC coupled operation, keep input signal levels above 0.8V DC. For input signals that drop below 0.8V DC, AC coupling and level shifting the signal are recommended. The non-inverting and inverting configurations for both input conditions are illustrated in the following 2 sections. DC Coupled Single Supply OperationFigure 1 and Figure 2 show the recommended non-inverting and inverting configurations for input signals that remain above 0.8V DC. VCC 6.8F + R Cc Vin 3 VCC 2 2 R Vin 2 Rt Vcm - R >> R source 6.8F + VCC 2 Vo R 3 Cc Rg 2 + 8 0.1F 1/2 CLC5602 - 4 Vo 1 Rf R Vo = Vin - f + 2.5 Rg RL low frequency cutoff = Vcm 1 2R gC c DS015000-42 R Vo = A v = 1+ f Rg Vin Vcm Rf R Rf Rg 4 VCC Vin 1 4 Vo DS015000-41 0.1F 8 1/2 CLC5602 - 1 FIGURE 3. AC Coupled Non-Inverting Configuration + + 0.1F 1 R , where: Rin = 2 2RinC c low frequency cutoff = 6.8F 3 8 1/2 CLC5602 Rg C R Vo = Vin 1 + f + 2.5 R g VCC Note: Rt, RL and Rg are tied to Vcm for minimum power consumption and maximum output swing. + FIGURE 4. AC Coupled Inverting Configuration DS015000-39 Dual Supply Operation The CLC5602 operates on dual supplies as well as single supplies. The non-inverting and inverting configurations are shown in Figure 5 and Figure 6. FIGURE 1. Non-Inverting Configuration Note: Rb, provides DC bias for non-inverting input. Rb, RL and Rt are tied to Vcm for minimum power consumption and maximum output swing. 3 Rb Vcm Vin Rg 2 VCC 6.8F + VCC 6.8F + 8 1/2 CLC5602 - 4 + 0.1F Vo 1 Rf RL Vin 3 Vcm Rt Rt Vcm R Vo = Av = - f Vin Rg 2 Select Rt to yield desired Rin = Rt || Rg DS015000-40 + 8 1/2 CLC5602 - 4 1 Vo Rf 0.1F Rg FIGURE 2. Inverting Configuration 0.1F R Vo = A v = 1+ f Vin Rg + AC Coupled Single Supply Operation Figure 3 and Figure 4 show possible non-inverting and inverting configurations for input signals that go below 0.8V DC. The input is AC coupled to prevent the need for level 6.8F VEE DS015000-43 FIGURE 5. Dual Supply Non-Inverting Configuration www.national.com 12 (Continued) Vo = 1Vpp Magnitude (1dB/div) VCC 6.8F + Rb 3 2 Rg Vin + 8 0.1F 1/2 CLC5602 - 4 1 Rf 0.1F Rt Vo CL = 10pF Rs = 46.4 CL = 100pF Rs = 20 CL = 1000pF Rs = 6.7 + Rs - 1k Note: Rb provides DC bias for the non-inverting input. Select Rt to yield desired Rin = Rt || Rg. 1M 1k 10M 100M Frequency (Hz) DS015000-45 6.8F FIGURE 7. Frequency Response vs. CL VEE DS015000-44 Transmission Line Matching One method for matching the characteristic impedance (zo) of a transmission line or cable is to place the appropriate resistor at the input or output of the amplifier. FIGURE 6. Dual Supply Inverting Configuration Feedback Resistor Selection The feedback resistor, Rf, affects the loop gain and frequency response of a current feedback amplifier. Optimum performance of the CLC5602, at a gain of +2V/V, is achieved with Rf equal to 750. The frequency response plots in the Typical Performance sections illustrate the recommended Rf for several gains. These recommended values of Rf provide the maximum bandwidth with minimal peaking. Within limits, Rf can be adjusted to optimize the frequency response. * CL 1k + R Vo = Av = - f Vin Rg CLC5602 Application Division Figure 8 shows typical inverting and non-inverting circuit configurations for matching transmission lines. Non-inverting gain applications: * Connect R3 directly to ground. * Make R1, R2, R6, and R7 equal to Zo. * Use R3 to isolate the amplifier from reactive loading caused by the transmission line, or by parasitics. Decrease Rf to peak frequency response and extend bandwidth R1 * Increase Rf to roll off frequency response and compress bandwidth As a rule of thumb, if the recommended Rf is doubled, then the bandwidth will be cut in half. Unity Gain Operation The recommended Rf for unity gain (+1V/V) operation is 1k. Rf is left open. Parasitic capacitance at the inverting node may require a slight increase in Rf to maintain a flat frequency response. Load Termination The CLC5602 can source and sink near equal amounts of current. For optimum performance, the load should be tied to Vcm. Driving Cables and Capacitive Loads When driving cables, double termination is used to prevent reflections. For capacitive load applications, a small series resistor at the output of the CLC5602 will improve stability and settling performance. The Frequency Response vs. CL plot, shown below in Figure 7, gives the recommended series resistance value for optimum flatness at various capacitive loads. Z0 V1 +- R2 R4 V2 +- R3 Z0 Rg C6 + 1/2 CLC5602 - Z0 Vo R6 R7 Rf R5 DS015000-46 FIGURE 8. Transmission Line Matching Inverting gain applications: * Connect R3 directly to ground. * Make R4, R6, and R7 equal to Zo. * Make R5, II Rg = Zo. The input and output matching resistors attenuate the signal by a factor of 2, therefore additional gain is needed. Use C6 to match the output transmission line over a greater frequency range. C6 compensates for the increase of the amplifier's output impedance with frequency. Power Dissipation Follow these steps to determine the power consumption of the CLC5602: 1. Calculate the quiescent (no-load) power: Pamp=1CC (VCCVEE) 2. Calculate the RMS power at the output stage: Po=(VCC-Vload)(Iload), where Vload and Iload are the RMS voltage and current across the external load. 3. Calculate the total RMS power: Pt =Pamp+Po 13 www.national.com SPICE Models (Continued) SPICE models provide a means to evaluate amplifier designs. Free SPICE models are available for National's monolithic amplifiers that: * Support Berkeley SPICE 2G and its many derivatives The maximum power that the DIP and SOIC packages can dissipate at a given temperature is illustrated in Figure 9. The power derating curve for any CLC5602 package can be derived by utilizing the following equation: * Reproduce typical DC, AC, Transient, and Noise performance * Support room temperature simulations The readme file that accompanies the diskette lists released models, and provides a list of modeled parameters. The application note OA-18, Simulation SPICE Models for National's Op Amps, contains schematics and a reproduction of the readme file. Application Circuits Single Supply Cable Driver The typical application shown below shows one of the CLC5602 amplifiers driving 10m of 75 coaxial cable. The CLC5602 is set for a gain of +2V/V to compensate for the divide-by-two voltage drop at Vo. where Tamb = Ambient temperature (C) JA = Thermal resistance, from junction to ambient, for a given package (C/W) +5V 6.8F + Vin 0.1F 5k 5k 3 2 + 8 0.1F 1/2 CLC5602 - 4 75 1 1k 10m of 75 Coaxial Cable 0.1F Vo 75 DS015000-48 1k FIGURE 9. Power Derating Curves 0.1F Layout Considerations A proper printed circuit layout is essential for achieving high frequency performance. National provides evaluation boards for the CLC5602 (CLC730038-DIP, CLC730036-SOIC) and suggests their use as a guide for high frequency layout and as an aid for device testing and characterization. General layout and supply bypassing play major roles in high frequency performance. Follow the steps below as a basis for high frequency layout: * Include 6.8F tantalum and 0.1F ceramic capacitors on both supplies. * Place the 6.8F capacitors within 0.75 inches of the power pins. * Place the 0.1F capacitors less than 0.1 inches from the power pins. * Remove the ground plane under and around the part, especially near the input and output pins to reduce parasitic capacitance. * * Minimize all trace lengths to reduce series inductances. DS015000-49 FIGURE 10. Single Supply Cable Driver Vin = 10MHz, 0.5Vpp 100mV/div CLC5602 Application Division 20ns/div DS015000-50 Use flush-mount printed circuit board pins for prototyping, never use high profile DIP sockets. Evaluation Board Information A data sheet is available for the CLC730038/CLC730036 evaluation boards. The evaluation board data sheet provides: FIGURE 11. Response After 10m of Cable Single Supply Lowpass Filter Figure 12 and Figure 13 illustrate a lowpass filter and design equations. The circuit operates from a single supply of +5V. The voltage divider biases the non-inverting input to 2.5V. And the input is AC coupled to prevent the need for level shifting the input signal at the source. Use the design equations to determine R1, R2, C1, and C2 based on the desired Q and corner frequency. * Evaluation board schematics * Evaluation board layouts * General information about the boards The evaluation boards are designed to accommodate dual supplies. The boards can be modified to provide single supply operation. For best performance; 1) do not connect the unused supply, 2) ground the unused supply pin. www.national.com 14 Differential Line Driver with Load Impedance Conversion (Continued) The circuit shown in the Typical Application schematic on the front page and in Figure 15, operates as a differential line driver. The transformer converts the load impedance to a value that best matches the CLC5602's output capabilities. The single-ended input signal is converted to a differential signal by the CLC5602. The line's characteristic impedance is matched at both the input and the output. The schematic shows Unshielded Twisted Pair for the transmission line; other types of lines can also be driven. +5V 0.1F 5k Vin 0.1F R2 R1 3 158 158 5k C2 100pF 2 + 8 C1 1/2 CLC5602 - 4 0.1F 1 Rf Vo 100 1k 1.698k Rg Vd/2 Vin DS015000-51 + Rt1 FIGURE 12. Lowpass Filter Topology Rf Rg 1 R1R2C1C2 Q= 1:n Req + Io Zo RL UTP + Vo - Rm/2 Rt2 Vd R R = 2 1 + f1 = 2 f2 Vin R R g1 g2 R1C1 R1C2 + (1- K) R2C1 R 2C 2 Make the best use of the CLC5602's output drive capability as follows: 1 RC Rm + Req = 1 (3 - K) 2 Vmax Imax where Req is the transformed value of the load impedance, Vmax is the Output Voltage Range, and Imax is the maximum Output Current. Match the line's characteristic impedance: DS015000-52 FIGURE 13. Design Equations This example illustrates a lowpass filter with Q = 0.707 and corner frequency fc = 10MHz. A Q of 0.707 was chosen to achieve a maximally flat, Butterworth response. Figure 14 indicates the filter response. RL = Z o Rm = Req n= 3 Magnitude (dB) Rm/2 Set up the CLC5602 as a difference amplifier: For R1 = R2 = R and C1 = C2 = C c = -Vd/2 FIGURE 15. Differential Line Driver with Load Impedance Conversion 1 R 2C 2 + R1C1 1/2 CLC5602 - DS015000-54 Corner frequency = c = Q= 1/2 CLC5602 Rf1 Rg1 Gain = K = 1 + Rf2 Rg2 0.1F RL Req Select the transformer so that it loads the line with a value very near Zo over frequency range. The output impedance of the CLC5602 also affects the match. With an ideal transformer we obtain: -3 -9 Return Loss = -20 log10 -15 where ZO(5602)(j) is the output impedance of the CLC5602 and |ZO(5602)(j)| << Rm. -21 1M 10M n2 Z o(5602) ( j ) ,dB Zo 100M The load voltage and current will fall in the ranges: Frequency (Hz) DS015000-53 FIGURE 14. Lowpass Response 15 www.national.com CLC5602 Application Division CLC5602 Application Division Vo n Vmax Io Imax n transmitting CLC5602's are shown in a unity gain configuration because they consume the least power of any gain, for a given load. For proper operation we need Rf2 = Rg2. (Continued) The receiver output voltage are: VinB(A) Z o(5602) (j ) R VoutA(B) VinA(B) A + 1 - f2 + 2 Rm1 R g2 The CLC5602's high output drive current and low distortion make it a good choice for the application. Full Duplex Cable Driver The circuit shown in Fig 16 below, operates as a full duplex cable driver which allows simultaneous transmission and reception of signals on one transmission line. The circuit on either side of the transmission line uses are CLC5602 as a cable driver, and the second CLC5602 as a receiver. VoA is an attenuated version of VinA, while VoB is an attenuated of VinB. VinA Rt1 + Rm1 1/2 CLC5602 Z0 + Rm1 1/2 CLC5602 - - Rf1 Rg2 Rf2 1/2 CLC5602 + We selected the component values as follows: VinB Rt2 * Rm1 = ZO = 50, the characteristic impedance of the transmission line * Rf2 = Rg2 = 750 Rm1, the recommended value for the CLC5602 at AV = 2 Rm1 = 25 2 These values give excellent isolation from the other input: Rf2 1/2 CLC5602 VoA(B) VoA + VinB(A) DS015000-60 Full Duplex Cable Driver -38dB, f = 5.0MHz The CLC5602 provides large output current drive, while consuming little supply current, at the nominal bias point. It also produces low distortion with large signal swings and heavy loads. These features make the CLC5602 an excellent choice for driving transmission lines. Rm1 is used to match the transmission line. Rf2 and Rg2 set the DC gain of the CLC5602, which is used in a difference mode. Rt2 provides good CMRR and DC offset. The www.national.com Rf1 = 1.0k, the recommended value for the CLC5602 at unity gain R t2 = (R f2 || R g2 ) Rt1 - Rt2 * Rf1 Rg2 - VoB where A is the attenuation of the cable, ZO(5602)(j) is the output impedance of the CLC5602 (see the Close-Loop Output Resistanceplot), and |ZO(5602)(j)| << Rm1. 16 CLC5602 Physical Dimensions inches (millimeters) unless otherwise noted 8-Pin SOIC NS Package Number M08A 8-Pin MDIP NS Package Number N08E 17 www.national.com CLC5602 Dual, High Output, Video Amplifier Notes LIFE SUPPORT POLICY NATIONAL'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation Americas Tel: 1-800-272-9959 Fax: 1-800-737-7018 Email: support@nsc.com www.national.com National Semiconductor Europe Fax: +49 (0) 180-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 69 9508 6208 English Tel: +44 (0) 870 24 0 2171 Francais Tel: +33 (0) 1 41 91 8790 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Asia Pacific Customer Response Group Tel: 65-2544466 Fax: 65-2504466 Email: ap.support@nsc.com National Semiconductor Japan Ltd. Tel: 81-3-5639-7560 Fax: 81-3-5639-7507 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.