PRODUCT INFORMATION Integrated Circuits
Group
APPLICATIONS:
PDA
DVD
MD
Notebook PC
Cellular Phone
Digital Camera
The information for this document is from the data sheet ARM DDI 0029E; Issue Date: August 1995.
Copyright ©1998, Sharp Electronics Corp. All rights reserved. All tradenames are the registered property of their respective owners. Specifications are subject to change without notice. SMT98042
ARM7TDMI BLOCK DIAGRAM
ARM7TDMI
DESCRIPTION
The ARM7TDMI is a member of the Advanced RISC Machines
(ARM) family of general purpose 32-bit microprocessers, which
offer high performance for very low power consumption and price.
The ARM architecture is based on Reduced Instruction Set
Computer (RISC) principles, and the instruction set and related
decode mechanism are much simpler than those of micropro-
grammed Complex Instruction Set Computers. This simplicity
results in a high instruction throughput and impressive real-time
interrupt response from a small and cost-effective chip.
Pipelining is employed so that all parts of the processing and
memory systems can operate continuously. Typically, while one
instruction is being executed, its successor is being decoded, and a
third instruction is being fetched from memory.
The ARM memory interface has been designed to allow the per-
formance potential to be realized without incurring high costs in
the memory system. Speed-critical control signals are pipelined to
allow system control functions to be implemented in standard low-
power logic, and these control signals facilitate the exploitation of
the fast local access modes offered by industry standard dynamic RAMs.
CORE ALL
OTHER
SIGNALS
TAP
CONTROLLER
ICE
BREAKER
RANGEOUT0
RANGEOUT1
EXTERN1
EXTERN0
OPC
RW
MAS [1:0]
TRANS
MREQ
A [31:0]
D [31:0]
DIN [31:0]
DOUT [31:0]
BUS SPLITTER
Scan Chain 1
Scan Chain 2 Scan Chain 0
TCK TMS TRST TDI TDO TAPS [3:0] IR [3:0] SCREG [3:0]
ARM7T-1