®
INA114
1
FEATURES
LOW OFFSET VOLTAGE: 50µV max
LOW DRIFT: 0.25µV/°C max
LOW INPUT BIAS CURRENT: 2nA max
HIGH COMMON-MODE REJECTION:
115dB min
INPUT OVER-VOLTAGE PROTECTION:
±40V
WIDE SUPPLY RANGE: ±2.25 to ±18V
LOW QUIESCENT CURRENT: 3mA max
8-PIN PLASTIC AND SOL-16
INA114
DESCRIPTION
The INA114 is a low cost, general purpose instrumen-
tation amplifier offering excellent accuracy. Its versa-
tile 3-op amp design and small size make it ideal for a
wide range of applications.
A single external resistor sets any gain from 1 to 10,000.
Internal input protection can withstand up to ±40V
without damage.
The INA114 is laser trimmed for very low offset voltage
(50µV), drift (0.25µV/°C) and high common-mode
rejection (115dB at G = 1000). It operates with power
supplies as low as ±2.25V, allowing use in battery
operated and single 5V supply systems. Quiescent cur-
rent is 3mA maximum.
The INA114 is available in 8-pin plastic and SOL-16
surface-mount packages. Both are specified for the
–40°C to +85°C temperature range.
APPLICATIONS
BRIDGE AMPLIFIER
THERMOCOUPLE AMPLIFIER
RTD SENSOR AMPLIFIER
MEDICAL INSTRUMENTATION
DATA ACQUISITION
A
1
A
2
A
3
(12)
(11)
6
(10)
25k25k
25k25k
(13)7
(7)4
(5)
3
(15)
8
(2)
1
(4)
2
V
IN
V
IN
R
G
V+
V–
INA114
DIP (SOIC)
Ref
DIP Connected
Internally
V
O
G = 1 + 50k
R
G
+5
Over-Voltage
Protection
25k
25k
Over-Voltage
Protection
Feedback
Precision
INSTRUMENTATION AMPLIFIER
®
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111
Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
INA114
INA114
©1992 Burr-Brown Corporation PDS-1142D Printed in U.S.A. March, 1998
SBOS014
®
INA114 2
SPECIFICATIONS
ELECTRICAL
At TA = +25°C, VS = ±15V, RL = 2kΩ, unless otherwise noted.
Specification same as INA114BP/BU.
NOTE: (1) Temperature coefficient of the “50k” term in the gain equation.
INA114BP, BU INA114AP, AU
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
INPUT
Offset Voltage, RTI
Initial TA = +25°C±10 + 20/G ±50 + 100/G ±25 + 30/G ±125 + 500/G µV
vs Temperature TA = TMIN to TMAX ±0.1 + 0.5/G ±0.25 + 5/G ±0.25 + 5/G ±1 + 10/G µV/°C
vs Power Supply VS = ±2.25V to ±18V 0.5 + 2/G 3 + 10/G ✻✻µV/V
Long-Term Stability ±0.2 + 0.5/G µV/mo
Impedance, Differential 1010 || 6 || pF
Common-Mode 1010 || 6 || pF
Input Common-Mode Range ±11 ±13.5 ✻✻ V
Safe Input Voltage ±40 V
Common-Mode Rejection VCM = ±10V, RS = 1k
G = 1 80 96 75 90 dB
G = 10 96 115 90 106 dB
G = 100 110 120 106 110 dB
G = 1000 115 120 106 110 dB
BIAS CURRENT ±0.5 ±2±5nA
vs Temperature ±8pA/°C
OFFSET CURRENT ±0.5 ±2±5nA
vs Temperature ±8pA/°C
NOISE VOLTAGE, RTI G = 1000, RS = 0
f = 10Hz 15 nV/Hz
f = 100Hz 11 nV/Hz
f = 1kHz 11 nV/Hz
fB = 0.1Hz to 10Hz 0.4 µVp-p
Noise Current
f=10Hz 0.4 pA/Hz
f=1kHz 0.2 pA/Hz
fB = 0.1Hz to 10Hz 18 pAp-p
GAIN
Gain Equation 1 + (50k/RG)V/V
Range of Gain 1 10000 ✻✻V/V
Gain Error G = 1 ±0.01 ±0.05 ✻✻%
G = 10 ±0.02 ±0.4 ±0.5 %
G = 100 ±0.05 ±0.5 ±0.7 %
G = 1000 ±0.5 ±1±2%
Gain vs Temperature G = 1 ±2±10 ±10 ppm/°C
50k Resistance (1) ±25 ±100 ✻✻ppm/°C
Nonlinearity G = 1 ±0.0001 ±0.001 ±0.002 % of FSR
G = 10 ±0.0005 ±0.002 ±0.004 % of FSR
G = 100 ±0.0005 ±0.002 ±0.004 % of FSR
G = 1000 ±0.002 ±0.01 ±0.02 % of FSR
OUTPUT
Voltage IO = 5mA, TMIN to TMAX ±13.5 ±13.7 ✻✻ V
V
S = ±11.4V, RL = 2kΩ±10 ±10.5 ✻✻ V
V
S = ±2.25V, RL = 2kΩ±1±1.5 ✻✻ V
Load Capacitance Stability 1000 pF
Short Circuit Current +20/–15 mA
FREQUENCY RESPONSE
Bandwidth, –3dB G = 1 1 MHz
G = 10 100 kHz
G = 100 10 kHz
G = 1000 1 kHz
Slew Rate VO = ±10V, G = 10 0.3 0.6 ✻✻ V/µs
Settling Time, 0.01% G = 1 18 µs
G = 10 20 µs
G = 100 120 µs
G = 1000 1100 µs
Overload Recovery 50% Overdrive 20 µs
POWER SUPPLY
Voltage Range ±2.25 ±15 ±18 ✻✻ V
Current VIN = 0V ±2.2 ±3✻✻mA
TEMPERATURE RANGE
Specification –40 85 ✻✻°C
Operating –40 125 ✻✻°C
θ
JA 80 °C/W
®
INA114
3
R
G
V
IN
V
+IN
V–
R
G
V+
V
O
Ref
1
2
3
4
8
7
6
5
P Package 8-Pin DIP
Top View
PIN CONFIGURATIONS ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with ap-
propriate precautions. Failure to observe proper handling and
installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
NC
R
G
NC
V
IN
V
+IN
NC
V–
NC
NC
R
G
NC
V+
Feedback
V
O
Ref
NC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
U Package SOL-16 Surface-Mount
Top View
PACKAGE
DRAWING TEMPERATURE
PRODUCT PACKAGE NUMBER(1) RANGE
INA114AP 8-Pin Plastic DIP 006 –40°C to +85°C
INA114BP 8-Pin Plastic DIP 006 –40°C to +85°C
INA114AU SOL-16 Surface-Mount 211 –40°C to +85°C
INA114BU SOL-16 Surface-Mount 211 –40°C to +85°C
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.
PACKAGE/ORDERING INFORMATION
Supply Voltage .................................................................................. ±18V
Input Voltage Range.......................................................................... ±40V
Output Short-Circuit (to ground) .............................................. Continuous
Operating Temperature ................................................. –40°C to +125°C
Storage Temperature ..................................................... –40°C to +125°C
Junction Temperature.................................................................... +150°C
Lead Temperature (soldering, 10s)............................................... +300°C
NOTE: (1) Stresses above these ratings may cause permanent damage.
ABSOLUTE MAXIMUM RATINGS(1)
®
INA114 4
INPUT-REFERRED NOISE VOLTAGE
vs FREQUENCY
Frequency (Hz)
Input-Referred Noise Voltage (nV/ Hz)
110 1k100
1k
100
10
110k
G = 1
G = 10
G = 100, 1000
G = 1000
BW Limit
NEGATIVE POWER SUPPLY REJECTION
vs FREQUENCY
Frequency (Hz)
Power Supply Rejection (dB)
10 100 10k 1M1k
140
120
100
80
60
40
20
0100k
G = 1
G = 10
G = 100 G = 1000
POSITIVE POWER SUPPLY REJECTION
vs FREQUENCY
Frequency (Hz)
Power Supply Rejection (dB)
10 100 10k 1M1k
140
120
100
80
60
40
20
0100k
G = 1
G = 10
G = 100
G = 1000
INPUT COMMON-MODE VOLTAGE RANGE
vs OUTPUT VOLTAGE
Output Voltage (V)
Common-Mode Voltage (V)
–15 –10 0 5 15–5
15
10
5
0
–5
–10
–15 10
Limited by A
1
+ Output Swing
A
3
– Output
Swing Limit A
3
+ Output
Swing Limit
Limited by A
2
– Output Swing
Limited by A
1
– Output Swing
Limited by A
2
+ Output Swing
V
D/2
+
+
VCM
VO
(Any Gain)
V
D/2
COMMON-MODE REJECTION vs FREQUENCY
Frequency (Hz)
Common-Mode Rejection (dB)
10 100 10k 100k 1M1k
140
120
100
80
60
40
20
0
G = 1k
G = 100
G = 10
G = 1
G = 100, 1k
G = 10
GAIN vs FREQUENCY
Frequency (Hz)
Gain (V/V)
10 100 10k 100k 1M1k
1k
100
10
1
TYPICAL PERFORMANCE CURVES
At T
A
= +25°C, V
S
= ±15V, unless otherwise noted.
®
INA114
5
MAXIMUM OUTPUT SWING vs FREQUENCY
Peak-to-Peak Amplitude (V)
10
32
28
24
20
16
12
8
4
0100 10k 1M
Frequency (Hz)
100k1k
G = 100
G = 1, 10
G = 1000
INPUT BIAS CURRENT
vs COMMON-MODE INPUT VOLTAGE
Input Bias Current (mA)
–45
3
2
1
0
–1
–2
–3 –30 –15 0 15 30 45
|Ib1| + |Ib2|
Common-Mode Voltage (V)
Normal
Operation
Over-Voltage
Protection
Over-Voltage
Protection
One Input
Both Inputs
Both Inputs
One Input
INPUT BIAS CURRENT
vs DIFFERENTIAL INPUT VOLTAGE
Differential Overload Voltage (V)
Input Bias Current (mA)
–45
3
2
1
0
–1
–2
–3 –30 –15 0 15 30 45
G = 1
G = 10
G = 1000
G = 100
INPUT BIAS AND INPUT OFFSET CURRENT
vs TEMPERATURE
Temperature (°C)
Input Bias and Input Offset Current (nA)
–40
2
1
0
–1
–2 –15 10 35 60 85
±IB
IOS
OFFSET VOLTAGE WARM-UP vs TIME
Time from Power Supply Turn-on (s)
Offset Voltage Change (µV)
0
6
4
2
0
–2
–4
–6 15 30 45 60 75 90 105 120
G 100
SETTLING TIME vs GAIN
Gain (V/V)
Settling Time (µs)
1 100 100010
1200
1000
800
600
400
200
0
0.01%
0.1%
TYPICAL PERFORMANCE CURVES (CONT)
At T
A
= +25°C, V
S
= ±15V, unless otherwise noted.
®
INA114 6
NEGATIVE SIGNAL SWING vs TEMPERATUE (R
L
= 2k)
Output Voltage (V)
–75
–16
–14
–12
–10
–8
–6
–4
–2
0125
Temperature (°C)
–50 –25 0 25 50 75 100
V
S
= ±15V
V
S
= ±11.4V
V
S
= ±2.25V
POSITIVE SIGNAL SWING vs TEMPERATUE (R
L
= 2k)
Output Voltage (V)
–75
16
14
12
10
8
6
4
2
0125
Temperature (°C)
–50 –25 0 25 50 75 100
V
S
= ±15V
V
S
= ±11.4V
V
S
= ±2.25V
QUIESCENT CURRENT AND POWER DISSIPATION
vs POWER SUPPLY VOLTAGE
Quiescent Current (mA)
0
2.6
2.5
2.4
2.3
2.2
2.1
2.0
Power Supply Voltage (V)
±3 ±6 ±9 ±12 ±15 ±18
120
100
80
60
40
20
0
Power Dissipation (mW)
Power Dissipation
Quiescent Current
QUIESCENT CURRENT vs TEMPERATURE
Quiescent Current (mA)
–75
2.8
2.6
2.4
2.2
2.0
1.8 125
Temperature (°C)
–50 –25 0 25 50 75 100
OUTPUT CURRENT LIMIT vs TEMPERATURE
Short Circuit Current (mA)
–40
30
25
20
15
10 85
Temperature (°C)
–15 10 35 60
+|I
CL
|
–|I
CL
|
SLEW RATE vs TEMPERATURE
Slew Rate (V/µs)
–75
1.0
0.8
0.6
0.4
0.2
0125
Temperature (°C)
–50 –25 0 25 50 75 100
TYPICAL PERFORMANCE CURVES (CONT)
At T
A
= +25°C, V
S
= ±15V, unless otherwise noted.
®
INA114
7
TYPICAL PERFORMANCE CURVES (CONT)
At T
A
= +25°C, V
S
= ±15V, unless otherwise noted.
LARGE SIGNAL RESPONSE, G = 1 SMALL SIGNAL RESPONSE, G = 1
LARGE SIGNAL RESPONSE, G = 1000 SMALL SIGNAL RESPONSE, G = 1000
+10V
0
–10V
+10V
0
–10V
+200mV
0
–200mV
+100mV
0
–200mV
INPUT-REFERRED NOISE, 0.1 to 10Hz
0.1µV/div
1 s/div
®
INA114 8
APPLICATION INFORMATION
Figure 1 shows the basic connections required for operation
of the INA114. Applications with noisy or high impedance
power supplies may require decoupling capacitors close to
the device pins as shown.
The output is referred to the output reference (Ref) terminal
which is normally grounded. This must be a low-impedance
connection to assure good common-mode rejection. A resis-
tance of 5 in series with the Ref pin will cause a typical
device to degrade to approximately 80dB CMR (G = 1).
SETTING THE GAIN
Gain of the INA114 is set by connecting a single external
resistor, RG:
Commonly used gains and resistor values are shown in
Figure 1.
The 50k term in equation (1) comes from the sum of the
two internal feedback resistors. These are on-chip metal film
resistors which are laser trimmed to accurate absolute val-
FIGURE 1. Basic Connections.
G=1+50 k
R
G
(1)
DESIRED RGNEAREST 1% RG
GAIN ()()
1 No Connection No Connection
2 50.00k 49.9k
5 12.50k 12.4k
10 5.556k 5.62k
20 2.632k 2.61k
50 1.02k 1.02k
100 505.1 511
200 251.3 249
500 100.2 100
1000 50.05 49.9
2000 25.01 24.9
5000 10.00 10
10000 5.001 4.99
ues. The accuracy and temperature coefficient of these
resistors are included in the gain accuracy and drift specifi-
cations of the INA114.
The stability and temperature drift of the external gain
setting resistor, RG, also affects gain. RG’s contribution to
gain accuracy and drift can be directly inferred from the gain
equation (1). Low resistor values required for high gain can
make wiring resistance important. Sockets add to the wiring
resistance which will contribute additional gain error (possi-
bly an unstable gain error) in gains of approximately 100 or
greater.
NOISE PERFORMANCE
The INA114 provides very low noise in most applications.
For differential source impedances less than 1k, the INA103
may provide lower noise. For source impedances greater
than 50k, the INA111 FET-input instrumentation ampli-
fier may provide lower noise.
Low frequency noise of the INA114 is approximately
0.4µVp-p measured from 0.1 to 10Hz. This is approximately
one-tenth the noise of “low noise” chopper-stabilized ampli-
fiers.
A
1
A
2
A
3
6
25k25k
25k25k
7
4
3
8
1
2
V
IN
V
IN
R
G
V+
V–
INA114
G = 1 + 50k
R
G
+5
Over-Voltage
Protection
25k
25k
Over-Voltage
Protection
Load
V
O
= G • (V
IN
– V
IN
)
+
0.1µF
0.1µF
Pin numbers are
for DIP packages.
+
V
O
INA114
R
G
Also drawn in simplified form:
V
O
Ref
V
IN
V
IN
+
®
INA114
9
OFFSET TRIMMING
The INA114 is laser trimmed for very low offset voltage and
drift. Most applications require no external offset adjust-
ment. Figure 2 shows an optional circuit for trimming the
output offset voltage. The voltage applied to Ref terminal is
summed at the output. Low impedance must be maintained
at this node to assure good common-mode rejection. This is
achieved by buffering trim voltage with an op amp as
shown.
FIGURE 2. Optional Trimming of Output Offset Voltage.
INPUT BIAS CURRENT RETURN PATH
The input impedance of the INA114 is extremely high—
approximately 1010. However, a path must be provided for
the input bias current of both inputs. This input bias current
is typically less than ±1nA (it can be either polarity due to
cancellation circuitry). High input impedance means that
this input bias current changes very little with varying input
voltage.
Input circuitry must provide a path for this input bias current
if the INA114 is to operate properly. Figure 3 shows various
provisions for an input bias current path. Without a bias
current return path, the inputs will float to a potential which
exceeds the common-mode range of the INA114 and the
input amplifiers will saturate. If the differential source resis-
tance is low, bias current return path can be connected to one
input (see thermocouple example in Figure 3). With higher
source impedance, using two resistors provides a balanced
input with possible advantages of lower input offset voltage
due to bias current and better common-mode rejection.
INPUT COMMON-MODE RANGE
The linear common-mode range of the input op amps of the
INA114 is approximately ±13.75V (or 1.25V from the
power supplies). As the output voltage increases, however,
the linear input range will be limited by the output voltage
swing of the input amplifiers, A1 and A2. The common-
mode range is related to the output voltage of the complete
amplifier—see performance curve “Input Common-Mode
Range vs Output Voltage.”
A combination of common-mode and differential input
signals can cause the output of A1 or A2 to saturate. Figure
4 shows the output voltage swing of A1 and A2 expressed in
terms of a common-mode and differential input voltages.
Output swing capability of these internal amplifiers is the
same as the output amplifier, A3. For applications where
input common-mode range must be maximized, limit the
output voltage swing by connecting the INA114 in a lower
gain (see performance curve “Input Common-Mode Voltage
Range vs Output Voltage”). If necessary, add gain after the
INA114 to increase the voltage swing.
Input-overload often produces an output voltage that appears
normal. For example, an input voltage of +20V on one input
and +40V on the other input will obviously exceed the linear
common-mode range of both input amplifiers. Since both
input amplifiers are saturated to nearly the same output
voltage limit, the difference voltage measured by the output
amplifier will be near zero. The output of the INA114 will
be near 0V even though both inputs are overloaded.
INPUT PROTECTION
The inputs of the INA114 are individually protected for
voltages up to ±40V. For example, a condition of –40V on
one input and +40V on the other input will not cause
damage. Internal circuitry on each input provides low series
impedance under normal signal conditions. To provide
equivalent protection, series input resistors would contribute
excessive noise. If the input is overloaded, the protection
circuitry limits the input current to a safe value (approxi-
mately 1.5mA). The typical performance curve “Input Bias
Current vs Common-Mode Input Voltage” shows this input
FIGURE 3. Providing an Input Common-Mode Current Path.
INA114
V
IN
V
IN
R
G
+
10k
V
O
OPA177
Ref
±10mV
Adjustment Range
100
100
100µA
1/2 REF200
100µA
1/2 REF200
V+
V–
INA114
47k47k
INA114
10k
Microphone,
Hydrophone
etc.
Thermocouple
INA114
Center-tap provides
bias current return.
®
INA114 10
INA114
V
IN
V
IN
+
OPA602
511
22.1k
22.1k
Ref
V
O
For G = 100
R
G
= 511 // 2(22.1k)
effective R
G
= 505
100
Shield is driven at the
common-mode potential.
current limit behavior. The inputs are protected even if no
power supply voltage is present.
OUTPUT VOLTAGE SENSE (SOL-16 package only)
The surface-mount version of the INA114 has a separate
output sense feedback connection (pin 12). Pin 12 must be
connected to the output terminal (pin 11) for proper opera-
tion. (This connection is made internally on the DIP version
of the INA114.)
The output sense connection can be used to sense the output
voltage directly at the load for best accuracy. Figure 5 shows
how to drive a load through series interconnection resis-
tance. Remotely located feedback paths may cause instabil-
ity. This can be generally be eliminated with a high
frequency feedback path through C1. Heavy loads or long
lines can be driven by connecting a buffer inside the feed-
back path (Figure 6).
FIGURE 4. Voltage Swing of A1 and A2.
FIGURE 5. Remote Load and Ground Sensing. FIGURE 6. Buffered Output for Heavy Loads.
FIGURE 7. Shield Driver Circuit.
A
1
A
2
A
3
25k25k
25k25k
R
G
V+
V–
INA114
V
O
= G • V
D
G = 1 + 50k
R
G
25k
25k
V
CM
G • V
D
2
V
D
2
V
D
2
V
CM
V
CM
+ G • V
D
2
Over-Voltage
Protection
Over-Voltage
Protection
INA114
R
G
V
IN
V
IN
+
Load
Equal resistance here preserves
g
ood common-mode re
j
ection.
C
1
1000pF
Output
Sense
Ref
Surface-mount package
version only.
INA114
R
G
V
IN
V
IN
+
I
L
: ±100mA
Output
Sense
Ref
Surface-mount package
version only.
OPA633
R
L
180
®
INA114
11
FIGURE 8. RTD Temperature Measurement Circuit.
SEEBECK
ISA COEFFICIENT R2R4
TYPE MATERIAL (µV/°C) (R3 = 100)(R
5
+ R6 = 100)
E Chromel 58.5 3.48k56.2k
Constantan
J Iron 50.2 4.12k64.9k
Constantan
K Chromel 39.4 5.23k80.6k
Alumel
T Copper 38.0 5.49k84.5k
Constantan
NOTES: (1) –2.1mV/°C at 200µA. (2) R7 provides down-scale burn-out indication.
FIGURE 9. Thermocouple Amplifier With Cold Junction Compensation.
INA114
R
G
Ref
V
O
100µA
V+ V+
R
Z
RTD
1
2
3
Equal line resistance here creates
a small common-mode voltage
which is rejected by INA114.
Resistance in this line causes
a small common-mode voltage
which is re
j
ected b
y
INA114.
V
O
= 0V at R
RTD
= R
Z
REF200
REF102
R
80.6k
4
R
1M
7
R
5.23k
2
R
27k
1
R
100
3
1N4148
Cu
Cu
R
50
5
R
100
Zero Adj
6
V+
K
6
10.0V
4
(1) (2)
2
INA114 V
O
Ref
®
INA114 12
INA114
R
G
V
O
C
1
0.1µF
OPA602
Ref R
1
1M
f
–3dB
= 1
2πR
1
C
1
= 1.59Hz
V
IN
+
FIGURE 10. ECG Amplifier With Right-Leg Drive.
FIGURE 12. AC-Coupled Instrumentation Amplifier.
INA114
R
G/2
V
O
LA
RL
RA
10k
Ref G = 102.8k
2.8k
1/2
OPA2604
390k
390k
1/2
OPA2604
FIGURE 11. Bridge Transducer Amplifier.
INA114
R
G
100V
O
+10V
Bridge G = 500
Ref
INA114
R
G
I
B
R
1
V
IN
+
A
1
I
O
Load
I
O
= • G
V
IN
R
Ref
FIGURE 13. Differential Voltage-to-Current Converter.
A1IB Error
OPA177 ±1.5nA
OPA602 1pA
OPA128 75fA
PACKAGE OPTION ADDENDUM
www.ti.com 21-Aug-2010
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
INA114AP ACTIVE PDIP P 8 50 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type Contact TI Distributor
or Sales Office
INA114APG4 ACTIVE PDIP P 8 50 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type Contact TI Distributor
or Sales Office
INA114AU ACTIVE SOIC DW 16 40 Green (RoHS
& no Sb/Br) Call TI Level-3-260C-168 HR Contact TI Distributor
or Sales Office
INA114AU/1K ACTIVE SOIC DW 16 1000 Green (RoHS
& no Sb/Br) Call TI Level-3-260C-168 HR Purchase Samples
INA114AU/1KE4 ACTIVE SOIC DW 16 1000 Green (RoHS
& no Sb/Br) Call TI Level-3-260C-168 HR Purchase Samples
INA114AUE4 ACTIVE SOIC DW 16 40 Green (RoHS
& no Sb/Br) Call TI Level-3-260C-168 HR Contact TI Distributor
or Sales Office
INA114AUG4 ACTIVE SOIC DW 16 40 Green (RoHS
& no Sb/Br) Call TI Level-3-260C-168 HR Contact TI Distributor
or Sales Office
INA114BP ACTIVE PDIP P 8 50 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type Contact TI Distributor
or Sales Office
INA114BPG4 ACTIVE PDIP P 8 50 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type Contact TI Distributor
or Sales Office
INA114BU ACTIVE SOIC DW 16 40 Green (RoHS
& no Sb/Br) Call TI Level-3-260C-168 HR Contact TI Distributor
or Sales Office
INA114BU/1K ACTIVE SOIC DW 16 1000 Green (RoHS
& no Sb/Br) Call TI Level-3-260C-168 HR Purchase Samples
INA114BU/1KE4 ACTIVE SOIC DW 16 1000 Green (RoHS
& no Sb/Br) Call TI Level-3-260C-168 HR Purchase Samples
INA114BUE4 ACTIVE SOIC DW 16 40 Green (RoHS
& no Sb/Br) Call TI Level-3-260C-168 HR Contact TI Distributor
or Sales Office
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
PACKAGE OPTION ADDENDUM
www.ti.com 21-Aug-2010
Addendum-Page 2
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
INA114AU/1K SOIC DW 16 1000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1
INA114BU/1K SOIC DW 16 1000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
INA114AU/1K SOIC DW 16 1000 367.0 367.0 38.0
INA114BU/1K SOIC DW 16 1000 367.0 367.0 38.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
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