LTC4440-5
7
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applicaTions inForMaTion
Figure 1. Capacitance Seen by TG During Switching
Overview
The LTC4440-5 receives a ground-referenced, low voltage
digital input signal to drive a high side N-channel power
MOSFET whose drain can float up to 80V above ground,
eliminating the need for a transformer between the low
voltage control signal and the high side gate driver. The
LTC4440-5 normally operates in applications with input
supply voltages (VIN) up to 60V, but is able to withstand
and continue to function during 80V, 100ms transients
on the input supply.
The powerful output driver of the LTC4440-5 reduces the
switching losses of the power MOSFET, which increase
with transition time. The LTC4440-5 is capable of driv-
ing a 1nF load with 10ns rise and 7ns fall times using a
bootstrapped supply voltage VBOOST–TS of 6V.
Input Stage
The LTC4440-5 employs TTL/CMOS compatible input logic
level or thresholds that allow a low voltage digital signal to
drive standard threshold power MOSFETs. The LTC4440-5
contains an internal voltage regulator that biases the input
buffer, allowing the input thresholds (VIH = 1.6V, VIL =
1.25V) to be relatively independent of variations in VCC.
The 350mV hysteresis between VIH and VIL eliminates
false triggering due to noise during switching transitions.
However, care should be taken to keep this pin from any
noise pickup, especially in high frequency, high voltage
applications. The LTC4440-5 input buffer has a high input
impedance and draws negligible input current, simplifying
the drive circuitry required for the input.
Output Stage
A simplified version of the LTC4440-5’s output stage is
shown in Figure 1. The pull-down device is an N-channel
MOSFET (N1) and the pull-up device is an NPN bipolar
junction transistor (Q1). The output swings from the lower
rail (TS) to within an NPN VBE (~0.7V) of the positive rail
(BOOST). This large voltage swing is important in driv-
ing external power MOSFETs, whose RDS(ON) is inversely
proportional to its gate overdrive voltage (VGS – VTH).
The LTC4440-5’s peak pull-up (Q1) current is 1.1A while
the pull-down (N1) resistance is 1.85Ω, with a BOOST-
TS supply of 6V. The low impedance of N1 is required to
discharge the power MOSFET’s gate capacitance during
high-to-low signal transitions. When the power MOSFET’s
gate is pulled low (gate shorted to source through N1) by
the LTC4440-5, its source (TS) is pulled low by its load
(e.g., an inductor or resistor). The slew rate of the source/
gate voltage causes current to flow back to the MOSFET’s
gate through the gate-to-drain capacitance (CGD). If the
MOSFET driver does not have sufficient sink current ca-
pability (low output impedance), the current through the
power MOSFET’s CGD can momentarily pull the gate high,
turning the MOSFET back on.
A similar scenario exists when the LTC4440-5 is used
to drive a low side MOSFET. When the low side power
MOSFET’s gate is pulled low by the LTC4440-5, its drain
voltage is pulled high by its load (e.g., inductor or resis-
tor). The slew rate of the drain voltage causes current to
flow back to the MOSFET’s gate through its gate-to-drain
capacitance. If the MOSFET driver does not have sufficient
sink current capability (low output impedance), the current
through the power MOSFET’s CGD can momentarily pull
the gate high, turning the MOSFET back on.
Rise/Fall Time
Since the power MOSFET generally accounts for the ma-
jority of the power loss in a converter, it is important to
quickly turn it on or off, thereby minimizing the transition
time in its linear region. The LTC4440-5 can drive a 1nF
load with a 10ns rise time and 7ns fall time.
The LTC4440-5’s rise and fall times are determined by the
peak current capabilities of Q1 and N1. The predriver that
drives Q1 and N1 uses a nonoverlapping transition scheme
to minimize cross-conduction currents. N1 is fully turned
off before Q1 is turned on and vice versa.
IN
UP TO 100V
–
TG
CGD
POWER
MOSFET
LOAD
INDUCTOR
CGS
4440 F01
LTC4440-5
Q1
N1