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EXTENDED COMMERCIAL TEMPERATURE RANGE
IDT74LVCHR162245A
3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
MARCH 1999
1999 Integrated Device Technology, Inc. DSC-4598/-c
IDT74LVCHR162245A
APPLICATIONS:
• 5V and 3.3V mixed voltage systems
• Data communication and telecommunication systems
EXTENDED COMMERCIAL TEMPERATURE RANGE
FEATURES:
Typical
tSK(0) (Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
0.635mm pitch SSOP, 0.50mm pitch TSSOP
and 0.40mm pitch TVSOP packages
Extended commercial range of -40°C to +85°C
–V
CC = 3.3V ±0.3V, Normal Range
–V
CC = 2.7V to 3.6V, Extended Range
CMOS power levels (0.4µW typ. static)
All inputs, outputs and I/O are 5 Volt to lerant
Supports hot insertion
DESCRIPTION
This 16-bit bus transceiver is built using advanced dual metal CMOS
technology. This high-speed, low power device is ideal for asynchronous
communication between two buses (A and B). The Direction and Output
Enable controls are designed to operate this device as either two indepen-
dent 8-bit transceivers or one 16-bit transceiver. The direction control pin
(DIR) controls the direction of data flow. The output enable pin ( OE)
overrides the direction control and disables both ports. All inputs are
designed with hysteresis for improved noise margin.
All pins can be driven from either 3.3V or 5V devices. This feature allows
the use of this device as a translator in a mixed 3.3V/5V supply system.
The LVCHR162245A has series resistors in the device output structure
which will significantly reduce line noise when used with light loads. The
driver has been designed to drive ±12mA at the designated threshold
levels.
The LVCHR162245A has “bus-hold” which retains the input’s last state
whenever the input goes to a high impedance. This prevents floating inputs
and eliminates the need for pull-up/down resistors.
Functional Block Diagram
3.3V CMOS 16-BIT
BUS TRANSCEIVER
WITH 3 STATE OUTPUTS,
5 VOLT TOLERANT I/O, BUS-HOLD
1DIR
1A1
1A2
1A3
1A4
1A5
1A6
1A7
1A8
1B8
1B7
1B6
1B5
1B4
1B3
1B2
1B1
1OE
2DIR
2A1
2A2
2A3
2A4
2A5
2A6
2A7
2A8
2B8
2B7
2B6
2B5
2B4
2B3
2B2
2B1
2OE
1
47
46
44
43
41
40
38
37
48
2
3
5
6
8
9
11
12
24
36
35
33
32
30
29
27
26
25
13
14
16
17
19
20
22
23
Drive Features for LVCHR162245A:
Balanced Output Drivers: ±12 mA
Low switching noise.
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EXTENDED COMMERCIAL TEMPERATURE RANGE
IDT74LVCHR162245A
3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
1998 Integrated Device Technology, Inc. DSC-123456c
PIN CONFIGURATION
SSOP/ TSSOP/ TVSOP
TOP VIEW
CAPACITANCE (TA = +25OC, f = 1.0MHz)
Symbol Parameter(1) Conditions Typ. Max. Unit
CIN Input Capacitance VIN = 0V 4.5 6 pF
COUT Output
Capacitance VOUT = 0V 6.5 8 pF
CI/O I/O Port
Capacitance VIN = 0V 6.5 8 pF
LVC Link
NOTE:
1. As applic abl e to the dev i ce type.
1DIR
1B1
GND
VCC
GND
SO48-1
SO48-2
SO48-3
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
40
41
42
43
44
45
46
47
481
1B2
1B3
1B4
1B5
1B6
1B7
1B8
2B1
2B2
GND
2B3
2B4
2B6
2B5
VCC
GND
2B8
2B7
2DIR
1OE
1A1
GND
VCC
GND
1A2
1A3
1A4
1A5
1A6
1A7
1A8
2A1
2A2
GND
2A3
2A4
2A6
2A5
VCC
GND
2A8
2A7
2OE
ABSOLUTE MAXIMUM RATINGS (1)
Symbol Description Max. Unit
V
TERM(2) Terminal Voltage with Respect to GND – 0.5 to +6.5 V
V
TERM(3) Terminal Voltage with Respect to GND – 0.5 to +6.5 V
TSTG Storage Temperature – 65 to +150 °C
IOUT DC Output Current – 50 to +50 mA
IIK
IOK Continuous Clamp Current,
VI < 0 or VO < 0 – 50 mA
ICC
ISS
Continuous Current through
each VCC or GND ±100 mA
LVC Link
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other c onditions abov e those indic ated in the operati onal s ections
of this specification is not implied. Exposure to absolute maximum
rating condit ions for extended periods may affect reliability.
2. VCC terminals.
3. All termina l s except V CC.
PIN DESCRIPTION
Pin Names Description
xOE Output Enable Input (Active LOW)
xDIR Direction Control Input
xAx Side A Inputs or 3-State Outputs(1)
xBx Side B Inputs or 3-State Outputs(1)
NOTE:
1. These pins have “Bus-hold”. All other pins are standard input s,
outputs, or I/Os.
FUNCTION TABLE (each 8-bit section)(1)
Inputs
xOE xDIR Outputs
L L Bus B Data to Bus A
L H Bus A Data to Bus B
H X High Z State
NOTE:
1. H
=
HIGH Vo lta
g
e Level
L
=
LOW Voltage Level
X
=
Don’t Car e
Z
=
Hi
g
h-Impedance
3
EXTENDED COMMERCIAL TEMPERATURE RANGE
IDT74LVCHR162245A
3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Operating Condition: TA = –40OC to +85OC
Symbol Parameter Test Conditions Min. Typ.(1) Max. Unit
VIH Input HIGH Voltage Level VCC = 2.3V to 2.7V 1.7 V
VCC = 2.7V to 3.6V 2
VIL Input LOW Voltage Level VCC = 2.3V to 2.7V 0.7 V
VCC = 2.7V to 3.6V 0.8
IIH
IIL Input Leakage Current VCC = 3.6V VI = 0 to 5.5V ±5 µA
IOZH High Impedance Output Current VCC = 3.6V VO = 0 to 5.5V ±10 µA
IOZL (3-State Output pins)
IOFF Input/Output Power Off Leakage VCC = 0V, VIN or VO 5.5V ±50 µA
VIK Clamp Diode Voltage VCC = 2.3V, IIN = – 18mA – 0.7 – 1.2 V
VHInput Hysteresis VCC = 3.3V 100 mV
ICCL
ICCH Quiescent Power Supply Current VCC = 3.6V VIN = GND or VCC ——10µA
ICCZ 3.6 VIN 5.5V(2) ——10
ICC Quiescent Power Supply
Current Variation One input at VCC - 0.6V
other inputs at VCC or GND 500 µA
LVC Link
NOTES:
1. Typic al v al ues are at VCC = 3.3V , +25°C ambient .
2. This appl i es in the dis abl ed state only.
BUS-HOLD CHARACTERISTICS
Symbol Parameter(1) Test Conditions Min. Typ.(2) Max. Unit
IBHH Bus-Hold Input Sustain Current VCC = 3.0V VI = 2.0V – 75 µA
IBHL VI = 0.8V 75
IBHH Bus-Hold Input Sustain Current VCC = 2.3V VI = 1.7V µA
IBHL VI = 0.7V
I
BHHO Bus-Hold Input Overdrive Current VCC = 3.6V VI = 0 to 3.6V ± 500 µA
IBHLO LVC Link
NOTES:
1. Pins wi th Bus-hold are i dentified i n t he pi n descripti on.
2. Typic al v al ues are at VCC = 3.3V , +25°C ambient .
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EXTENDED COMMERCIAL TEMPERATURE RANGE
IDT74LVCHR162245A
3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
OPERATING CHARACTERISTICS, VCC = 3.3V ± 0.3V, TA = 25°C
Symbol Parameter Test Conditions Typical Unit
CPD Power Dissipation Capacitance per Transceiver Outputs enabled CL = 0pF, f = 10Mhz 39 pF
CPD Power Dissipation Capacitance per Transceiver Outputs disabled 4 pF
SWITCHING CHARACTERISTICS (1)
VCC = 2.7V VCC = 3.3V±0.3V
Symbol
Parameter Min. Max. Min. Max. Unit
tPLH
tPHL Propagation Delay
xAx to xBx or xBx to xAx 5.7 1.5 4.8 ns
tPZH
tPZL Output Enable Time
xOE to xAx or xBx 7.9 1.5 6.3 ns
tPHZ
tPLZ Output Disable Time
xOE to xAx or xBx 8.3 2.2 7.4 ns
tSK(o) Output Skew(2) 500 ps
NOTES:
1. See test circuits and waveforms. TA = – 40°C to + 85°C.
2. Skew between any two out puts of t he same pack age and switchi ng i n the same direction.
OUTPUT DRIVE CHARACTERISTICS
Symbol Parameter Test Conditions(1) Min. Max. Unit
VOH Output HIGH Voltage VCC = 2.3V to 3.6V IOH = – 0.1mA VCC – 0.2 V
VCC = 2.3V IOH = – 4mA 1.9
IOH = – 6mA 1.7
VCC = 2.7V IOH = – 4mA 2.2
IOH = – 8mA 2
VCC = 3.0V IOH = – 6mA 2.4
IOH = – 12mA 2
VOL Output LOW Voltage VCC = 2.3V to 3.6V IOL = 0.1mA 0.2 V
VCC = 2.3V IOL = 4mA 0.4
IOL = 6mA 0.55
VCC = 2.7V IOL = 4mA 0.4
IOL = 8mA 0.6
VCC = 3.0V IOL = 6mA 0.55
IOL = 12mA 0.8 LVC Link
NOTE:
1. VIH and VIL must be wit hin the min. or max. range shown in the DC ELECTRICA L CHARACTERISTICS OVER OPERA TING RANGE table for t he
appropriate VCC range. T A = – 40°C to +85°C.
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EXTENDED COMMERCIAL TEMPERATURE RANGE
IDT74LVCHR162245A
3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
Open
VLOAD
GND
VCC
Pulse
Generator D.U.T.
500
500
CL
RT
VIN VOUT
(1, 2)
INPUT
VIH
0V
VOH
VOL
tPLH1
tSK (x)
OUTPUT 1
OUTPUT 2
tPHL1
tSK (x)
tPLH2 tPHL2
VT
VT
VOH
VT
VOL
tSK(x) = tPLH2 - tPLH1 or tPHL2 - tPHL1
DATA
INPUT 0V
0V
0V
0V
tREM
TIMING
INPUT
ASYNCHRONOUS
CONTROL
SYNCHRONOUS
CONTROL
tSU tH
tSU tH
VIH
VT
VIH
VT
VIH
VT
VIH
VT
LOW-HIGH-LOW
PULSE
HIGH-LOW-HIGH
PULSE
VT
tW
SAME PHASE
INPUT TRANSITION
OPPOSITE PHASE
INPUT TRANSITION
0V
0V
VOH
VOL
tPLH tPHL
tPHL
tPLH
OUTPUT
VT
VIH
VT
VT
VIH
VT
CONTROL
INPUT tPLZ 0V
OUTPUT
NORMALLY
LOW tPZH
0V
SWITCH
CLOSED
OUTPUT
NORMALLY
HIGH
ENABLE DISABLE
SWITCH
OPEN
tPHZ
0V
VLZ
VOH
VT
VT
tPZL
VLOAD/2 VLOAD/2
VIH
VT
VOL
VHZ
LVC Link
LVC L ink
LVC Link
LVC Link
LVC L ink
LVC Link
TEST CIRCUITS AND WAVEFORMS
TEST CONDITIONS PROPAGATION DELAY
TEST CIRCUITS FOR ALL OUTPUTS ENABLE AND DISABLE TIMES
SET-UP, HOLD, AND RELEASE TIMES
SWITCH POSITION
OUTPUT SKEW - tsk (x)
DEFINITIONS:
CL = Load capaci tance: includes jig and probe capacit anc e.
RT = Terminati on resistance: should be equal to ZOUT of the Pul s e
Generator.
NOTE:
1. Puls e Generator for All Pulses: Rate 10MHz; tF 2.5ns; t R 2. 5ns.
2. Puls e Generator for All Pulses: Rate 10MHz; tF 2ns; tR 2ns .
NOTES:
1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs.
2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank.
NOTE:
1. Diagram shown for input Control Enable-LOW and input Control
Disable-HIGH.
Symbol VCC(1)= 3.3V ±0.3V VCC(1) = 2.7V VCC(2)= 2.5V ±0.2V Unit
VLOAD 662 x VccV
VIH 2.7 2.7 Vcc V
VT1.5 1.5 VCC / 2 V
VLZ 300 300 150 mV
VHZ 300 300 150 mV
CL50 50 30 pF
LVC Link
Test Switch
Open Drain
Disable Low
Enable Low
VLOAD
Disable High
Enable High GND
All Other tests Open
LVC Link
PULSE WIDTH
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EXTENDED COMMERCIAL TEMPERATURE RANGE
IDT74LVCHR162245A
3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
CORPORATE HEADQUARTERS for SALES:
2975 Stender Way 800-345-7015 or 408-727-6116
Santa Clara, CA 95054 fax: 408-492-8674
www.idt.com*
*To search for sales office near you, please click the sales button found on our home page or dial the 800# above and press 2.
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
ORDERING INFORMATION
IDT XX LVC XXXX XX
Package
De vice Type
Tem p. R ange
PV
PA
PF
R162
74
Shrink Sm all Outline Package (SO 48-1)
Thin S hrink Small O utline P ackage (S O 48-2)
Thin V ery Small O utline Package (SO48-3)
16-Bit B us Transceiver with 3-State Outputs
-40°C to +85°C
XXX
FamilyBus-Hold
245A
Bus-hold
Double-D ensity w ith Re sistors, ±12m A
H