SDLS030A − DECEMBER 1983 − REVISED NOVEMBER 2003
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DPackage Options Include Plastic
Small-Outline (D, NS), Shrink Small-Outline
(DB), and Ceramic Flat (W) Packages,
Ceramic Chip Carriers (FK), and Standard
Plastic (N) and Ceramic (J) DIPs
DDependable Texas Instrument Quality and
Reliability
SN5405, SN54LS05, SN54S05 ...J PACKAGE
SN7405 ...N PACKAGE
SN74LS05 . . . D, DB, N, OR NS PACKAGE
SN74S05 . . . D, N, OR NS PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1A
1Y
2A
2Y
3A
3Y
GND
VCC
6A
6Y
5A
5Y
4A
4Y
3212019
910111213
4
5
6
7
8
18
17
16
15
14
6Y
NC
5A
NC
5Y
2A
NC
2Y
NC
3A
SN54LS05, SN54S05 . . . FK PACKAGE
(TOP VIEW)
1Y
1A
NC
4A 6A
3Y
GND
NC CC
V
4Y
NC − No internal connection
SN54LS05, SN54S05 ...W PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1A
2Y
2A
VCC
3A
3Y
4A
1Y
6A
6Y
GND
5Y
5A
4Y
description/ordering information
These devices contain six independent inverters. To perform correctly, the open-collector outputs require pullup
resistors. These devices may be connected to other open-collector outputs to implement active-low wired-OR
or active-high wire-AND functions. Open-collector devices often are used to generate high VOH levels.
ORDERING INFORMATION
TAPACKAGE†ORDERABLE
PART NUMBER TOP-SIDE
MARKING
SN7405N SN7405N
PDIP − N Tube SN74LS05N SN74LS05N
PDIP − N
Tube
SN74S05N SN74S05N
Tube SN74LS05D
LS05
0°C to 70°C
SOIC − D
Tape and reel SN74LS05DR LS05
0°C to 70°CSOIC − D Tube SN74S05D
S05
Tape and reel SN74S05DR S05
SOP − NS
Tape and reel
SN74LS05NSR 74LS05
SOP − NS Tape and reel SN74S05NSR 74S05
SSOP − DB Tape and reel SN74LS05DBR LS05
CDIP − J
Tube
SNJ54LS05J SNJ54LS05J
CDIP − J Tube SNJ54S05J SNJ54S05J
−55°C to 125°C
CDIP − W
Tube
SNJ54LS05W SNJ54LS05W
−55°C to 125°CCDIP − W Tube SNJ54S05W SNJ54S05W
LCCC − FK
Tube
SNJ54LS05FK SNJ54LS05FK
LCCC − FK
Tube
SNJ54S05FK SNJ54S05FK
†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
The SN5405 is obsolete
a
nd no longer is supplie
d.
Copyright 2003, Texas Instruments Incorporated
! "#$ ! %#&'" ($)
(#"! " !%$""! %$ *$ $! $+! !#$!
!(( ,-) (#" %"$!!. ($! $"$!!'- "'#($
$!. '' %$$!)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
%(#"! "%' /0121 '' %$$! $ $!$(
#'$!! *$,!$ $() '' *$ %(#"! %(#"
%"$!!. ($! $"$!!'- "'#($ $!. '' %$$!)
SDLS030A − DECEMBER 1983 − REVISED NOVEMBER 2003
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
FUNCTION TABLE
(each inverter)
INPUT
OUTPUT
INPUT
A
OUTPUT
Y
H L
L H
logic diagram (positive logic)
1A
2A
3A
4A
5A
6A
1Y
2Y
3Y
4Y
5Y
6Y
1
3
5
9
11
13
2
4
6
8
10
12
Y = A
Pin numbers shown are for the D, DB, J, N, and NS packages.
The SN5405 is obsolete
a
nd no longer is supplie
d.
SDLS030A − DECEMBER 1983 − REVISED NOVEMBER 2003
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
schematic (each inverter)
Resistor values shown are nominal.
4 kΩ
Input
AOutput
Y
GND
VCC
1.6 kΩ
1 kΩ
’05
20 kΩ
Input
AOutput
Y
VCC
8 kΩ
4.5 kΩ
’LS05
GND
2.8 kΩ
Output
Y
VCC
900 Ω
500 Ω
’S05
Input
A
250 Ω
absolute maximum ratings over operating free-air temperature (unless otherwise noted)†
Supply voltage, VCC (see Note 1): ’05, ’LS05, ’S05 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, VI: ’05, ’S05 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
’LS05 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Off-state output voltage, VO 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Note 2): D package 86°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DB package 96°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package 80°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NS package 76°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg −65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. Voltage values are with respect to network ground terminal.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
The SN5405 is obsolete
a
nd no longer is supplie
d.
SDLS030A − DECEMBER 1983 − REVISED NOVEMBER 2003
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
recommended operating conditions
SN5405 SN7405
UNIT
MIN NOM MAX MIN NOM MAX
UNIT
VCC Supply voltage 4.5 5 5.5 4.75 5 5.25 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.8 0.8 V
VOH High-level output voltage 5.5 5.5 V
IOL Low-level output current 16 16 mA
TAOperating free-air temperature −55 125 0 70 °C
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS†
SN5405 SN7405
UNIT
PARAMETER
TEST CONDITIONS
†
MIN TYP‡MAX MIN TYP‡MAX
UNIT
VIK VCC = MIN, II = −12 mA −1.5 −1.5 V
IOH
VCC = MIN,
VOH = 5.5 V
VIL = 0.8 V 0.25
mA
IOH VCC = MIN, VOH = 5.5 V VIL = 0.7 V 0.25 mA
VOL VCC = MIN, VIH = 2 V, IOL = 16 mA 0.2 0.4 0.2 0.4 V
IIVCC = MAX, VI = 5.5 V 1 1 mA
IIH VCC = MAX, VI = 2.4 V 40 40 µA
IIL VCC = MAX, VI = 0.4 V −1.6 −1.6 mA
ICCH VCC = MAX, VI = 0 V 6 12 6 12 mA
ICCL VCC = MAX, VI = 4.5 V 18 33 18 33 mA
†For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
‡All typical values are at VCC = 5 V, TA = 25°C.
switching characteristics, VCC = 5 V, TA = 25°C (see Figure 1)
PARAMETER FROM
(INPUT) TO
(OUTPUT) TEST CONDITIONS MIN TYP MAX UNIT
tPLH
A
Y
RL = 4 kΩ
CL = 15 pF
40 55
ns
tPHL A
Y
RL = 400 Ω
C
L
= 15 pF
8 15 ns
The SN5405 is obsolete
a
nd no longer is supplie
d.
SDLS030A − DECEMBER 1983 − REVISED NOVEMBER 2003
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
recommended operating conditions
SN54LS05 SN74LS05
UNIT
MIN NOM MAX MIN NOM MAX
UNIT
VCC Supply voltage 4.5 5 5.5 4.75 5 5.25 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.7 0.8 V
VOH High-level output voltage 5.5 5.5 V
IOL Low-level output current 4 8 mA
TAOperating free-air temperature −55 125 0 70 °C
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS†
SN54LS05 SN74LS05
UNIT
PARAMETER
TEST CONDITIONS
†
MIN TYP‡MAX MIN TYP‡MAX
UNIT
VIK VCC = MIN, II = −18 mA −1.5 −1.5 V
IOH VCC = MIN, VIL = MAX, VOH = 5.5 V 0.1 0.1 mA
VOL
VCC = MIN,
VIH = 2 V
IOL = 4 mA 0.25 0.4 0.25 0.4
V
VOL VCC = MIN, VIH = 2 V IOL = 8 mA 0.35 0.5 V
IIVCC = MAX, VI = 7 V 0.1 0.1 mA
IIH VCC = MAX, VI = 2.7 V 20 20 µA
IIL VCC = MAX, VI = 0.4 V −0.4 −0.4 mA
ICCH VCC = MAX, VI = 0 V 1.2 2.4 1.2 2.4 mA
ICCL VCC = MAX, VI = 4.5 V 3.6 6.6 3.6 6.6 mA
†For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
‡All typical values are at VCC = 5 V, TA = 25°C.
switching characteristics, VCC = 5 V, TA = 25°C (see Figure 2)
PARAMETER FROM
(INPUT) TO
(OUTPUT) TEST CONDITIONS MIN TYP MAX UNIT
tPLH
A
Y
RL = 2 kΩ,
CL = 15 pF
17 32
ns
tPHL A
Y
R
L
= 2 k
Ω
,
C
L
= 15 pF
15 28 ns
The SN5405 is obsolete
a
nd no longer is supplie
d.
SDLS030A − DECEMBER 1983 − REVISED NOVEMBER 2003
6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
recommended operating conditions
SN54S05 SN74S05
UNIT
MIN NOM MAX MIN NOM MAX
UNIT
VCC Supply voltage 4.5 5 5.5 4.75 5 5.25 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.8 0.8 V
VOH High-level output voltage 5.5 5.5 V
IOL Low-level output current 20 20 mA
TAOperating free-air temperature −55 125 0 70 °C
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS†
SN54S05 SN74S05
UNIT
PARAMETER
TEST CONDITIONS
†
MIN TYP‡MAX MIN TYP‡MAX
UNIT
VIK VCC = MIN, II = −18 mA −1.2 −1.2 V
IOH
VCC = MIN,
VOH = 5.5 V
VIL = 0.8 V 0.25
mA
IOH VCC = MIN, VOH = 5.5 V VIL = 0.7 V 0.25 mA
VOL VCC = MIN, VIH = 2 V, IOL = 20 mA 0.5 0.5 V
IIVCC = MAX, VI = 5.5 V 1 1 mA
IIH VCC = MAX, VI = 2.7 V 50 50 µA
IIL VCC = MAX, VI = 0.5 V −2 −2 mA
ICCH VCC = MAX, VI = 0 V 9 19.8 9 19.8 mA
ICCL VCC = MAX, VI = 4.5 V 30 54 30 54 mA
†For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
‡All typical values are at VCC = 5 V, TA = 25°C.
switching characteristics, VCC = 5 V, TA = 25°C (see Figure 1)
PARAMETER FROM
(INPUT) TO
(OUTPUT) TEST CONDITIONS MIN TYP MAX UNIT
tPLH
CL = 15 pF
2 5 7.5
ns
tPHL
A
Y
RL = 280 Ω
C
L
= 15 pF
2 4.5 7
ns
tPLH
A
Y
R
L
= 280
Ω
CL = 50 pF
7.5
ns
tPHL
C
L
= 50 pF
7ns
The SN5405 is obsolete
a
nd no longer is supplie
d.
SDLS030A − DECEMBER 1983 − REVISED NOVEMBER 2003
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
SERIES 54/74 AND 54S/74S DEVICES
From Output
Under Test
CL
(see Note A)
RL
Test Point
VCC
LOAD CIRCUIT
1.5 V 1.5 V
High-Level
Pulse
1.5 V 1.5 V
tw
Low-Level
Pulse
VOLTAGE WAVEFORMS
PULSE WIDTHS
NOTES: A. CL includes probe and jig capacitance.
B. In the examples above, the phase relationships between inputs and outputs have been chosen arbitrarily.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, and:
For Series 54/74, tr ≤ 7 ns, tf≤ 7 ns.
For Series 54S/74S, tr ≤ 2.5 ns, tf≤ 2.5 ns.
D. The outputs are measured one at a time with one input transition per measurement.
1.5 V 1.5 V
Input
tPLH
In-Phase
Output
3 V
0 V
1.5 V 1.5 V VOH
VOL
tPHL
1.5 V 1.5 V VOH
VOL
tPHL tPLH
Out-of-Phase
Output
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
Figure 1. Load Circuit and Voltage Waveforms
The SN5405 is obsolete
a
nd no longer is supplie
d.
SDLS030A − DECEMBER 1983 − REVISED NOVEMBER 2003
8POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
SERIES 54LS/74LS DEVICES
From Output
Under Test
CL
(see Note A)
RL
Test Point
VCC
LOAD CIRCUIT
1.3 V 1.3 V
High-Level
Pulse
1.3 V 1.3 V
tw
Low-Level
Pulse
VOLTAGE WAVEFORMS
PULSE WIDTHS
NOTES: A. CL includes probe and jig capacitance.
B. In the examples above, the phase relationships between inputs and outputs have been chosen arbitrarily.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 1.5 ns, tf≤ 2.6 ns.
D. The outputs are measured one at a time with one input transition per measurement.
1.3 V 1.3 V
Input
tPLH
In-Phase
Output
3 V
0 V
1.3 V 1.3 V VOH
VOL
tPHL
1.3 V 1.3 V VOH
VOL
tPHL tPLH
Out-of-Phase
Output
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
Figure 2. Load Circuit and Voltage Waveforms
The SN5405 is obsolete
a
nd no longer is supplie
d.
PACKAGE OPTION ADDENDUM
www.ti.com 25-Jan-2012
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
JM38510/07003BDA ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type
JM38510/07004BCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type
M38510/07003BDA ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type
M38510/07004BCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type
SN54LS05J ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type
SN54S05J ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type
SN7405D OBSOLETE SOIC D 14 TBD Call TI Call TI
SN7405DR OBSOLETE SOIC D 14 TBD Call TI Call TI
SN7405N ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
SN7405N3 OBSOLETE PDIP N 14 TBD Call TI Call TI
SN7405NE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
SN74LS05D ACTIVE SOIC D 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LS05DBLE OBSOLETE SSOP DB 14 TBD Call TI Call TI
SN74LS05DBR ACTIVE SSOP DB 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LS05DBRE4 ACTIVE SSOP DB 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LS05DBRG4 ACTIVE SSOP DB 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LS05DE4 ACTIVE SOIC D 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LS05DG4 ACTIVE SOIC D 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LS05DR ACTIVE SOIC D 14 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LS05DRE4 ACTIVE SOIC D 14 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LS05DRG4 ACTIVE SOIC D 14 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LS05N ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
SN74LS05N3 OBSOLETE PDIP N 14 TBD Call TI Call TI
PACKAGE OPTION ADDENDUM
www.ti.com 25-Jan-2012
Addendum-Page 2
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
SN74LS05NE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
SN74LS05NSR ACTIVE SO NS 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LS05NSRG4 ACTIVE SO NS 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74S05D ACTIVE SOIC D 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74S05DE4 ACTIVE SOIC D 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74S05DG4 ACTIVE SOIC D 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74S05N ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
SN74S05N3 OBSOLETE PDIP N 14 TBD Call TI Call TI
SN74S05NE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
SN74S05NSR ACTIVE SO NS 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74S05NSRE4 ACTIVE SO NS 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74S05NSRG4 ACTIVE SO NS 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SNJ54LS05FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
SNJ54LS05J ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type
SNJ54LS05W ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type
SNJ54S05FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
SNJ54S05J ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type
SNJ54S05W ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
PACKAGE OPTION ADDENDUM
www.ti.com 25-Jan-2012
Addendum-Page 3
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN54LS05, SN54S05, SN7405, SN74LS05, SN74S05 :
•Catalog: SN74LS05, SN74S05
•Military: SN5405, SN54LS05, SN54S05
NOTE: Qualified Version Definitions:
•Catalog - TI's standard catalog product
•Military - QML certified for Military and Defense Applications
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
SN74LS05DBR SSOP DB 14 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1
SN74LS05DR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
SN74LS05NSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1
SN74S05NSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN74LS05DBR SSOP DB 14 2000 367.0 367.0 38.0
SN74LS05DR SOIC D 14 2500 367.0 367.0 38.0
SN74LS05NSR SO NS 14 2000 367.0 367.0 38.0
SN74S05NSR SO NS 14 2000 367.0 367.0 38.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE
4040065 /E 12/01
28 PINS SHOWN
Gage Plane
8,20
7,40
0,55
0,95
0,25
38
12,90
12,30
28
10,50
24
8,50
Seating Plane
9,907,90
30
10,50
9,90
0,38
5,60
5,00
15
0,22
14
A
28
1
2016
6,50
6,50
14
0,05 MIN
5,905,90
DIM
A MAX
A MIN
PINS **
2,00 MAX
6,90
7,50
0,65 M
0,15
0°–ā8°
0,10
0,09
0,25
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
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