LT1054/LT1054L Switched-Capacitor Voltage Converter with Regulator FEATURES DESCRIPTION Output Current n 100mA (LT1054) n 125mA (LT1054L) n Reference and Error Amplifier for Regulation n Low Loss: 1.1V at 100mA n Operating Range n 3.5V to 15V (LT1054) n 3.5V to 7V (LT1054L) n External Shutdown n External Oscillator Synchronization n Can Be Paralleled n Pin Compatible with the LTC(R)1044/ICL7660 n Available in SW16 and SO-8 Packages The LT (R)1054 is a monolithic, bipolar, switched-capacitor voltage converter and regulator. The LT1054 provides higher output current than previously available converters with significantly lower voltage losses. An adaptive switch driver scheme optimizes efficiency over a wide range of output currents. Total voltage loss at 100mA output current is typically 1.1V. This holds true over the full supply voltage range of 3.5V to 15V. Quiescent current is typically 2.5mA. n APPLICATIONS The LT1054 also provides regulation, a feature not previously available in switched-capacitor voltage converters. By adding an external resistive divider a regulated output can be obtained. This output will be regulated against changes in both input voltage and output current. The LT1054 can also be shut down by grounding the feedback pin. Supply current in shutdown is less than 100A. Voltage Inverter n Voltage Regulator n Negative Voltage Doubler n Positive Voltage Doubler The internal oscillator of the LT1054 runs at a nominal frequency of 25kHz. The oscillator pin can be used to adjust the switching frequency or to externally synchronize the LT1054. All registered trademarks and trademarks are the property of their respective owners. The LT1054 is pin compatible with previous converters such the LTC1044/ICL7660. n BLOCK DIAGRAM VREF VIN 6 LT1054/LT1054 Voltage Loss 8 2 2.5V REFERENCE R FEEDBACK/ SHUTDOWN CAP + 2 - R Q OSC 7 OSC Q + VOLTAGE LOSS (V) DRIVE + 1 3.5V VIN 15V (LT1054) 3.5V VIN 7V (LT1054L) CIN = COUT = 100F INDICATES GUARANTEED TEST POINT CIN* CAP - 4 DRIVE LT1054L LT1054 1 TJ = 125C TJ = 25C TJ = -55C DRIVE 3 GND + *EXTERNAL CAPACITORS COUT* 5 -VOUT 0 0 25 50 75 100 OUTPUT CURRENT (mA) 125 1054 TA01* DRIVE LT1054 * BD Rev. I Document Feedback For more information www.analog.com 1 LT1054/LT1054L ABSOLUTE MAXIMUM RATINGS (Note 1) Supply Voltage (Note 2) LT1054 ..................................................................16V LT1054L ..................................................................7V Input Voltage Pin 1.................................................. 0V VPIN1 V+ Pin 3 (S Package).............................. 0V VPIN3 V+ Pin 7............................................... 0V VPIN7 VREF Pin 13 (S Package)........................ 0V VPIN13 VREF Operating Junction Temperature Range LT1054C/LT1054LC............................... 0C to 100C LT1054I.............................................. - 40C to 100C LT1054M (OBSOLETE PART)............. -55C to 125C Maximum Junction Temperature (Note 3) LT1054C/LT1054LC.......................................... 125C LT1054I.............................................................. 125C LT1054M (OBSOLETE PART)............................ 150C Storage Temperature Range J8, N8 and S8 Packages..................... -55C to 150C S Package.......................................... - 65C to 150C Lead Temperature (Soldering, 10 sec)................... 300C PIN CONFIGURATION FB/SHDN 1 8 V+ CAP + 2 7 OSC GND 3 6 VREF CAP - 4 5 VOUT N8 PACKAGE 8-LEAD PLASTIC DIP TOP VIEW TOP VIEW TOP VIEW J8 PACKAGE 8-LEAD CERAMIC DIP (OBSOLETE PART) TJMAX = 125C, JA = 130C/W NC 1 16 NC NC 2 15 NC 14 V + FB/SHDN 1 8 V+ CAP + 2 7 OSC FB/SHDN 3 GND 3 6 VREF CAP + 4 13 OSC 5 VOUT GND 5 12 VREF CAP - 6 11 VOUT CAP - 4 S8 PACKAGE 8-LEAD PLASTIC SO TJMAX = 125C, JA = 120C/W SEE REGULATION AND CAPACITOR SELECTION SECTIONS IN THE APPLICATIONS INFORMATION FOR IMPORTANT INFORMATION ON THE S8 DEVICE NC 7 10 NC NC 8 9 NC SW PACKAGE 16-LEAD PLASTIC SO TJMAX = 125C, JA = 150C/W ORDER INFORMATION LEAD FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE LT1054CN8#PBF LT1054CN8 8-Lead Plastic DIP 0C to 100C LT1054IN8#PBF LT1054IN8 8-Lead Plastic DIP -40C to 100C LT1054MJ8 OBSOLETE PART LT1054MJ8 8-Lead Ceramic DIP -55C to 125C LT1054CS8#PBF LT1054CS8#TRPBF 1054 8-Lead Plastic SO 0C to 100C LT1054LCS8#PBF LT1054LCS8#TRPBF 1054L 8-Lead Plastic SO 0C to 100C LT1054IS8#PBF LT1054IS8#TRPBF 1054I 8-Lead Plastic SO -40C to 100C LT1054CSW#PBF LT1054CSW#TRPBF LT1054CSW 16-Lead Plastic SO 0C to 100C LT1054ISW#PBF LT1054ISW#TRPBF LT1054ISW 16-Lead Plastic SO -40C to 100C LT1054CJ8#PBF OBSOLETE PART LT1054CJ8#TRPBF LT1054CJ8 8-Lead Ceramic DIP 0C to 100C Contact the factory for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix. 2 Rev. I For more information www.analog.com LT1054/LT1054L ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. (Note 7) PARAMETER CONDITIONS Supply Current ILOAD = 0mA MIN LT1054: TYP MAX UNITS VIN = 3.5V VIN = 15V l l 2.5 3.0 4.0 5.0 mA mA LT1054L: VIN = 3.5V VIN = 7V l l 2.5 3.0 4.0 5.0 mA mA 15 7 V V Supply Voltage Range LT1054 LT1054L l l 3.5 3.5 Voltage Loss (VIN - |VOUT|) CIN = COUT = 100F Tantalum (Note 4) IOUT = 10mA IOUT = 100mA IOUT = 125mA (LT1054L) l l l 0.35 1.10 1.35 0.55 1.60 1.75 V V V Output Resistance IOUT = 10mA to 100mA (Note 5) l 10 15 Oscillator Frequency LT1054: 3.5V VIN 15V LT1054L: 3.5V VIN 7V l l 15 15 25 25 40 35 kHz kHz Reference Voltage IREF = 60A, TJ = 25C 2.35 2.25 2.50 l 2.65 2.75 V V -4.70 -5.00 -5.20 V Regulated Voltage VIN = 7V, TJ = 25C, RL = 500 (Note 6) Line Regulation LT1054: 7V VIN 12V, RL = 500 (Note 6) l 5 25 mV Load Regulation VIN = 7V, 100 500 (Note 6) l 10 50 mV Maximum Switch Current Supply Current in Shutdown 300 VPIN1 = 0V Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The absolute maximum supply voltage rating of 16V is for unregulated circuits using LT1054. For regulation mode circuits using LT1054 with VOUT 15V at Pin 5 (Pin 11 on S package), this rating may be increased to 20V. The absolute maximum supply voltage for LT1054L is 7V. Note 3: The devices are guaranteed by design to be functional up to the absolute maximum junction temperature. l 100 mA 200 A Note 4: For voltage loss tests, the device is connected as a voltage inverter, with pins 1, 6, and 7 (3, 12, and 13 S package) unconnected. The voltage losses may be higher in other configurations. Note 5: Output resistance is defined as the slope of the curve, (VOUT vs IOUT), for output currents of 10mA to 100mA. This represents the linear portion of the curve. The incremental slope of the curve will be higher at currents <10mA due to the characteristics of the switch transistors. Note 6: All regulation specifications are for a device connected as a positive-to-negative converter/regulator with R1 = 20k, R2 = 102.5k, C1 = 0.002F, (C1 = 0.05F S package) CIN = 10F tantalum, COUT = 100F tantalum. Note 7: The S8 package uses a different die than the H, J8, N8 and S packages. The S8 device will meet all the existing data sheet parameters. See Regulation and Capacitor Selection in the Applications Information section for differences in application requirements. Rev. I For more information www.analog.com 3 LT1054/LT1054L TYPICAL PERFORMANCE CHARACTERISTICS Shutdown Threshold Supply Current 5 0.5 0.4 0.3 0.2 Oscillator Frequency 35 IL = 0 4 FREQUENCY (kHz) VPIN1 SUPPLY CURRENT (mA) SHUTDOWN THRESHOLD (V) 0.6 3 2 0 - 50 - 25 50 25 75 0 TEMPERATURE (C) 100 0 125 10 5 INPUT VOLTAGE (V) 0 Supply Current in Shutdown VPIN1 = 0V 60 40 20 0 10 5 INPUT VOLTAGE (V) Output Voltage Loss 140 1.4 120 1.2 100 1.0 VOLTAGE LOSS (V) AVERAGE INPUT CURRENT (mA) QUIESCENT CURRENT (A) 100 80 60 40 20 0 15 20 100 60 80 40 OUTPUT CURRENT (mA) Output Voltage Loss VOLTAGE LOSS (V) VOLTAGE LOSS (V) IOUT = 50mA 0 INVERTER CONFIGURATION COUT = 100F TANTALUM fOSC = 25kHz 0 10 20 30 40 50 60 70 80 90 100 INPUT CAPACITANCE (F) LT1054 * TPC06 IOUT = 100mA 1 IOUT = 50mA IOUT = 10mA 1 IOUT = 10mA 0.4 INVERTER CONFIGURATION CIN = 100F TANTALUM COUT = 100F TANTALUM 2 IOUT = 100mA 0 0.6 Output Voltage Loss INVERTER CONFIGURATION CIN = 10F TANTALUM COUT = 100F TANTALUM 1 IOUT = 50mA LT1050 * TPC05 LT1054 * TPC04 2 IOUT = 100mA 0.8 0.2 0 100 125 LT1054 * TPC03 Average Input Current 120 80 15 -70 -50 -25 0 25 50 75 TEMPERATURE (C) 15 LT1054 * TPC02 LT1054 * TPC01 10 OSCILLATOR FREQUENCY (kHz) IOUT = 10mA 100 0 LT1054 * TPC07 4 VIN = 3.5V 1 0.1 0 VIN = 15V 25 1 10 OSCILLATOR FREQUENCY (kHz) 100 LT1054 * TPC08 Rev. I For more information www.analog.com LT1054/LT1054L TYPICAL PERFORMANCE CHARACTERISTICS Reference Voltage Temperature Coefficient Regulated Output Voltage 100 -4.8 80 REFERENCE VOLTAGE CHANGE (mV) -4.7 OUTPUT VOLTAGE (V) -4.9 -5.0 -5.1 -11.6 -11.8 -12.0 -12.2 -12.4 -12.6 -50 -25 50 25 0 75 TEMPERATURE (C) 100 125 VREF AT 0 = 2.500V 60 40 20 0 -20 -40 -60 -80 -100 -50 -25 LT1054 * TPC09 50 25 0 75 TEMPERATURE (C) 100 125 LT1054 * TPC10 PIN FUNCTIONS FB/SHDN (Pin 1): Feedback/Shutdown Pin. This pin has two functions. Pulling Pin 1 below the shutdown threshold ( 0.45V) puts the device into shutdown. In shutdown the reference/regulator is turned off and switching stops. The switches are set such that both CIN and COUT are discharged through the output load. Quiescent current in shutdown drops to approximately 100A (see Typical Performance Characteristics). Any open-collector gate can be used to put the LT1054 into shutdown. For normal (unregulated) operation the device will start back up when the external gate is shut off. In LT1054 circuits that use the regulation feature, the external resistor divider can provide enough pull-down to keep the device in shutdown until the output capacitor (COUT) has fully discharged. For most applications where the LT1054 would be run intermittently, this does not present a problem because the discharge time of the output capacitor will be short compared to the off-time of the device. In applications where the device has to start up before the output capacitor (COUT) has fully discharged, a restart pulse must be applied to Pin 1 of the LT1054. Using the circuit of Figure5, the restart signal can be either a pulse (tp > 100s) or a logic high. Diode coupling the restart signal into Pin 1 will allow the output voltage to come up and regulate without overshoot. The resistor divider R3/ R4 in Figure5 should be chosen to provide a signal level at pin 1 of 0.7V to 1.1V. Pin 1 is also the inverting input of the LT1054's error amplifier and as such can be used to obtain a regulated output voltage. CAP+/CAP - (Pin 2/Pin 4): Pin 2, the positive side of the input capacitor (CIN), is alternately driven between V + and ground. When driven to V+, Pin 2 sources current from V+. When driven to ground Pin 2 sinks current to ground. Pin 4, the negative side of the input capacitor, is driven alternately between ground and VOUT. When driven to ground, Pin 4 sinks current to ground. When driven to VOUT Pin 4 sources current from COUT. In all cases current flow in the switches is unidirectional as should be expected using bipolar switches. VOUT (Pin 5): In addition to being the output pin this pin is also tied to the substrate of the device. Special care must be taken in LT1054 circuits to avoid pulling this pin positive with respect to any of the other pins. Pulling Pin5 positive with respect to Pin 3 (GND) will forward bias the substrate diode which will prevent the device from starting. This condition can occur when the output load driven by the LT1054 is referred to its positive supply (or to some other positive voltage). Note that most op amps present just such a load since their supply currents flow from their V + terminals to their V- terminals. To prevent start-up problems with this type of load an external Rev. I For more information www.analog.com 5 LT1054/LT1054L PIN FUNCTIONS transistor must be added as shown in Figure1. This will prevent VOUT (Pin 5) from being pulled above the ground pin (Pin 3) during start-up. Any small, general purpose transistor such as 2N2222 or 2N2219 can be used. RX should be chosen to provide enough base drive to the external transistor so that it is saturated under nominal output voltage and maximum output current conditions. In some cases an N-channel enhancement mode MOSFET can be used in place of the transistor. RX ( VOUT ) IOUT V+ IL IQ + LOAD FB/SHDN CIN + OSC CAP + LT1054 GND VREF CAP - IOUT - V+ RX VOUT LT1054 * F01 + COUT Figure1. VREF (Pin 6): Reference Output. This pin provides a 2.5V reference point for use in LT1054-based regulator circuits. The temperature coefficient of the reference voltage has been adjusted so that the temperature coefficient of the regulated output voltage is close to zero. This requires the reference output to have a positive temperature coefficient as can be seen in the typical performance curves. This nonzero drift is necessary to offset a drift term inherent in the internal reference divider and comparator network tied to the feedback pin. The overall result of these drift terms is a regulated output which has a slight positive temperature coefficient at output voltages below 5V and a slight negative TC at output voltages above 5V. Reference output current should be limited, for regulator feedback networks, to approximately 60A. The reference pin will draw 100A when shorted to ground and will not affect the internal reference/regulator, so that this pin can also be used as a pull-up for LT1054 circuits that require synchronization. 6 OSC (Pin 7): Oscillator Pin. This pin can be used to raise or lower the oscillator frequency or to synchronize the device to an external clock. Internally Pin 7 is connected to the oscillator timing capacitor (Ct 150pF) which is alternately charged and discharged by current sources of 7A so that the duty cycle is 50%. The LT1054 oscillator is designed to run in the frequency band where switching losses are minimized. However the frequency can be raised, lowered, or synchronized to an external system clock if necessary. The frequency can be lowered by adding an external capacitor (C1, Figure2) from Pin 7 to ground. This will increase the charge and discharge times which lowers the oscillator frequency. The frequency can be increased by adding an external capacitor (C2, Figure2, in the range of 5pF to 20pF) from Pin 2 to Pin 7. This capacitor will couple charge into CT at the switch transitions, which will shorten the charge and discharge time, raising the oscillator frequency. Synchronization can be accomplished by adding an external resistive pull-up from Pin 7 to the reference pin (Pin 6). A 20k pull-up is recommended. An open collector gate or an NPN transistor can then be used to drive the oscillator pin at the external clock frequency as shown in Figure2. Pulling up Pin 7 to an external voltage is not recommended. For circuits that require both frequency synchronization and regulation, an external reference can be used as the reference point for the top of the R1/R2 divider allowing Pin 6 to be used as a pullup point for Pin 7. FB/SHDN V + + CIN VIN C2 OSC CAP + LT1054 GND VREF CAP - C1 LT1054 * F02 VOUT + COUT Figure2. V+ (Pin 8): Input Supply. The LT1054 alternately charges CIN to the input voltage when CIN is switched in parallel with the input supply and then transfers charge to COUT when CIN is switched in parallel with COUT. Switching occurs at the oscillator frequency. During the time that CIN Rev. I For more information www.analog.com LT1054/LT1054L PIN FUNCTIONS is charging, the peak supply current will be approximately equal to 2.2 times the output current. During the time that CIN is delivering charge to COUT the supply current drops to approximately 0.2 times the output current. An input supply bypass capacitor will supply part of the peak input current drawn by the LT1054 and average out the current drawn from the supply. A minimum input supply bypass capacitor of 2F, preferably tantalum or some other low ESR type is recommended. A larger capacitor may be desirable in some cases, for example, when the actual input supply is connected to the LT1054 through long leads, or when the pulse current drawn by the LT1054 might affect other circuitry through supply coupling. APPLICATIONS INFORMATION Theory of Operation V1 V2 f To understand the theory of operation of the LT1054, a review of a basic switched-capacitor building block is helpful. In Figure3 when the switch is in the left position, capacitor C1 will charge to voltage V1. The total charge on C1 will be q1 = C1V1. The switch then moves to the right, discharging C1 to voltage V2. After this discharge time the charge on C1 is q2 = C1V2. Note that charge has been transferred from the source V1 to the output V2. The amount of charge transferred is: q = q1 - q2 = C1(V1 - V2) C1 C2 RL LT1054 * F03 Figure3. Switched-Capacitor Building Block V1 REQUIV REQUIV = 1 fC1 V2 C2 RL LT1054 * F04 Figure4. Switched-Capacitor Equivalent Circuit If the switch is cycled f times per second, the charge transfer per unit time (i.e., current) is: eventually be dominated by the 1/fC1 term and voltage losses will rise. I = (f)(q) = (f)[C1(V1 - V2)] Note that losses also rise as frequency increases. This is caused by internal switching losses which occur due to some finite charge being lost on each switching cycle. This charge loss per-unit-cycle, when multiplied by the switching frequency, becomes a current loss. At high frequency this loss becomes significant and voltage losses again rise. To obtain an equivalent resistance for the switched-capacitor network we can rewrite this equation in terms of voltage and impedance equivalence: I= V1- V2 V1- V2 = 1/ fC1 REQUIV A new variable REQUIV is defined such that REQUIV = 1/fC1. Thus the equivalent circuit for the switched-capacitor network is as shown in Figure4. The LT1054 has the same switching action as the basic switched-capacitor building block. Even though this simplification doesn't include finite switch on-resistance and output voltage ripple, it provides an intuitive feel for how the device works. These simplified circuits explain voltage loss as a function of frequency (see Typical Performance Characteristics). As frequency is decreased, the output impedance will The oscillator of the LT1054 is designed to run in the frequency band where voltage losses are at a minimum. Regulation The error amplifier of the LT1054 servos the drive to the PNP switch to control the voltage across the input capacitor (CIN) which in turn will determine the output voltage. Using the reference and error amplifier of the LT1054, an external resistive divider is all that is needed to set the regulated output voltage. Figure5 shows the basic regulator configuration and the formula for calculating Rev. I For more information www.analog.com 7 LT1054/LT1054L APPLICATIONS INFORMATION R3 VIN FB/SHDN V + R4 CIN + 10F TANTALUM ) )) ) OSC CAP LT1054 GND VREF CAP - VOUT R1 R2 C1 VOUT FOR EXAMPLE: TO GET VOUT = -5V REFERRED TO THE GROUND PIN OF THE LT1054, CHOOSE R1 = 20k, THEN ) + + RESTART SHUTDOWN |VOUT| |VOUT| R2 = +1 +1 1.21V VREF R1 - 40mV 2 WHERE VREF = 2.5V NOMINAL 2.2F COUT + 100F TANTALUM LT1054 * F05 ) |-5V| + 1 = 102.6k* 2.5V - 40mV 2 *CHOOSE THE CLOSEST 1% VALUE R2 = 20k Figure5. the appropriate resistor values. R1 should be chosen to be 20k or greater because the reference output current is limited to 100A. R2 should be chosen to be in the range of 100k to 300k. For optimum results the ratio of CIN/COUT is recommended to be 1/10. C1, required for good load regulation at light load currents, should be 0.002F for all output voltages. A new die layout was required to fit into the physical dimensions of the S8 package. Although the new die of the LT1054CS8 will meet all the specifications of the existing LT1054 data sheet, subtle differences in the layout of the new die require consideration in some application circuits. In regulating mode circuits using the 1054CS8 the nominal values of the capacitors, CIN and COUT, must be approximately equal for proper operation at elevated junction temperatures. This is different from the earlier part. Mismatches within normal production tolerances for the capacitors are acceptable. Making the nominal capacitor values equal will ensure proper operation at elevated junction temperatures at the cost of a small degradation in the transient response of regulator circuits. For unregulated circuits the values of CIN and COUT are normally equal for all packages. For S8 applications assistance in unusual applications circuits, please consult the factory. It can be seen from the circuit block diagram that the maximum regulated output voltage is limited by the supply voltage. For the basic configuration, |VOUT| referred 8 to the ground pin of the LT1054 must be less than the total of the supply voltage minus the voltage loss due to the switches. The voltage loss versus output current due to the switches can be found in Typical Performance Characteristics. Other configurations such as the negative doubler can provide higher output voltages at reduced output currents (see Typical Applications). Capacitor Selection For unregulated circuits the nominal values of CIN and COUT should be equal. For regulated circuits see the section on Regulation. While the exact values of CIN and COUT are noncritical, good quality, low ESR capacitors such as solid tantalum are necessary to minimize voltage losses at high currents. For CIN the effect of the ESR of the capacitor will be multiplied by four due to the fact that switch currents are approximately two times higher than output current and losses will occur on both the charge and discharge cycle. This means that using a capacitor with 1 of ESR for CIN will have the same effect as increasing the output impedance of the LT1054 by 4. This represents a significant increase in the voltage losses. For COUT the affect of ESR is less dramatic. COUT is alternately charged and discharged at a current approximately equal to the output current and the ESR of the capacitor will cause a step function to occur in the output ripple at the switch transitions. This step function will degrade the output regulation for changes in output load current and should be avoided. Realizing that large value tantalum capacitors can be expensive, a technique that can be used is to parallel a smaller tantalum capacitor with a large aluminum electrolytic capacitor to gain both low ESR and reasonable cost. Where physical size is a concern some of the newer chip type surface mount tantalum capacitors can be used. These capacitors are normally rated at working voltages in the 10V to 20V range and exhibit very low ESR (in the range of 0.1). Output Ripple The peak-to-peak output ripple is determined by the value of the output capacitor and the output current. Peak-topeak output ripple may be approximated by the formula: dV = IOUT 2fCOUT Rev. I For more information www.analog.com LT1054/LT1054L APPLICATIONS INFORMATION where dV = peak-to-peak ripple and f = oscillator frequency. where: For output capacitors with significant ESR a second term must be added to account for the voltage step at the switch transitions. This step is approximately equal to: VX VIN - [(LT1054 Voltage Loss)(1.3) + |VOUT|] (2IOUT)(ESR of COUT) Power Dissipation The power dissipation of any LT1054 circuit must be limited such that the junction temperature of the device does not exceed the maximum junction temperature ratings. The total power dissipation must be calculated from two components, the power loss due to voltage drops in the switches and the power loss due to drive current losses. The total power dissipated by the LT1054 can be calculated from: P (VIN - |VOUT|)(IOUT) + (VIN)(IOUT)(0.2) where both VIN and VOUT are referred to the ground pin (Pin3) of the LT1054. For LT1054 regulator circuits, the power dissipation will be equivalent to that of a linear regulator. Due to the limited power handling capability of the LT1054 packages, the user will have to limit output current requirements or take steps to dissipate some power external to the LT1054 for large input/output differentials. This can be accomplished by placing a resistor in series with CIN as shown in Figure6. A portion of the input voltage will then be dropped across this resistor without affecting the output regulation. Because switch current is approximately 2.2 times the output current and the resistor will cause a voltage drop when CIN is both charging and discharging, the resistor should be chosen as: RX = VX/(4.4 IOUT) VIN CIN OSC CAP + LT1054 GND VREF CAP - R1 R2 VOUT C1 VOUT + RX + FB/SHDN V + and IOUT = maximum required output current. The factor of 1.3 will allow some operating margin for the LT1054. For example: assume a 12V to - 5V converter at 100mA output current. First calculate the power dissipation without an external resistor: P = (12V - | - 5V|)(100mA) + (12V)(100mA)(0.2) P = 700mW + 240mW = 940mW At JA of 130C/W for a commercial plastic device this would cause a junction temperature rise of 122C so that the device would exceed the maximum junction temperature at an ambient temperature of 25C. Now calculate the power dissipation with an external resistor (RX). First find how much voltage can be dropped across RX. The maximum voltage loss of the LT1054 in the standard regulator configuration at 100mA output current is 1.6V, so: VX = 12V - [(1.6V)(1.3) + | - 5V|] = 4.9V and RX = 4.9V/(4.4)(100mA) = 11 This resistor will reduce the power dissipated by the LT1054 by (4.9V)(100mA) = 490mW. The total power dissipated by the LT1054 would then be (940mW - 490mW) = 450mW. The junction temperature rise would now be only 58C. Although commercial devices are guaranteed to be functional up to a junction temperature of 125C, the specifications are only guaranteed up to a junction temperature of 100C, so ideally you should limit the junction temperature to 100C. For the above example this would mean limiting the ambient temperature to 42C. Other steps can be taken to allow higher ambient temperatures. The thermal resistance numbers for the LT1054 packages represent worst-case numbers with no heat sinking and still air. Small clip-on type heat sinks can be used to lower the thermal resistance of the LT1054 package. In some systems there may be some available airflow which will help to lower the thermal resistance. Wide PC board traces from the LT1054 leads can also help to remove heat from the device. This is especially true for plasticpackages. COUT LT1054 * F06 Figure6. Rev. I For more information www.analog.com 9 LT1054/LT1054L TYPICAL APPLICATIONS Basic Voltage Inverter CAP - OSC CAP + LT1054 GND VREF + VOUT 10F -VOUT 100F CAP - LT1054 * TAO2 ) R1 R2 VOUT )) ) + |VOUT| |VOUT| R2 = +1 = +1 , 1.21V VREF R1 - 40mV 2 0.002F VOUT + 100F FB/SHDN V + 2F OSC CAP LT1054 GND VREF + Negative Voltage Doubler 100F VIN Positive Doubler FB/SHDN V + + OSC CAP + LT1054 GND VREF - CAP - 2F VOUT VOUT 50mA QX* VOUT 100F LT1054 * TA03 REFER TO FIGURE 5 + 2F VIN VIN + + + FB/SHDN V + Basic Voltage Inverter/Regulator 100F + - VIN 1N4001 3.5V TO 15V 1N4001 + + 100F FB/SHDN RX* + + VIN = 3.5V TO 15V VOUT 2VIN - (VL + 2VDIODE) VL = LT1054 VOLTAGE LOSS VIN VIN = -3.5V TO -15V VOUT = 2VIN + (LT1054 VOLTAGE LOSS) + (QX SATURATION VOLTAGE) LT1054 * TAO4 *SEE FIGURE 3 + 10F 2F V+ OSC CAP + LT1054 GND VREF CAP - VOUT LT1054 * TAO5 100mA Regulating Negative Doubler VIN 3.5 TO 15V 10F + OSC CAP + LT1054 #1 GND VREF OSC CAP + LT1054 #2 GND VREF - VOUT SET 10F + R1 40k VOUT 10F 1N4002 100F FB/SHDN V + CAP 1N4002 1N4002 FB/SHDN V + + 10F + R2 500k 10F + 1N4002 0.002F CAP - 1N4002 VIN = 3.5 TO 15V VOUT MAX -2VIN + [1054 VOLTAGE LOSS + 2(VDIODE)] ) 2.2F -VOUT IOUT 100mA MAX )) ) HP5082-2810 20k PIN 2 LT1054 #1 VOUT + + 10F LT1054 * TAO6 + |VOUT| |VOUT| R2 = +1 = + 1 , REFER TO FIGURE 5 1.21V R1 VREF - 40mV 2 10 Rev. I For more information www.analog.com LT1054/LT1054L TYPICAL APPLICATIONS Bipolar Supply Doubler VIN 3.5V TO 15V + 10F FB/SHDN V + - + + OSC CAP + LT1054 GND VREF 10F CAP - 100F + VOUT 10F VIN = 3.5V TO 15V +VOUT 2VIN - (VL + 2VDIODE) -VOUT -2VIN + (VL + 2VDIODE) VL = LT1054 VOLTAGE LOSS 100F -VOUT + 100F - ++ +VOUT + LT1054 * TAO7 = 1N4001 5V to 12V Converter VIN = 5V 5F VOUT 12V IOUT = 25mA FB/SHDN V + + 100F OSC CAP + LT1054 #1 GND VREF + CAP - 1N914 + 10F + 10F 2N2219 VOUT 100F 1k + 10F 1N914 5F TO PIN 4 LT1054 #1 FB/SHDN V + OSC CAP + LT1054 #2 GND VREF CAP - 20k VOUT + + VOUT -12V IOUT = 25mA 100F LT1054 * TAO8 + Strain Gauge Bridge Signal Conditioner 5V 10k 10k 8 0.022F A1 1/2 LT1013 + 1 200k FB/SHDN V + 10F + OSC CAP + LT1054 GND VREF CAP - VOUT 10k ZERO TRIM 40 2N2907 - INPUT TTL OR CMOS LOW FOR ON 2 3 + 100k 10F 5k 5k GAIN TRIM 6 301k 100k 10k 350 5 1F - 1M A2 1/2 LT1013 7 + 4 LT1054 * TAO9 5V 3k + 2N2222 A = 125 FOR 0V TO 3V OUT FROM FULL-SCALE BRIDGE OUTPUT OF 24mV 100F TANTALUM Rev. I For more information www.analog.com 11 LT1054/LT1054L TYPICAL APPLICATIONS 3.5V to 5V Regulator VIN 3.5V TO 5.5V 1 1N914 FB/SHDN V + 1N914 10F OSC CAP + LT1054 GND VREF + CAP - 1F + 5F R1 20k 3 R2 125k LTC1044 4 R2 125k 0.002F VOUT 2 + + 7 6 5 + 1N914 8 VOUT = 5V 3k 100F + 20k 1F - VIN = 3.5V TO 5.5V VOUT = 5V IOUT(MAX) = 50mA 2N2219 1N914 LT1054 * TA10 1N5817 Regulating 200mA, 12V to - 5V Converter 5F + 12V 10 1/2W 10F OSC CAP + LT1054 #1 GND VREF CAP - + ) HP5082-2810 FB/SHDN V + FB/SHDN V + R1 39.2k 10F R2 200k VOUT )) ) |VOUT| |VOUT| R2 = +1 = +1 , 1.21V R1 VREF - 40mV 2 + OSC CAP + LT1054 #2 GND VREF 10 1/2W CAP - 0.002F 20k VOUT LT1054 * TA11 200F + VOUT = -5V IOUT = 0mA to 200mA REFER TO FIGURE 5 Digitally Programmable Negative Supply 15V + 11 5F 20k 10F CAP + OSC LT1054 GND VREF CAP - 20k 14 13 12 LT1054 * TA12 VOUT + 12 DIGITAL INPUT AD558 LT1004-2.5 2.5V FB/SHDN V + + 16 VOUT = -VIN (PROGRAMMED) 100F Rev. I For more information www.analog.com LT1054/LT1054L PACKAGE DESCRIPTION J8 Package 8-Lead CERDIP (Narrow .300 Inch, Hermetic) (Reference LTC DWG # 05-08-1110) CORNER LEADS OPTION (4 PLCS) .005 (0.127) MIN .023 - .045 (0.584 - 1.143) HALF LEAD OPTION .405 (10.287) MAX 8 7 6 5 .025 (0.635) RAD TYP .045 - .068 (1.143 - 1.650) FULL LEAD OPTION .220 - .310 (5.588 - 7.874) 1 .300 BSC (7.62 BSC) 2 3 4 .200 (5.080) MAX .015 - .060 (0.381 - 1.524) .008 - .018 (0.203 - 0.457) 0 - 15 NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE OR TIN PLATE LEADS .045 - .065 (1.143 - 1.651) .014 - .026 (0.360 - 0.660) .100 (2.54) BSC .125 3.175 MIN J8 0801 OBSOLETE PACKAGE N Package 8-Lead PDIP (Narrow .300 Inch) (Reference LTC DWG # 05-08-1510 Rev I) .400* (10.160) MAX 8 7 6 5 .255 .015* (6.477 0.381) .300 - .325 (7.620 - 8.255) .008 - .015 (0.203 - 0.381) 1 2 3 4 ( +.035 .325 -.015 8.255 +0.889 -0.381 .045 - .065 (1.143 - 1.651) .065 (1.651) TYP ) .100 (2.54) BSC .130 .005 (3.302 0.127) .120 (3.048) .020 MIN (0.508) MIN .018 .003 (0.457 0.076) N8 REV I 0711 NOTE: 1. DIMENSIONS ARE INCHES MILLIMETERS *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm) Rev. I For more information www.analog.com 13 LT1054/LT1054L PACKAGE DESCRIPTION S8 Package 8-Lead Plastic Small Outline (Narrow .150 Inch) (Reference LTC DWG # 05-08-1610 Rev G) .189 - .197 (4.801 - 5.004) NOTE 3 .045 .005 .050 BSC 7 8 .245 MIN .160 .005 5 6 .150 - .157 (3.810 - 3.988) NOTE 3 .228 - .244 (5.791 - 6.197) .030 .005 TYP 1 RECOMMENDED SOLDER PAD LAYOUT .010 - .020 x 45 (0.254 - 0.508) 3 2 4 .053 - .069 (1.346 - 1.752) .008 - .010 (0.203 - 0.254) .004 - .010 (0.101 - 0.254) 0- 8 TYP .016 - .050 (0.406 - 1.270) .050 (1.270) BSC .014 - .019 (0.355 - 0.483) TYP NOTE: 1. DIMENSIONS IN INCHES (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) 4. PIN 1 CAN BE BEVEL EDGE OR A DIMPLE SO8 REV G 0212 SW Package 16-Lead Plastic Small Outline (Wide .300 Inch) (Reference LTC DWG # 05-08-1620) .050 BSC .045 .005 .030 .005 TYP .398 - .413 (10.109 - 10.490) NOTE 4 16 N 15 14 13 12 11 10 9 N .325 .005 .420 MIN .394 - .419 (10.007 - 10.643) NOTE 3 1 2 3 N/2 N/2 RECOMMENDED SOLDER PAD LAYOUT 1 .005 (0.127) RAD MIN .009 - .013 (0.229 - 0.330) NOTE: 1. DIMENSIONS IN 14 .291 - .299 (7.391 - 7.595) NOTE 4 .010 - .029 45 (0.254 - 0.737) 2 3 4 5 6 .093 - .104 (2.362 - 2.642) 7 8 .037 - .045 (0.940 - 1.143) 0 - 8 TYP NOTE 3 .016 - .050 (0.406 - 1.270) .050 (1.270) BSC .014 - .019 (0.356 - 0.482) TYP INCHES (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS. THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS 4. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) For more information www.analog.com .004 - .012 (0.102 - 0.305) S16 (WIDE) 0502 Rev. I LT1054/LT1054L REVISION HISTORY (Revision history begins at Rev F) REV DATE DESCRIPTION PAGE NUMBER F 12/10 The LTC1054MJ8 is now available. Changes reflected throughout the data sheet G 6/11 Corrected error to part number from LTC7660 to ICL7660 1 H 9/14 Changed Order Information section 2 I 1/20 Obsoleted LTC1054MJ8 version 1 to 16 2, 13 Rev. I Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license For is granted implication or otherwise under any patent or patent rights of Analog Devices. more by information www.analog.com 15 LT1054/LT1054L TYPICAL APPLICATIONS Negative Doubler with Regulator Positive Doubler with Regulation VIN = 5V 100F + 1N5817 0.03F 5.5k 10k 2.5k + + OSC CAP LT1054 GND VREF + 10k CAP - 5V - FB/SHDN V + 2F 10F VOUT 10F 10k + 2F OSC CAP + LT1054 GND VREF + CAP - + R1, 20k VOUT 1N4001 R2 1M 100F 0.002F 1N4001 -VOUT LT1006 VIN = 3.5V TO 15V VOUT(MAX) -2VIN + (VL + 2VDIODE) VL = LT1054 VOLTAGE LOSS ) LT1054 * TA13 0.1F )) ) + VOUT 8V 50mA + FB/SHDN V + 10F + 50k 1N5817 VIN 3.5V TO 15V 100F |VOUT| |VOUT| R2 = +1 = + 1 , REFER TO FIGURE 5 1.21V R1 VREF - 40mV 2 LT1054 * TA14 THE TYPICAL APPLICATIONS CIRCUITS WERE VERIFIED USING THE STANDARD LT1054. FOR S8 APPLICATIONS ASSISTANCE IN ANY OF THE UNUSUAL APPLICATIONS CIRCUITS PLEASE CONSULT THE FACTORY RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC(R)1144 Switched-Capacitor Wide Input Range Voltage Converter with Shutdown Wide Input Voltage Range: 2V to 18V, ISD < 8A, SO8 LTC1514/LTC1515 Step-Up/Step-Down Switched-Capacitor DC/DC Converters VIN: 2V to 10V, VOUT: 3.3V to 5V, IQ = 60A, SO8 LT1611 150mA Output, 1.4mHz Micropower Inverting Switching Regulator VIN: 0.9V to 10V, VOUT: 34V ThinSOTTM LT1614 250mA Output, 600kHz Micropower Inverting Switching Regulator VIN: 0.9V to 6V, VOUT: 30V, IQ = 1mA, MS8, SO8 LTC1911 250mA, 1.5MHz Inductorless Step-Down DC/DC Converter VIN: 2.7V to 5.5V, VOUT: 1.5V/1.8V, IQ = 180A, MS8 LTC3250/LTC3250-1.2/ Inductorless Step-Down DC/DC Converter LTC3250-1.5 VIN: 3.1V to 5.5V, VOUT: 1.2V, 1.5V, IQ = 35A, ThinSOT LTC3251 500mA Spread Spectrum Inductorless Step-Down DC/DC Converter VIN: 2.7V to 5.5V, VOUT: 0.9V to 1.6V, 1.2V, 1.5V, IQ = 9A, MS10E LTC3252 Dual 250mA, Spread Spectrum Inductorless Step-Down DC/DC Converter 16 VIN: 2.7V to 5.5V, VOUT: 0.9V to 1.6V, IQ = 50A, DFN12 Rev. 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