Philips Semiconductors Product specification Quad 2-input exclusive OR gate 74LVC86A FEATURES Wide supply range of 1.2V to 3.6V Complies with JEDEC standard no. 8-1A Inputs accept voltages up to 5.5V @ CMOS low power consumption Direct interface with TTL levels 5-volt tolerant inputs, for interfacing with 5-volt logic DESCRIPTION The 74LVC86A is a high-pertormance, low-power, low-voltage Si-gate CMOS device that is pin and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V/5 V environment. The 74LVC86A provides the 2-input EXCLUSIVE-OR function. QUICK REFERENCE DATA GND = 0 V; Tamb = 25C: t, = 5 2.5 ns SYMBOL PARAMETER CONDITIONS TYPICAL UNIT teuL Propagation delay C, = 50 pF; 30 teLH nA, nB to nYn Voc = 3.3 V : ns Cy Input capacitance 5.0 pF Cpep Power dissipation capacitance per gate Voc = 3.3 V, Vi = GND to Voc! 28 pF NOTE: 1. Cpp is used to determine the dynamic power dissipation (Pp in uW) Pp = Cpp x Voc" fi + 2 (CL * Voc? = fy) where: f, = input frequency in MHz; C;, = output load capacity in pF; fy = output frequency in MHz; Voc = supply voltage in V; E (Cy x Vor? x fo) = Sum of the outputs. ORDERING INFORMATION PACKAGES TEMPERATURE RANGE | OUTSIDE NORTH AMERICA | NORTH AMERICA PKG. DWG. # 14-Pin Plastic DIL 40C to +85C 7ALVCBBA N 74LVC86A N SOT27-1 14-Pin Plastic SO ~40C to +85C 74LVC8E6A D 74LVCB6A D SOT108-1 14-Pin Plastic SSOP Type II 40C to +85C 74LVC86A DB 74INCBE6A DB SOT337-1 14-Pin Plastic TSSOP Type | ~40C to +85C T4LVC86A PW 74LVC86APW DH SOT402-1 PIN CONFIGURATION LOGIC SYMBOL (IEEE/IEC) or i =1 Al 141, . 3 ce} UF} : 1B 2 [13 ] 4B 2a ta [a1 ] av 5 ap [5 | [10] 38 9 =1 3 av [6 | 9] 34 10 S eno [7 | | 8 | 3Y 12 = svoo4det 13 Lo PIN DESCRIPTION svooa79 PIN _ | SYMBOL FUNCTION NUMBER 1,4,9, 12 iA-~4A ; Data inputs 2,5,10,13 ] 18-48 3, 6, 8, 11 1-4Y | Data outputs 7 GND Ground (0 V) 14 Voc Positive supply voltage 1998 Apr 28 5171 853-2018 19310 Philips Semiconductors Product specification Quad 2-input exclusive OR gate 74LVC86A LOGIC SYMBOL FUNCTION TABLE INPUTS OUTPUTS nA nB ny L L L L H H H L H H H L sv00480 NOTES: H =HIGH voltage level LOGIC DIAGRAM (ONE GATE) t= LOW voltage level A Y 8 svo0478 RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER CONDITIONS ues UNIT MIN MAX DC supply voltage (for max. speed performance) 27 3.6 Veo BC supply voltage (for jaw-voltage applications} 1.2 3.6 v Vi DC Input voltage range 0 ; 5.5 Vo DC output voltage range 0 Voc Tamp | Operating ambient temperature range in free-air -40 +85 C th input rise and fall times Mia = OS e Sov 3 0 ns/V ABSOLUTE MAXIMUM RATINGS? Absolute Maximum Rating System (IEC 134) Voltages are referenced to GND (ground = OV) SYMBOL PARAMETER CONDITIONS RATING UNIT Voc ete ae (for max. speed -0.5 to 46.5 Vv hk DC input diode current Vv, <0 ~50 mA Vi DC input voltage Note 2 ~0.5 to +5.5 v lox DC output diode current Vo >Vecg or Vo < 0 +50 mA Vo DC output voltage Note 2 ~0.5 to Voc + 0.5 Vv lo DC output source or sink current Vo = Oto Voc 50 mA lanp. log | DC Vcc or GND current +100 mA Tstg Storage temperature range 65 to +150 C Power dissipation per package Prot ~ plastic mini-pack (SO) above +70C derate linearly with 8 mW/K 500 mW plastic shrink mini-pack (SSOP and TSSOP) above +60C derate linearly with 5.5 mW/K 500 NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 1998 Apr 28 512 Phitips Semiconductors Product specification Quad 2-input exclusive OR gate 74LVC86A DC CHARACTERISTICS Over recommended operating conditions voltages are referenced to GND (ground = 0V) LIMITS SYMBOL PARAMETER TEST CONDITIONS Temp = ~40C to +85C =| UNIT MIN TYP? | MAX Voc = 1.2V Vv Vin HIGH level Input voltage cc Vv Voc = 2.7 to 3.6V 2.0 Veco = 1.2V GND Vit LOW level Input voltage Vv Voc = 2.7 to. 3.6V 0.8 Voc = 2.7V; Vi = Vig or Vits Ilo = -12mA Veco 0.5 Voc = 3.0V; Vj = Vin or Vis Io = -100pA Voo-0.2 | V Vou HIGH level! output voltage ce v Voc = 3.0V; Vi = Vin or ViL, lo = ~18MA Voc - 0.6 Voc = 3.0V; Vi = Vin Or Vit; Ip = -24mA Voc ~ 0.8 Voo = 2.7V; Vi = Vig or Viti Ip = 12mA 0.40 Vor LOW level output voltage Voc = 3.0V; Vi = Vin or Vip; Ip = 100A 0.20 Vv Voc = 3.0V; Vj = Vix or Vit; Ip = 24mA 0.55 y Input leakage current Voc = 3.6V; Vj = 5.5V or GND 0.4 +5 pA loc Quiescent supply current Voc = 3.6V; V) = Voc or GND; Ip = 0 O41 10 HA Additional quiescent supply current _ ye a Alcc per input pin Veo = 2.7V to 3.6V; Vi = Veo -0.6V; Ip = 0 5 500 pA NOTES: 1. All typical values are at Vcc = 3.3V and Tamp = 25C. AC CHARACTERISTICS GND = OV; t= % = 2.5 ns; CL = 50 pF; Ry = 500Q; Tam = 40C to +85C LIMITS SYMBOL PARAMETER WAVEFORM Vec = 3.3V +0.3V Veco =2.7V Veco = 1.2V | UNIT MIN TyP! MAX MIN TYP! MAX TYP teu! Propagation delay . TPL nA, nB to nY Figures t, 2 16 3.0 5 15 3.4 5.8 oe ns NOTE: 1. These typical values are at Voc = 3.3V and Tamp = 25C. AC WAVEFORMS : TEST CIRCUIT Vu =15VatVoco 2 2.7V Vm =0.5* Voc at Vog < 2.7 V Sto 2+ Vee Voy, and Voy are the typical output voltage drop that occur with the Veo oo Open output load. o- GND vi 50002 PULSE a DUT. ve GENERATOR 50pF n&, nB INPUT [ i I PF | | S000 a oe a GNO Veo vi Test 8 You < BN Voc teLHtPHL Open 27V-3.6V | 27V nY OUTPUT syo0077 You 8v00377 Figure 2. Load circuitry for switching times. Figure 1. Input (nA, nB) to output (nY) propagation delays 1998 Apr 28 513