Comlinear Wideband Variable- WJ Corporation Gain Amplifier CLC522 APPLICATIONS: FEATURES: e variable attenuators @ 330MHz signal bandwidth: Aymax= 2 e pulse amplitude equalizers 165MHz gain-control bandwidth HF modulators @ 0.3 to 6OMHz linear phase deviation e automatic gain control & leveling loops 0.04% (-68dB) signal-channel non-linearity video production switching e >40dB gain-adjustment range e differential line receivers e differential or single-end voltage inputs voltage controlled filters single-ended voltage output DESCRIPTION Gain vs. Gain Control! Voltage (V The CLC522 variable gain amplifier (VGA) is a dc-coupled, two- ain vs: Gain Control Voltage (Vs) quadrant multiplier with differential voltage inputs and a single- ended voltage output. Two input buffers and an output operational 0 gy amplifer are integrated with the multiplier core to make the CLC522 4 a complete VGA system that does not require external buffering. > = | The CLC522 provides the flexibility of externally setting the maximum 5 Fa A gain with only two external resistors. Greater than 40dB gain control A is easily achieved through a single high impedance voltage input. ye The CLC522 provides a linear (in Volts per Volt) relationship 0 between the amplifier's gain and the gain-control input voltage. AA Gain Control Voltage, V, (Volts) 14 The CLC522's maximum gain may be set anywhere over a nominal range of 2V/V to 100V/V. The gain control input then provides vnour attenuation from the maximum setting. For example, set for a oS maximum gain of 100V/V, the CLC522 will provide a 100V/V to 1V/V +Vec Li] [14] +Voc gain control range by sweeping the gain control input voltage from Vg [2 113] +Voc +1 to -0.98V. Mel NS fae Lo Set at a maximum gain of 10V/V, the CLC522 provides a 165MHz +o [4] [ti] GND signal channel bandwidth and a 165MHz gain control bandwidth. Ro [5] [i0} Vou Gain nonlinearity over a 40dB gain range is 0.5% and gain accuracy Via [6] 9] Veet at Avmnax = 10V/V is typically +0.3%. Moo [ Fa] Voc Vin OR c TYPICAL APPLICATION Ma 2nd Order Tuneable Bandpass Filter Re "Ry CLC420 5s , Mo _ (-*) CRp . in N/ 5? +5 + x c CR, CR, ra k=185%, Q= VkR, , wk cucs20 Rg Ry CR, R Comlinear Corporation * 4800 Wheaton Drive + Fort Collins, CO 80525 (800) 776-0500 FAX (303) 226-0564 DS822.04 WE 2279101 0001897 STT August 1994}CLC522 Electrical Characteristics (Vo. = +5V: Avo = +10; R,/=1kQ; R, =182Q; R, = 1009; V,=+1.1V) PARAMETERS CONDITIONS TYP GUARANTEED MIN/MAX UNITS _||NOTES Ambient Temperature AJE,AJP +25 +25 O0to+70 | -40t0 +85 || C 1 FREQUENCY DOMAIN RESPONSE -3dB bandwidth Vou < 0.5Vpp 165 120 115 110 MHz 3 Vout < 5.0Vop 150 100 95 90 MHz gain contro! bandwidth Vout < 0.5Vpp 165 120 115 110 MHz 4 gain flatness Vou < 0.5V 55 peaking DC to 30MHz 0 0.1 0.1 0.1 dB 3 rolloff DC to 30MHz 0.05 0.25 0.25 1.3 dB 3 linear phase deviation DC to 6OMHz 0.3 1.0 1.1 1.2 feedthrough 30MHz - 62 - 57 - 57 -57 dB 3,5 TIME DOMAIN RESPONSE rise and fall time 0.5V step 2.2 2.9 3.0 3.2 ns 5.0V step 3.0 5.0 5.0 5.0 ns settling time 2.0V step to 0.1% 12 18 18 18 ns overshoot 0.5V step 2 15 15 15 % slew rate 4,0V step 2000 1400 1400 1400 V/us DISTORTION AND NOISE RESPONSE 2 harmonic distortion 2V 5, 2OMHz - 50 - 44 - 44 -44 dBc 3 3% harmonic distortion 2V op, ZOMHZ - 65 - 58 - 56 -54 dBc 3 equivalent input noise 1 to 200MHz 5.8 6.2 6.5 6.8 nVANVHz noise floor 1 to 200MHz - 152 - 150 - 149 - 149 dBm yu2 GAIN ACCURACY signal channel nonlinearity (sant) Vox= 2V>_ 0.04 0.1 0.1 0.1 % 2 gain control nonlinearity (ecnL) full range 0.5 2.0 2.2 3.0 % 2 gain error (accu) AVimax=+10 + 0.0 +0.5 + 0.5 +1.0 dB 2 Vg high +990 + 990+60 | +990+60 | +990+60 |} mV low - 975 -975+80 | - 975480 | -975+80 || mV STATIC DC PERFORMANCE Vin voltage range common mode 2.2 +1.2 +1.2 +1.4 Vv bias current 9 21 26 45 pA 2 average drift 65 -- 175 275 nA/rc offset current 0.2 2.0 3.0 4.0 HA average drift 5 -- 30 40 nA/C resistance 1500 650 450 175 kQ capacitance 1.0 2.0 2.0 2.0 pF Vg bias current 15 38 47 82 pA average drift 125 -- 300 600 nA resistance 100 38 30 15 kQ capacitance 1.0 2.0 2.0 2.0 pF output voltage range R,= + 4.0 +3.7 + 3.6 +3.5 Vv current +70 + 47 + 40 + 25 mA offset voltage AVimax=+10 25 85 95 120 mV 2 average drift 100 --- 350 400 pV/PC resistance 0.1 0.2 0.3 0.6 Q IRgmax 1.8 1.37 1.26 1.15 mA power supply sensitivity output referred 10 40 40 40 mvV/V 3 common-mode rejection ratio input referred 70 59 59 59 dB supply current R,= co 46 61 62 63 mA 2 Absolute Maximum Ratings Ordering Information supply voltage short circuit current common-mode input voltage maximum junction temperature storage temperature lead temperature (soldering 10 sec) 1) AJE (SOIC) is tested/quaranteed with Ri=866Q and Ro= 1652. 2) J-level, spec is 100% tested at +25C, sample tested at +85C. +7V 96mA +V +200C -65C to+ 150C +300C L-level, spec is 100% wafer probed at 25C. 3) J-level, spec is sample tested at 25C. 4) Tested with Vin = 0.2V and Vg < 0.5Vpp. 5) Feedtrough is tested at maximum attenuation (i. Vg =-1.1V) Model Temperature Range Description CLCO522AUP -40C to +85C 14-pin PDIP CLO522AJE -40C to +85C 14-pin SOIC CLC522ALC -40C to +85C dice CLC522AIB ~40C to +85C 14-pin CerDIP CLC522A8D* -5C to +125C 14-pin CerDIP, MIL-STD-883 CLC522AMC* -55C to +125C dice, MIL-STD-883 CLC522A8L-2* -66C to +125C 20pin LCC, MIL-STD-883 #5962-93259" -65C to +125C DESC SMD *See CLC522 MIL-883 Data Sheet for Specifications Comlinear reserves the right to change specifications without notice. MB 22759101 0001896 ?73bFrequency Response (Ayma,=2) Vout = 2Vpp Gain Av=Avinax 1.0V) (Alp/oSb) @SBUd e& Av=l (Vi=0V) 135 -180 -270 500 Normalized Magnitude (1dB/div) 1 Frequency (MHz) PSRR and CMRR (Input Referred) PSRR/CMRA (dB) S8B8sSSaA = oO o 108 Frequency (Hz) , Gain 104 108 SGNL vs. 107 108 0.20 0.18 0.16 0.14 0.12 0.10 0.08 0.06 0.04 0.02 0.00 Full Scale Non-linearity (% (A/A) we a Vg (Volts) Gain Control Settling Time & Avmax = +10 in = 0.25V DC nm on Vout (0.5V/div.) Vg=-l. Time (5ns/div) Long Term Settling Time 0 Avmax=+ 10 2V output step Vg=1.0V Settling Error (%) 109 10 107 10 10 164 10 10% 10 10 Time (sec) CLC522 Typical Performance Gain (dB) Settling Time, TS, (ns), to 0.1% Magnitude (1dB/div) Normalized Magnitude (1dB/div) 100mVidiv 50 40 30 m Qo oD (Ta=+25C, Vooet5V, Ay=+10, Vg=1.1V, Ri=100; unless noted) Frequency Response (Ayma,=10) 1 Vour = 500m Gain Ry = 1k Frequency (MHz) Feed-through Isolation Frequency (MHz) Large Signal Frequency Response 0 =+2 Rr Avmax = +100 R= B0BQ2 requency Vo = Vg=1.1V =+10 =1kQ Gain Control Channel Feedthrough Frequency Response (Ay,,,,=100) v vu = = Vin= a @ = |[_ Gain o & a & oo 3 8 2 = a = e z uo 2 0 s 0 oO 4 = 45 J 9 N -90 13 = 135 180 S| Pur10.22 . = IP R=7150 180 -270 -270 200 1 Frequency (MHz) 100 Gain Flatness & Linear Phase Deviation < Avmaxt 10 a Gain x a = < 2 a 2 Ss oa ob 2 = a = = = 0 Frequency (3MHz/div) 30M Large & Small Signal Pulse Response Vp input Vin = 0 Time (5ns/div) Settling Time vs. Capacitive Load =+10 100 Load Capacitance, C_ (pF) M 2279101 0001899 b72 > =t & 3]F Vy=t.0V Vout = 5Vpp oO @ alt Rraika s 2 S1 9 = Vout = 0.5Vpp 45 6&0 an -90 1 135 4 -180 225008 250 Time (5ns/div) Short Term Settling Time 2 AVmax = +10 15 2V output step 04 Vg=1.0V <7 LZ .05 wig a =-.05 Do ow A 15 2 0 Time (10ns/div) 100 Settling Time vs. Gain 100 90 80 = 70 x ns sos oO Zs E 40% i= Dp 30 = 20 8 10 0 1000 14 2 4 6 8 10 12 Attenuation From Maximum Gain (dB) y (AlP/o} D)@SBYg JBaUr] UO.) LOHRIASG x N goa io a (soa) teubls jews My tm a oSCLC522 Typical Performance (1,=+25C, Vec=t5V, Av=+10, Vg=1.1V, Ri=100.2; unless noted) Differential Gain and Phase Differential Gain and Phase Input Referred Voltage Noise vs Aymax 00 he on 25 | +Vin 6 Vinput Rg The CLC522 input buffers convert the input voltage to a current (IRg) that is a function of the differential input voltage (Vinput =+Vin - -Vin) and the value of the gain- setting resistor (Rg). This current (Ipg) is then mirrored to a gain stage with a current gain of 1.85. The voltage- controlled two-quadrant multiplier attenuates this current which is then converted to a voltage via the output amplifier. This output amplifier is a current-feedback op amp configured as a transimpedance amplifier. It's tran- simpedance gain is the feedback resistor (Ry). The input signal, output, and gain control are all voltages. The output voltage can easily be calculated as seen in Eq. 1. +1 jn me 2279101 o001900 114 = Vg Vout = IR, 1055( Eq. 1 4.43 MHz 4.43 MHz Gain Aymax = +10 Phase, Vg =0.0V Positive Sync o 20}+ Negative Sync L Vg=1.0V 4! ap 2 .08 y Avmax= +2 4).08 & z |g gz s 5 a> sit Phase <4| 153 $.06 oe = 5 Negative Sync "Bhase BO Bo So a = 3 yao Positive Syne Z 3 Phase, Vg= 1.0V a 210 $.10\ 4102 5.04] Gain, Vg = 1.0V > 5 = {tj Gain 33 2s 5 Positive Sync 8 5 k so .05 a 052 .02 v 02 & > pa Gain, Vy =0.0V 0 0 0 0 1 1 2 3 4 1 2 3 4 0 10 20 30 40 50 60 70 80 90 100 Numberof150Q Loads Number of 1502 Loads Maximum Gain Setting, AVmax (V/V) 2nd Harmonic Distortion vs. Pout 3rd Harmonic Distortion vs. Pout 0 -1dB Compression at Maximum Gain 1. Output ~ 50MHz 19 Limited + 5022 Py . 522 50 > 18|} ZAr=1.4kQ || g 8. zon B17 4 2 z 20MHz = Se 3 3: B16 7 PSS a 5 8 Input _ a a. @ 15 . Pp = = 5 Limited 2 2. E14 Ry = 9002 2 g & 13 Fi Ry wm. - a a a gs 502 C500 a, - : v 12 i 02 so 1 500 20Q 10 4 0 2 4 6 10 4 0 2 4 6 10 0 Frequency (MHz) 100 Output Power (Pout, dBm) Output Power (Pout, dBm) Application Discussion Theory of Operation since |, = Vinput The CLC522 is a linear wideband variable-gain amplifier a Ry as illustrated in Fig 1. A voltage input signal may be applied differentially between the two inputs (+Vin, -Vin), A. = 185 Ry (Vg +1 . . = *k * | or single-endedly by grounding one of the unused inputs. vo" Ry 9 Eq. 2 The gain of the CLC522 is therefore a function of three external variables; Rg, Ry and Vg as expressed in Eq. 2. The gain-control voltage (Vg) has a ideal input range of -1V<Vg<+1V. At Vg=+1V, the gain of the CLC522 is at its maximum as expressed in Eq. 3. Re Rg Notice also that Eq. 3 holds for both differential and single-ended operation. Eq. 3 Choosing R; and Rg Rgis calculated from Eq.4. Vinputma Vv, INPUt vax gq Lo! Fginax input voltage (Vpx) determined by the application. lpg_., is the maximum allowable current through Rg and is typically 1.8mA. Once Ay,,,, is determined from the minimum input and desired output voltages, R; is then determined using Eq. 5. These values of R and Rg are ; is the maximum peak R Eq. 4 R; = #Rg*Ay max Eq. 5 1.85 the minimum possible values that meet the input voltage and maximum gain constraints. Scaling the resistor values will decrease bandwidth and improve stability.2/Bandwidth vs. Vinputmax VS. Avmax rm = _ Oo oS a Max. Input Voltage, Vinput (Voltspp) Vout=1 Vop 0.05 10 100 Maximum Gain Setting, Avmax (V/V) Fig. 2 Fig. 2 illustrates the resulting CLC522 bandwidths as a function of the maximum and minimum input voltages when Vout is held constant at 1Vpp. Adjusting Offsets Treating the offsets introduced by the input and output stages of the CLC522 is easily accomplished with a two step process. The offset voltage of the output stage is treated by first applying -1.1 Volts on Vg which effectively +5V T C7 O.1pF Fig. 3 -BV isolates the input stage and multiplier core from the output stage. As illustrated in Fig. 3, the trim pot located at R14 on the CLC522 Evaluation Board should then be adjusted in order to null the offset voltage seen at the CLC522's output (pin 10). Once this is accomplished, the offset errors introduced by the input stage and mulitiplier core can then be treated. The second step requires the absence of an input signal and matched source imped- ances on the two input pins in order to cancel the bias current errors. This done then +1.1Volts should be applied to Vg and the trim pot located at R10 adjusted in order to null the offset voltage seen at the CLC522's output. If a more limited gain range is anticipated, the above adjustments should be made at these operating points. Gain Errors The CLC522's gain equation as theoretically expressed in Eq. 2 must include the device's error terms in order to yield the actual gain equation. Each of the gain error M8 2279101 00013901 050 me terms are specified in the Electrical Characteristics table and are defined below and illustrated in Fig. 4. accu : error of Ay,,.,, expressed as +dB. Gent : deviation from theoretical expressed as +%. Vonigh : voltage on Vg producing Ay,,,, - : voltage on Vg producing AVA in= OV/V. Vonigh ' AVg error OfV a igh Vow expresedas+mvV. Siow Av 4 Avmax +GACcU WAEGCNL 7 - Avmin i tAV Oy >! if +AVg,, hei pi [$+ Vg ~ 1 Voom Vohigh Fig. 4 Combining these error terms with Eq. 2 gives the gain envelope" equation and is expressed in Eq. 7. From the Electrical Characteristics table, the nominal endpoint values of Vg are: Vonign =+990MV and Vg. = -975mV. +GACCU 10 % (V,-V, +AV, Ay = Ay ( 9 Slow mw) + (1-V,? Jacnt mx (v +AV, -Vo tAV. high Ghigh Siow Slow Eq.7 Signal-Channel Nonlinearity Signal-channel nonlinearity, sant, also known as integral endpoint linearity, measures the non-linearity of an amplifiers voltage transfer function. The CLC522's SGNL, as it is specified in the Electrical Characteristics table, is measured while the gain is set at its maximum (i.e. - Vg=+1.1V). The Typical Performance Characteristics plot labled "SGNL & Gain vs V, illustrates the CLC522's SGNL as Vg is swept through its full range. As can be seen in this plot, when the gain as reduced from Avimnax , SGNL improves to < 0.02%(-74dB) at Vg=0 and then degrades somewhat at the lowest gains. Noise Fig. 5 describes the CLC522's input-refered spot noise density as a function of Aya, . The plot includes all the noise contributing terms. At Avma, = 10V/V, the CLC522 has a typical input-referred spot noise density (epi) of 5.8nV/VHz. The input rms voltage noise can be deter- mined from the following single-pole model: Vans = ni*/157*(3dB bandwidth) Eq. 8 Further discussion and plots of noise and the noise model is provided in Application Note OA-23. Comlinear also provides SPICE models that model internal noise and other parameters for a typical part.00 Input Referred Voltage Noise vs Aymax Voltage Noise (nV/VHz) 0 10 20 30 40 50 60 70 80 90 100 Maximum Gain Setting, Avmax (V/V) Fig. 5 Circuit Layout Considerations Please refer to the CLC522 Evaluation Board Literature for precise layout guidelines. Good high-frequency op- eration requires ail of the de-coupling capcitors shown in Fig. 6 to be placed as close as possible to the power JeauF 0.1 yF b +Vin I { +Voc ct 0.1 Hl por uF Fig. 6 supply pins in order to insure a proper high-frequency low-impedance bypass. Adequate ground plane and low- inductive power returns are also required of the layout. Minimizing the parasitic capacitances atpins 3, 4, 5, 6, 9, O.1pF] Fig. 7 10 and 12 as shown in Fig. 7 will assure best high frequency performance. Vref (pin 9) to ground should include a small resistor value of 25 ohms or greater to buffer the internal voltage follower. The parasitic induc- tance of component leads or traces to pins 4, 5 and 9 should also be kept to a minimum. Parasitic or load capacitance, C_, on the output (pin 10) degrades phase margin and can lead to frequency response peaking or circuit oscillation. This should be treated with a small series resistor between output (pin 10) and C_ (see the plot Settling Time vs. Capacitive Load" for a recom- mended series resistance). mm 2279101 o00190e TI = Component parasitics also influence high frequency results, therefore it is recommended to use metal film resistors such as RN55D or leadless components such as surface mount devices. High profile sockets are not recommended. If socketing is necessary, it is recom- mended to use low impedance flush mount connector jacks such as Cambion (P/N 450-2598). Application Circuits Four-Quadrant Multiplier Applications requiring multiplication, squaring or other non-linear functions can be implemented with four-quad- rant multipliers. The CLC522 implements a four-quad- rant multiplier as illustrated in figure 8. Ri= Rr i] Rn WRs Fig. 8 Frequency Shaping Frequency shaping and bandwidth extension of the CLC522 can be accomplished using parallel networks connected across theRg ports. The network shown in the Fig. 9 schematic will effectively extend the CLC522's bandwidth. +Vin Ri Fig. 9 2nd Order Tuneable Bandpass Filter The CLC522 Variable-Gain Amplifier placed into feed- back loops provide signal processing functions such as 2nd order tuneable bandpass filters. The center fre- quency of the 2nd order bandpass illustrated on the front page is adjusted through the use of the CLC522's gain- control voltage, Vg. The integrators implemented with two CLC420s, provide the coefficients for the transfer function. 2CC34